cirrusfb: fix threshold register mask for Laguna chips

Fix threshold register mask for Laguna chips otherwise some 8bpp modes are
garbled after selecting a 24bpp mode.

Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c
index a364e1b0dcb7..9bb811d56721 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/cirrusfb.c
@@ -875,7 +875,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
                 threshold = fb_readw(cinfo->laguna_mmio + 0xea);
                 control &= ~0x6800;
                 format = 0;
-                threshold &= 0xffe0 & 0x3fbf;
+                threshold &= 0xffc0 & 0x3fbf;
         }
         if (nom) {
                 tmp = den << 1;