ARM: dts: imx6: add pm_power_off support for i.mx6 chips

All chips of i.mx6 can be powered off by programming SNVS.
For example :
On i.mx6q-sabresd board, PMIC_ON_REQ connect with external
pmic ON/OFF pin, that will cause the whole PMIC powered off
except VSNVS. And system can restart once PMIC_ON_REQ goes
high by push POWRER key.

Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

6 files changed, 30 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index baf2f00d519a..05f5ff75c0ea 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -531,6 +531,10 @@
         status = "okay";
 };
 
+&snvs_poweroff {
+        status = "okay";
+};
+
 &ssi2 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index e529308811e6..4fc03b7f1cee 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -665,6 +665,12 @@
                                         interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
                                                      <0 20 IRQ_TYPE_LEVEL_HIGH>;
                                 };
+
+                                snvs_poweroff: snvs-poweroff@38 {
+                                        compatible = "fsl,sec-v4.0-poweroff";
+                                        reg = <0x38 0x4>;
+                                        status = "disabled";
+                                };
                         };
 
                         epit1: epit@020d0000 { /* EPIT1 */
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index 898d14fd765f..fda4932faefd 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -580,6 +580,10 @@
         status = "okay";
 };
 
+&snvs_poweroff {
+        status = "okay";
+};
+
 &ssi2 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index dfd83e6d8087..36ab8e054cee 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -574,6 +574,12 @@
                                         interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
                                                      <0 20 IRQ_TYPE_LEVEL_HIGH>;
                                 };
+
+                                snvs_poweroff: snvs-poweroff@38 {
+                                        compatible = "fsl,sec-v4.0-poweroff";
+                                        reg = <0x38 0x4>;
+                                        status = "disabled";
+                                };
                         };
 
                         epit1: epit@020d0000 {
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 448489be0076..1e6e5cc1c14c 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -336,6 +336,10 @@
         status = "okay";
 };
 
+&snvs_poweroff {
+        status = "okay";
+};
+
 &ssi2 {
         status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 422fc5acdd64..7a24fee1e7ae 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -671,6 +671,12 @@
                                         reg = <0x34 0x58>;
                                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
                                 };
+
+                                snvs_poweroff: snvs-poweroff@38 {
+                                        compatible = "fsl,sec-v4.0-poweroff";
+                                        reg = <0x38 0x4>;
+                                        status = "disabled";
+                                };
                         };
 
                         epit1: epit@020d0000 {