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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-10-17 12:09:16 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2008-10-17 12:09:16 -0400
commit41d1a3d31d097a31380b83eea0ec10ea1d040376 (patch)
treec34bac92e069b816389ecf7158efff81816ea1a3
parent0df962777b550a4b67191b3ee2555be139da4e7d (diff)
ide: remove broken hpt34x driver
No big loss since HPT343/363 controllers are properly supported by pata_hpt3x3 driver from Alan Cox. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
-rw-r--r--drivers/ide/Kconfig24
-rw-r--r--drivers/ide/pci/Makefile1
-rw-r--r--drivers/ide/pci/hpt34x.c193
3 files changed, 1 insertions, 217 deletions
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index faa974e615da..a820ca6fc327 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -328,7 +328,7 @@ config IDEPCI_PCIBUS_ORDER
328# TODO: split it on per host driver config options (or module parameters) 328# TODO: split it on per host driver config options (or module parameters)
329config BLK_DEV_OFFBOARD 329config BLK_DEV_OFFBOARD
330 bool "Boot off-board chipsets first support (DEPRECATED)" 330 bool "Boot off-board chipsets first support (DEPRECATED)"
331 depends on BLK_DEV_IDEPCI && (BLK_DEV_AEC62XX || BLK_DEV_GENERIC || BLK_DEV_HPT34X || BLK_DEV_HPT366 || BLK_DEV_PDC202XX_NEW || BLK_DEV_PDC202XX_OLD || BLK_DEV_TC86C001) 331 depends on BLK_DEV_IDEPCI && (BLK_DEV_AEC62XX || BLK_DEV_GENERIC || BLK_DEV_HPT366 || BLK_DEV_PDC202XX_NEW || BLK_DEV_PDC202XX_OLD || BLK_DEV_TC86C001)
332 help 332 help
333 Normally, IDE controllers built into the motherboard (on-board 333 Normally, IDE controllers built into the motherboard (on-board
334 controllers) are assigned to ide0 and ide1 while those on add-in PCI 334 controllers) are assigned to ide0 and ide1 while those on add-in PCI
@@ -478,28 +478,6 @@ config BLK_DEV_CS5535
478 478
479 It is safe to say Y to this question. 479 It is safe to say Y to this question.
480 480
481config BLK_DEV_HPT34X
482 tristate "HPT34X chipset support"
483 depends on BROKEN
484 select BLK_DEV_IDEDMA_PCI
485 help
486 This driver adds up to 4 more EIDE devices sharing a single
487 interrupt. The HPT343 chipset in its current form is a non-bootable
488 controller; the HPT345/HPT363 chipset is a bootable (needs BIOS FIX)
489 PCI UDMA controllers. This driver requires dynamic tuning of the
490 chipset during the ide-probe at boot time. It is reported to support
491 DVD II drives, by the manufacturer.
492
493config HPT34X_AUTODMA
494 bool "HPT34X AUTODMA support (EXPERIMENTAL)"
495 depends on BLK_DEV_HPT34X && EXPERIMENTAL
496 help
497 This is a dangerous thing to attempt currently! Please read the
498 comments at the top of <file:drivers/ide/pci/hpt34x.c>. If you say Y
499 here, then say Y to "Use DMA by default when available" as well.
500
501 If unsure, say N.
502
503config BLK_DEV_HPT366 481config BLK_DEV_HPT366
504 tristate "HPT36X/37X chipset support" 482 tristate "HPT36X/37X chipset support"
505 select BLK_DEV_IDEDMA_PCI 483 select BLK_DEV_IDEDMA_PCI
diff --git a/drivers/ide/pci/Makefile b/drivers/ide/pci/Makefile
index 02e6ee7d751d..ab44a1f5f5a9 100644
--- a/drivers/ide/pci/Makefile
+++ b/drivers/ide/pci/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_BLK_DEV_CS5535) += cs5535.o
11obj-$(CONFIG_BLK_DEV_SC1200) += sc1200.o 11obj-$(CONFIG_BLK_DEV_SC1200) += sc1200.o
12obj-$(CONFIG_BLK_DEV_CY82C693) += cy82c693.o 12obj-$(CONFIG_BLK_DEV_CY82C693) += cy82c693.o
13obj-$(CONFIG_BLK_DEV_DELKIN) += delkin_cb.o 13obj-$(CONFIG_BLK_DEV_DELKIN) += delkin_cb.o
14obj-$(CONFIG_BLK_DEV_HPT34X) += hpt34x.o
15obj-$(CONFIG_BLK_DEV_HPT366) += hpt366.o 14obj-$(CONFIG_BLK_DEV_HPT366) += hpt366.o
16obj-$(CONFIG_BLK_DEV_IT8213) += it8213.o 15obj-$(CONFIG_BLK_DEV_IT8213) += it8213.o
17obj-$(CONFIG_BLK_DEV_IT821X) += it821x.o 16obj-$(CONFIG_BLK_DEV_IT821X) += it821x.o
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
deleted file mode 100644
index fb1a3aa57f07..000000000000
--- a/drivers/ide/pci/hpt34x.c
+++ /dev/null
@@ -1,193 +0,0 @@
1/*
2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
3 *
4 * May be copied or modified under the terms of the GNU General Public License
5 *
6 *
7 * 00:12.0 Unknown mass storage controller:
8 * Triones Technologies, Inc.
9 * Unknown device 0003 (rev 01)
10 *
11 * hde: UDMA 2 (0x0000 0x0002) (0x0000 0x0010)
12 * hdf: UDMA 2 (0x0002 0x0012) (0x0010 0x0030)
13 * hde: DMA 2 (0x0000 0x0002) (0x0000 0x0010)
14 * hdf: DMA 2 (0x0002 0x0012) (0x0010 0x0030)
15 * hdg: DMA 1 (0x0012 0x0052) (0x0030 0x0070)
16 * hdh: DMA 1 (0x0052 0x0252) (0x0070 0x00f0)
17 *
18 * ide-pci.c reference
19 *
20 * Since there are two cards that report almost identically,
21 * the only discernable difference is the values reported in pcicmd.
22 * Booting-BIOS card or HPT363 :: pcicmd == 0x07
23 * Non-bootable card or HPT343 :: pcicmd == 0x05
24 */
25
26#include <linux/module.h>
27#include <linux/types.h>
28#include <linux/kernel.h>
29#include <linux/ioport.h>
30#include <linux/interrupt.h>
31#include <linux/pci.h>
32#include <linux/init.h>
33#include <linux/ide.h>
34
35#define DRV_NAME "hpt34x"
36
37#define HPT343_DEBUG_DRIVE_INFO 0
38
39static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed)
40{
41 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
42 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
43 u8 hi_speed, lo_speed;
44
45 hi_speed = speed >> 4;
46 lo_speed = speed & 0x0f;
47
48 if (hi_speed & 7) {
49 hi_speed = (hi_speed & 4) ? 0x01 : 0x10;
50 } else {
51 lo_speed <<= 5;
52 lo_speed >>= 5;
53 }
54
55 pci_read_config_dword(dev, 0x44, &reg1);
56 pci_read_config_dword(dev, 0x48, &reg2);
57 tmp1 = ((lo_speed << (3*drive->dn)) | (reg1 & ~(7 << (3*drive->dn))));
58 tmp2 = ((hi_speed << drive->dn) | (reg2 & ~(0x11 << drive->dn)));
59 pci_write_config_dword(dev, 0x44, tmp1);
60 pci_write_config_dword(dev, 0x48, tmp2);
61
62#if HPT343_DEBUG_DRIVE_INFO
63 printk("%s: %s drive%d (0x%04x 0x%04x) (0x%04x 0x%04x)" \
64 " (0x%02x 0x%02x)\n",
65 drive->name, ide_xfer_verbose(speed),
66 drive->dn, reg1, tmp1, reg2, tmp2,
67 hi_speed, lo_speed);
68#endif /* HPT343_DEBUG_DRIVE_INFO */
69}
70
71static void hpt34x_set_pio_mode(ide_drive_t *drive, const u8 pio)
72{
73 hpt34x_set_mode(drive, XFER_PIO_0 + pio);
74}
75
76/*
77 * If the BIOS does not set the IO base addaress to XX00, 343 will fail.
78 */
79#define HPT34X_PCI_INIT_REG 0x80
80
81static unsigned int init_chipset_hpt34x(struct pci_dev *dev)
82{
83 int i = 0;
84 unsigned long hpt34xIoBase = pci_resource_start(dev, 4);
85 unsigned long hpt_addr[4] = { 0x20, 0x34, 0x28, 0x3c };
86 unsigned long hpt_addr_len[4] = { 7, 3, 7, 3 };
87 u16 cmd;
88 unsigned long flags;
89
90 local_irq_save(flags);
91
92 pci_write_config_byte(dev, HPT34X_PCI_INIT_REG, 0x00);
93 pci_read_config_word(dev, PCI_COMMAND, &cmd);
94
95 if (cmd & PCI_COMMAND_MEMORY)
96 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF0);
97 else
98 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
99
100 /*
101 * Since 20-23 can be assigned and are R/W, we correct them.
102 */
103 pci_write_config_word(dev, PCI_COMMAND, cmd & ~PCI_COMMAND_IO);
104 for(i=0; i<4; i++) {
105 dev->resource[i].start = (hpt34xIoBase + hpt_addr[i]);
106 dev->resource[i].end = dev->resource[i].start + hpt_addr_len[i];
107 dev->resource[i].flags = IORESOURCE_IO;
108 pci_write_config_dword(dev,
109 (PCI_BASE_ADDRESS_0 + (i * 4)),
110 dev->resource[i].start);
111 }
112 pci_write_config_word(dev, PCI_COMMAND, cmd);
113
114 local_irq_restore(flags);
115
116 return dev->irq;
117}
118
119static const struct ide_port_ops hpt34x_port_ops = {
120 .set_pio_mode = hpt34x_set_pio_mode,
121 .set_dma_mode = hpt34x_set_mode,
122};
123
124#define IDE_HFLAGS_HPT34X \
125 (IDE_HFLAG_NO_ATAPI_DMA | \
126 IDE_HFLAG_NO_DSC | \
127 IDE_HFLAG_NO_AUTODMA)
128
129static const struct ide_port_info hpt34x_chipsets[] __devinitdata = {
130 { /* 0: HPT343 */
131 .name = DRV_NAME,
132 .init_chipset = init_chipset_hpt34x,
133 .port_ops = &hpt34x_port_ops,
134 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_NON_BOOTABLE,
135 .pio_mask = ATA_PIO5,
136 },
137 { /* 1: HPT345 */
138 .name = DRV_NAME,
139 .init_chipset = init_chipset_hpt34x,
140 .port_ops = &hpt34x_port_ops,
141 .host_flags = IDE_HFLAGS_HPT34X | IDE_HFLAG_OFF_BOARD,
142 .pio_mask = ATA_PIO5,
143#ifdef CONFIG_HPT34X_AUTODMA
144 .swdma_mask = ATA_SWDMA2,
145 .mwdma_mask = ATA_MWDMA2,
146 .udma_mask = ATA_UDMA2,
147#endif
148 }
149};
150
151static int __devinit hpt34x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
152{
153 const struct ide_port_info *d;
154 u16 pcicmd = 0;
155
156 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
157
158 d = &hpt34x_chipsets[(pcicmd & PCI_COMMAND_MEMORY) ? 1 : 0];
159
160 return ide_pci_init_one(dev, d, NULL);
161}
162
163static const struct pci_device_id hpt34x_pci_tbl[] = {
164 { PCI_VDEVICE(TTI, PCI_DEVICE_ID_TTI_HPT343), 0 },
165 { 0, },
166};
167MODULE_DEVICE_TABLE(pci, hpt34x_pci_tbl);
168
169static struct pci_driver hpt34x_pci_driver = {
170 .name = "HPT34x_IDE",
171 .id_table = hpt34x_pci_tbl,
172 .probe = hpt34x_init_one,
173 .remove = ide_pci_remove,
174 .suspend = ide_pci_suspend,
175 .resume = ide_pci_resume,
176};
177
178static int __init hpt34x_ide_init(void)
179{
180 return ide_pci_register_driver(&hpt34x_pci_driver);
181}
182
183static void __exit hpt34x_ide_exit(void)
184{
185 pci_unregister_driver(&hpt34x_pci_driver);
186}
187
188module_init(hpt34x_ide_init);
189module_exit(hpt34x_ide_exit);
190
191MODULE_AUTHOR("Andre Hedrick");
192MODULE_DESCRIPTION("PCI driver module for Highpoint 34x IDE");
193MODULE_LICENSE("GPL");