usb: dwc3: add delay phy power change quirk

This patch adds delay PHY power change from P0 to P1/P2/P3 when link state
changing from U0 to U1/U2/U3 respectively, and some special platforms can
configure that if it is needed.

[ balbi@ti.com : added DeviceTree binding documentation ]

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>

4 files changed, 12 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 4c77ed6e7c07..a2598d3c7c12 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -24,6 +24,8 @@ Optional properties:
                         P1/P2/P3 transition sequence.
  - snps,del_p1p2p3_quirk: when set core will delay P1/P2/P3 until a certain
                         amount of 8B10B errors occur.
+ - snps,del_phy_power_chg_quirk: when set core will delay PHY power change
+                        from P0 to P1/P2/P3.
 
 This is usually a subnode to DWC3 glue to which it is connected.
 
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index c07651484c60..de6a00969bc7 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -383,6 +383,9 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
         if (dwc->del_p1p2p3_quirk)
                 reg |= DWC3_GUSB3PIPECTL_DEP1P2P3_EN;
 
+        if (dwc->del_phy_power_chg_quirk)
+                reg |= DWC3_GUSB3PIPECTL_DEPOCHANGE;
+
         dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
         mdelay(100);
@@ -766,6 +769,8 @@ static int dwc3_probe(struct platform_device *pdev)
                                 "snps,req_p1p2p3_quirk");
                 dwc->del_p1p2p3_quirk = of_property_read_bool(node,
                                 "snps,del_p1p2p3_quirk");
+                dwc->del_phy_power_chg_quirk = of_property_read_bool(node,
+                                "snps,del_phy_power_chg_quirk");
         } else if (pdata) {
                 dwc->maximum_speed = pdata->maximum_speed;
                 dwc->has_lpm_erratum = pdata->has_lpm_erratum;
@@ -780,6 +785,7 @@ static int dwc3_probe(struct platform_device *pdev)
                 dwc->u2ss_inp3_quirk = pdata->u2ss_inp3_quirk;
                 dwc->req_p1p2p3_quirk = pdata->req_p1p2p3_quirk;
                 dwc->del_p1p2p3_quirk = pdata->del_p1p2p3_quirk;
+                dwc->del_phy_power_chg_quirk = pdata->del_phy_power_chg_quirk;
         }
 
         /* default to superspeed if no maximum_speed passed */
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index b8fbc4a1ee4a..5e8a75c3f3c8 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -181,6 +181,7 @@
 #define DWC3_GUSB3PIPECTL_DEP1P2P3(n)   ((n) << 19)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_MASK DWC3_GUSB3PIPECTL_DEP1P2P3(7)
 #define DWC3_GUSB3PIPECTL_DEP1P2P3_EN   DWC3_GUSB3PIPECTL_DEP1P2P3(1)
+#define DWC3_GUSB3PIPECTL_DEPOCHANGE    (1 << 18)
 #define DWC3_GUSB3PIPECTL_SUSPHY        (1 << 17)
 
 /* Global TX Fifo Size Register */
@@ -689,6 +690,7 @@ struct dwc3_scratchpad_array {
  * @u2ss_inp3_quirk: set if we enable P3 OK for U2/SS Inactive quirk
  * @req_p1p2p3_quirk: set if we enable request p1p2p3 quirk
  * @del_p1p2p3_quirk: set if we enable delay p1p2p3 quirk
+ * @del_phy_power_chg_quirk: set if we enable delay phy power change quirk
  */
 struct dwc3 {
         struct usb_ctrlrequest  *ctrl_req;
@@ -801,6 +803,7 @@ struct dwc3 {
         unsigned                u2ss_inp3_quirk:1;
         unsigned                req_p1p2p3_quirk:1;
         unsigned                del_p1p2p3_quirk:1;
+        unsigned                del_phy_power_chg_quirk:1;
 };
 
 /* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h
index a421cecd6c16..ae67151dc870 100644
--- a/drivers/usb/dwc3/platform_data.h
+++ b/drivers/usb/dwc3/platform_data.h
@@ -33,4 +33,5 @@ struct dwc3_platform_data {
         unsigned u2ss_inp3_quirk:1;
         unsigned req_p1p2p3_quirk:1;
         unsigned del_p1p2p3_quirk:1;
+        unsigned del_phy_power_chg_quirk:1;
 };