diff options
author | Tony Lindgren <tony@atomide.com> | 2006-09-25 05:41:38 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2006-09-25 05:41:38 -0400 |
commit | 4196dd6baabccdef3786c1d51d75e041313af848 (patch) | |
tree | a12f643d5d358fa5259f91cce333f6cd2df97702 | |
parent | eaca33df44c0d00bc12b16e72b728ade25adf14d (diff) |
ARM: OMAP: Reset GPIO irq state after free_irq()
This is needed to reset GPIO after free_irq().
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index b27ba0ee00fb..96d754833704 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -662,6 +662,14 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | |||
662 | } | 662 | } |
663 | } | 663 | } |
664 | 664 | ||
665 | static void _reset_gpio(struct gpio_bank *bank, int gpio) | ||
666 | { | ||
667 | _set_gpio_direction(bank, get_gpio_index(gpio), 1); | ||
668 | _set_gpio_irqenable(bank, gpio, 0); | ||
669 | _clear_gpio_irqstatus(bank, gpio); | ||
670 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE); | ||
671 | } | ||
672 | |||
665 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ | 673 | /* Use disable_irq_wake() and enable_irq_wake() functions from drivers */ |
666 | static int gpio_wake_enable(unsigned int irq, unsigned int enable) | 674 | static int gpio_wake_enable(unsigned int irq, unsigned int enable) |
667 | { | 675 | { |
@@ -696,7 +704,9 @@ int omap_request_gpio(int gpio) | |||
696 | } | 704 | } |
697 | bank->reserved_map |= (1 << get_gpio_index(gpio)); | 705 | bank->reserved_map |= (1 << get_gpio_index(gpio)); |
698 | 706 | ||
699 | /* Set trigger to none. You need to enable the trigger after request_irq */ | 707 | /* Set trigger to none. You need to enable the desired trigger with |
708 | * request_irq() or set_irq_type(). | ||
709 | */ | ||
700 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE); | 710 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQT_NOEDGE); |
701 | 711 | ||
702 | #ifdef CONFIG_ARCH_OMAP15XX | 712 | #ifdef CONFIG_ARCH_OMAP15XX |
@@ -756,9 +766,7 @@ void omap_free_gpio(int gpio) | |||
756 | } | 766 | } |
757 | #endif | 767 | #endif |
758 | bank->reserved_map &= ~(1 << get_gpio_index(gpio)); | 768 | bank->reserved_map &= ~(1 << get_gpio_index(gpio)); |
759 | _set_gpio_direction(bank, get_gpio_index(gpio), 1); | 769 | _reset_gpio(bank, gpio); |
760 | _set_gpio_irqenable(bank, gpio, 0); | ||
761 | _clear_gpio_irqstatus(bank, gpio); | ||
762 | spin_unlock(&bank->lock); | 770 | spin_unlock(&bank->lock); |
763 | } | 771 | } |
764 | 772 | ||
@@ -898,6 +906,14 @@ static void gpio_irq_handler(unsigned int irq, struct irqdesc *desc, | |||
898 | 906 | ||
899 | } | 907 | } |
900 | 908 | ||
909 | static void gpio_irq_shutdown(unsigned int irq) | ||
910 | { | ||
911 | unsigned int gpio = irq - IH_GPIO_BASE; | ||
912 | struct gpio_bank *bank = get_gpio_bank(gpio); | ||
913 | |||
914 | _reset_gpio(bank, gpio); | ||
915 | } | ||
916 | |||
901 | static void gpio_ack_irq(unsigned int irq) | 917 | static void gpio_ack_irq(unsigned int irq) |
902 | { | 918 | { |
903 | unsigned int gpio = irq - IH_GPIO_BASE; | 919 | unsigned int gpio = irq - IH_GPIO_BASE; |
@@ -946,6 +962,7 @@ static void mpuio_unmask_irq(unsigned int irq) | |||
946 | 962 | ||
947 | static struct irq_chip gpio_irq_chip = { | 963 | static struct irq_chip gpio_irq_chip = { |
948 | .name = "GPIO", | 964 | .name = "GPIO", |
965 | .shutdown = gpio_irq_shutdown, | ||
949 | .ack = gpio_ack_irq, | 966 | .ack = gpio_ack_irq, |
950 | .mask = gpio_mask_irq, | 967 | .mask = gpio_mask_irq, |
951 | .unmask = gpio_unmask_irq, | 968 | .unmask = gpio_unmask_irq, |