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author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-09-07 07:36:46 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-01 11:41:04 -0400 |
commit | 40df2d1d8538865341a4cb9d4b7a375296517ad2 (patch) | |
tree | 2b97595b5d31917432af57e4d9a70f8a459d8f65 | |
parent | 40d192b63d079db1f76cec9ae8ccbf461fda23e4 (diff) |
[ARM] Update Xscale and Xscale3 PTE mappings
Use 'shared device' mappings for devices, and use the standard
bit combinations for Xscale3.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mm/proc-xsc3.S | 14 | ||||
-rw-r--r-- | arch/arm/mm/proc-xscale.S | 2 |
2 files changed, 7 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 9c5318e476f3..22ecef533a84 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
@@ -345,23 +345,21 @@ ENTRY(cpu_xsc3_switch_mm) | |||
345 | * cpu_xsc3_set_pte_ext(ptep, pte, ext) | 345 | * cpu_xsc3_set_pte_ext(ptep, pte, ext) |
346 | * | 346 | * |
347 | * Set a PTE and flush it out | 347 | * Set a PTE and flush it out |
348 | * | ||
349 | */ | 348 | */ |
350 | |||
351 | cpu_xsc3_mt_table: | 349 | cpu_xsc3_mt_table: |
352 | .long 0x00 @ L_PTE_MT_UNCACHED | 350 | .long 0x00 @ L_PTE_MT_UNCACHED |
353 | .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE | 351 | .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE |
354 | .long PTE_EXT_TEX(5) | PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH | 352 | .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH |
355 | .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK | 353 | .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK |
356 | .long 0x00 @ L_PTE_MT_DEV_SHARED | 354 | .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED |
357 | .long 0x00 @ unused | 355 | .long 0x00 @ unused |
358 | .long 0x00 @ L_PTE_MT_MINICACHE (not present) | 356 | .long 0x00 @ L_PTE_MT_MINICACHE (not present) |
359 | .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC (not present?) | 357 | .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC (not present?) |
360 | .long 0x00 @ unused | 358 | .long 0x00 @ unused |
361 | .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC | 359 | .long PTE_EXT_TEX(1) @ L_PTE_MT_DEV_WC |
362 | .long 0x00 @ unused | 360 | .long 0x00 @ unused |
363 | .long PTE_EXT_TEX(5) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED | 361 | .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED |
364 | .long 0x00 @ L_PTE_MT_DEV_NONSHARED | 362 | .long PTE_EXT_TEX(2) @ L_PTE_MT_DEV_NONSHARED |
365 | .long 0x00 @ L_PTE_MT_DEV_IXP2000 (not present) | 363 | .long 0x00 @ L_PTE_MT_DEV_IXP2000 (not present) |
366 | .long 0x00 @ unused | 364 | .long 0x00 @ unused |
367 | .long 0x00 @ unused | 365 | .long 0x00 @ unused |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 1e0c3bb19058..534b4be86ae5 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -434,7 +434,7 @@ cpu_xscale_mt_table: | |||
434 | .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE | 434 | .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE |
435 | .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH | 435 | .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH |
436 | .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK | 436 | .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK |
437 | .long 0x00 @ L_PTE_MT_DEV_SHARED | 437 | .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED |
438 | .long 0x00 @ unused | 438 | .long 0x00 @ unused |
439 | .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE | 439 | .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE |
440 | .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC | 440 | .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC |