drm/i915: refactor ilk display interrupt handling

- Use a for_each_loop and add the corresponding #defines.
- Drop the _ILK postfix on the existing DE_PIPE_VBLANK macro for
  consistency with everything else.
- Also use macros (and add the missing one for plane flips) for the
  ivb display interrupt handler.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
[danvet: Drop the useless parens that Ville spotted.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 26 insertions, 31 deletions

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index a8a258ed601a..a228176676b2 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1541,6 +1541,7 @@ static void cpt_irq_handler(struct drm_device *dev, u32 pch_iir)
 static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
+        enum pipe pipe;
 
         if (de_iir & DE_AUX_CHANNEL_A)
                 dp_aux_irq_handler(dev);
@@ -1548,37 +1549,26 @@ static void ilk_display_irq_handler(struct drm_device *dev, u32 de_iir)
         if (de_iir & DE_GSE)
                 intel_opregion_asle_intr(dev);
 
-        if (de_iir & DE_PIPEA_VBLANK)
-                drm_handle_vblank(dev, 0);
-
-        if (de_iir & DE_PIPEB_VBLANK)
-                drm_handle_vblank(dev, 1);
-
         if (de_iir & DE_POISON)
                 DRM_ERROR("Poison interrupt\n");
 
-        if (de_iir & DE_PIPEA_FIFO_UNDERRUN)
-                if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_A, false))
-                        DRM_DEBUG_DRIVER("Pipe A FIFO underrun\n");
-
-        if (de_iir & DE_PIPEB_FIFO_UNDERRUN)
-                if (intel_set_cpu_fifo_underrun_reporting(dev, PIPE_B, false))
-                        DRM_DEBUG_DRIVER("Pipe B FIFO underrun\n");
-
-        if (de_iir & DE_PIPEA_CRC_DONE)
-                i9xx_pipe_crc_irq_handler(dev, PIPE_A);
+        for_each_pipe(pipe) {
+                if (de_iir & DE_PIPE_VBLANK(pipe))
+                        drm_handle_vblank(dev, pipe);
 
-        if (de_iir & DE_PIPEB_CRC_DONE)
-                i9xx_pipe_crc_irq_handler(dev, PIPE_B);
+                if (de_iir & DE_PIPE_FIFO_UNDERRUN(pipe))
+                        if (intel_set_cpu_fifo_underrun_reporting(dev, pipe, false))
+                                DRM_DEBUG_DRIVER("Pipe %c FIFO underrun\n",
+                                                 pipe_name(pipe));
 
-        if (de_iir & DE_PLANEA_FLIP_DONE) {
-                intel_prepare_page_flip(dev, 0);
-                intel_finish_page_flip_plane(dev, 0);
-        }
+                if (de_iir & DE_PIPE_CRC_DONE(pipe))
+                        i9xx_pipe_crc_irq_handler(dev, pipe);
 
-        if (de_iir & DE_PLANEB_FLIP_DONE) {
-                intel_prepare_page_flip(dev, 1);
-                intel_finish_page_flip_plane(dev, 1);
+                /* plane/pipes map 1:1 on ilk+ */
+                if (de_iir & DE_PLANE_FLIP_DONE(pipe)) {
+                        intel_prepare_page_flip(dev, pipe);
+                        intel_finish_page_flip_plane(dev, pipe);
+                }
         }
 
         /* check event from PCH */
@@ -1613,9 +1603,11 @@ static void ivb_display_irq_handler(struct drm_device *dev, u32 de_iir)
                 intel_opregion_asle_intr(dev);
 
         for_each_pipe(i) {
-                if (de_iir & (DE_PIPEA_VBLANK_IVB << (5 * i)))
+                if (de_iir & (DE_PIPE_VBLANK_IVB(i)))
                         drm_handle_vblank(dev, i);
-                if (de_iir & (DE_PLANEA_FLIP_DONE_IVB << (5 * i))) {
+
+                /* plane/pipes map 1:1 on ilk+ */
+                if (de_iir & DE_PLANE_FLIP_DONE_IVB(i)) {
                         intel_prepare_page_flip(dev, i);
                         intel_finish_page_flip_plane(dev, i);
                 }
@@ -2018,7 +2010,7 @@ static int ironlake_enable_vblank(struct drm_device *dev, int pipe)
         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
         unsigned long irqflags;
         uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :
-                                                     DE_PIPE_VBLANK_ILK(pipe);
+                                                     DE_PIPE_VBLANK(pipe);
 
         if (!i915_pipe_enabled(dev, pipe))
                 return -EINVAL;
@@ -2076,7 +2068,7 @@ static void ironlake_disable_vblank(struct drm_device *dev, int pipe)
         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
         unsigned long irqflags;
         uint32_t bit = (INTEL_INFO(dev)->gen >= 7) ? DE_PIPE_VBLANK_IVB(pipe) :
-                                                     DE_PIPE_VBLANK_ILK(pipe);
+                                                     DE_PIPE_VBLANK(pipe);
 
         spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
         ironlake_disable_display_irq(dev_priv, bit);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9785f7d031a4..3591dbb58f7b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3926,6 +3926,7 @@
 #define DE_SPRITEA_FLIP_DONE    (1 << 28)
 #define DE_PLANEB_FLIP_DONE     (1 << 27)
 #define DE_PLANEA_FLIP_DONE     (1 << 26)
+#define DE_PLANE_FLIP_DONE(plane) (1 << (26 + (plane)))
 #define DE_PCU_EVENT            (1 << 25)
 #define DE_GTT_FAULT            (1 << 24)
 #define DE_POISON               (1 << 23)
@@ -3942,12 +3943,15 @@
 #define DE_PIPEB_CRC_DONE       (1 << 10)
 #define DE_PIPEB_FIFO_UNDERRUN  (1 << 8)
 #define DE_PIPEA_VBLANK         (1 << 7)
+#define DE_PIPE_VBLANK(pipe)    (1 << (7 + 8*(pipe)))
 #define DE_PIPEA_EVEN_FIELD     (1 << 6)
 #define DE_PIPEA_ODD_FIELD      (1 << 5)
 #define DE_PIPEA_LINE_COMPARE   (1 << 4)
 #define DE_PIPEA_VSYNC          (1 << 3)
 #define DE_PIPEA_CRC_DONE       (1 << 2)
+#define DE_PIPE_CRC_DONE(pipe)  (1 << (2 + 8*(pipe)))
 #define DE_PIPEA_FIFO_UNDERRUN  (1 << 0)
+#define DE_PIPE_FIFO_UNDERRUN(pipe)  (1 << (8*(pipe)))
 
 /* More Ivybridge lolz */
 #define DE_ERR_INT_IVB                  (1<<30)
@@ -3963,9 +3967,8 @@
 #define DE_PIPEB_VBLANK_IVB             (1<<5)
 #define DE_SPRITEA_FLIP_DONE_IVB        (1<<4)
 #define DE_PLANEA_FLIP_DONE_IVB         (1<<3)
+#define DE_PLANE_FLIP_DONE_IVB(plane)   (1<< (3 + 5*(plane)))
 #define DE_PIPEA_VBLANK_IVB             (1<<0)
-
-#define DE_PIPE_VBLANK_ILK(pipe)        (1 << ((pipe * 8) + 7))
 #define DE_PIPE_VBLANK_IVB(pipe)        (1 << (pipe * 5))
 
 #define VLV_MASTER_IER                  0x4400c /* Gunit master IER */