diff options
author | Simon Horman <horms@verge.net.au> | 2012-11-12 21:41:09 -0500 |
---|---|---|
committer | Simon Horman <horms@verge.net.au> | 2012-11-12 21:41:09 -0500 |
commit | 40937f7460041864c003d49b1f2ddcb32d5044f3 (patch) | |
tree | 01586f0aa4f69ca87b556adbbe095ea791d6ab92 | |
parent | d5b689089d7db3851c4d5d6b3727d22ef44d2023 (diff) |
Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode"
This reverts commit 865d90f80384d62e6fbe835159cb674dec32ccb5.
The code changes the flags of the wrong cpus - which breaks the whole
bootup of secondary CPUs.
Cc: Bastian Hecht <hechtb@gmail.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
-rw-r--r-- | arch/arm/mach-shmobile/smp-emev2.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/arch/arm/mach-shmobile/smp-emev2.c b/arch/arm/mach-shmobile/smp-emev2.c index 535426c306bd..f67456286280 100644 --- a/arch/arm/mach-shmobile/smp-emev2.c +++ b/arch/arm/mach-shmobile/smp-emev2.c | |||
@@ -32,8 +32,24 @@ | |||
32 | 32 | ||
33 | #define EMEV2_SCU_BASE 0x1e000000 | 33 | #define EMEV2_SCU_BASE 0x1e000000 |
34 | 34 | ||
35 | static DEFINE_SPINLOCK(scu_lock); | ||
35 | static void __iomem *scu_base; | 36 | static void __iomem *scu_base; |
36 | 37 | ||
38 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) | ||
39 | { | ||
40 | unsigned long tmp; | ||
41 | |||
42 | /* we assume this code is running on a different cpu | ||
43 | * than the one that is changing coherency setting */ | ||
44 | spin_lock(&scu_lock); | ||
45 | tmp = readl(scu_base + 8); | ||
46 | tmp &= ~clr; | ||
47 | tmp |= set; | ||
48 | writel(tmp, scu_base + 8); | ||
49 | spin_unlock(&scu_lock); | ||
50 | |||
51 | } | ||
52 | |||
37 | static unsigned int __init emev2_get_core_count(void) | 53 | static unsigned int __init emev2_get_core_count(void) |
38 | { | 54 | { |
39 | if (!scu_base) { | 55 | if (!scu_base) { |
@@ -79,7 +95,7 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct * | |||
79 | cpu = cpu_logical_map(cpu); | 95 | cpu = cpu_logical_map(cpu); |
80 | 96 | ||
81 | /* enable cache coherency */ | 97 | /* enable cache coherency */ |
82 | scu_power_mode(scu_base, 0); | 98 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); |
83 | 99 | ||
84 | /* Tell ROM loader about our vector (in headsmp.S) */ | 100 | /* Tell ROM loader about our vector (in headsmp.S) */ |
85 | emev2_set_boot_vector(__pa(shmobile_secondary_vector)); | 101 | emev2_set_boot_vector(__pa(shmobile_secondary_vector)); |
@@ -90,10 +106,12 @@ static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct * | |||
90 | 106 | ||
91 | static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) | 107 | static void __init emev2_smp_prepare_cpus(unsigned int max_cpus) |
92 | { | 108 | { |
109 | int cpu = cpu_logical_map(0); | ||
110 | |||
93 | scu_enable(scu_base); | 111 | scu_enable(scu_base); |
94 | 112 | ||
95 | /* enable cache coherency on CPU0 */ | 113 | /* enable cache coherency on CPU0 */ |
96 | scu_power_mode(scu_base, 0); | 114 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); |
97 | } | 115 | } |
98 | 116 | ||
99 | static void __init emev2_smp_init_cpus(void) | 117 | static void __init emev2_smp_init_cpus(void) |