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authorAlexander Shiyan <shc_work@mail.ru>2013-05-13 13:07:26 -0400
committerOlof Johansson <olof@lixom.net>2013-06-11 18:47:21 -0400
commit3f0bcaa5e91d0752ccaf2d8d6aa1514dae5e8264 (patch)
tree7a7c21b2c047200922338d992831b8bca93f6578
parentba18ec214e4a8a45a164bbb4b2a8af401dd5b408 (diff)
ARM: clps711x: autcpu12: Add support for NOR flash
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/mach-clps711x/board-autcpu12.c39
-rw-r--r--arch/arm/mach-clps711x/include/mach/autcpu12.h5
2 files changed, 37 insertions, 7 deletions
diff --git a/arch/arm/mach-clps711x/board-autcpu12.c b/arch/arm/mach-clps711x/board-autcpu12.c
index 78b528aa3ba7..3e22d0b1a9c5 100644
--- a/arch/arm/mach-clps711x/board-autcpu12.c
+++ b/arch/arm/mach-clps711x/board-autcpu12.c
@@ -26,6 +26,7 @@
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/ioport.h> 27#include <linux/ioport.h>
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/mtd/physmap.h>
29#include <linux/mtd/partitions.h> 30#include <linux/mtd/partitions.h>
30#include <linux/mtd/nand-gpio.h> 31#include <linux/mtd/nand-gpio.h>
31#include <linux/platform_device.h> 32#include <linux/platform_device.h>
@@ -45,12 +46,17 @@
45#include "common.h" 46#include "common.h"
46#include "devices.h" 47#include "devices.h"
47 48
48#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300) 49/* NOR flash */
49#define AUTCPU12_CS8900_IRQ (IRQ_EINT3) 50#define AUTCPU12_FLASH_BASE (CS0_PHYS_BASE)
50 51
52/* SmartMedia flash */
51#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000) 53#define AUTCPU12_SMC_BASE (CS1_PHYS_BASE + 0x06000000)
52#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10) 54#define AUTCPU12_SMC_SEL_BASE (AUTCPU12_SMC_BASE + 0x10)
53 55
56/* Ethernet */
57#define AUTCPU12_CS8900_BASE (CS2_PHYS_BASE + 0x300)
58#define AUTCPU12_CS8900_IRQ (IRQ_EINT3)
59
54/* NAND flash */ 60/* NAND flash */
55#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO) 61#define AUTCPU12_MMGPIO_BASE (CLPS711X_NR_GPIO)
56#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */ 62#define AUTCPU12_SMC_NCE (AUTCPU12_MMGPIO_BASE + 0) /* Bit 0 */
@@ -160,9 +166,38 @@ static const struct gpio autcpu12_gpios[] __initconst = {
160 { AUTCPU12_DPOT_UD, GPIOF_OUT_INIT_LOW, "DPOT UD" }, 166 { AUTCPU12_DPOT_UD, GPIOF_OUT_INIT_LOW, "DPOT UD" },
161}; 167};
162 168
169static struct mtd_partition autcpu12_flash_partitions[] = {
170 {
171 .name = "NOR.0",
172 .offset = 0,
173 .size = MTDPART_SIZ_FULL,
174 },
175};
176
177static struct physmap_flash_data autcpu12_flash_pdata = {
178 .width = 4,
179 .parts = autcpu12_flash_partitions,
180 .nr_parts = ARRAY_SIZE(autcpu12_flash_partitions),
181};
182
183static struct resource autcpu12_flash_resources[] __initdata = {
184 DEFINE_RES_MEM(AUTCPU12_FLASH_BASE, SZ_8M),
185};
186
187static struct platform_device autcpu12_flash_pdev __initdata = {
188 .name = "physmap-flash",
189 .id = 0,
190 .resource = autcpu12_flash_resources,
191 .num_resources = ARRAY_SIZE(autcpu12_flash_resources),
192 .dev = {
193 .platform_data = &autcpu12_flash_pdata,
194 },
195};
196
163static void __init autcpu12_init(void) 197static void __init autcpu12_init(void)
164{ 198{
165 clps711x_devices_init(); 199 clps711x_devices_init();
200 platform_device_register(&autcpu12_flash_pdev);
166 platform_device_register_simple("video-clps711x", 0, NULL, 0); 201 platform_device_register_simple("video-clps711x", 0, NULL, 0);
167 platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource, 202 platform_device_register_simple("cs89x0", 0, autcpu12_cs8900_resource,
168 ARRAY_SIZE(autcpu12_cs8900_resource)); 203 ARRAY_SIZE(autcpu12_cs8900_resource));
diff --git a/arch/arm/mach-clps711x/include/mach/autcpu12.h b/arch/arm/mach-clps711x/include/mach/autcpu12.h
index b95d60a79b30..0db6f1869f01 100644
--- a/arch/arm/mach-clps711x/include/mach/autcpu12.h
+++ b/arch/arm/mach-clps711x/include/mach/autcpu12.h
@@ -20,11 +20,6 @@
20#ifndef __ASM_ARCH_AUTCPU12_H 20#ifndef __ASM_ARCH_AUTCPU12_H
21#define __ASM_ARCH_AUTCPU12_H 21#define __ASM_ARCH_AUTCPU12_H
22 22
23/*
24 * The flash bank is wired to chip select 0
25 */
26#define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */
27
28/* offset for device specific information structure */ 23/* offset for device specific information structure */
29#define AUTCPU12_LCDINFO_OFFS (0x00010000) 24#define AUTCPU12_LCDINFO_OFFS (0x00010000)
30 25