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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-03-06 08:36:28 -0500
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-03-15 08:34:15 -0400
commit3dff629bd8b98759b2a652d0a2b9eda6fb085b18 (patch)
tree25520e96dee92c90cf54a7b4e815536f2e340c78
parentb56479f233d7205466037ebc8fb2d1851459c86c (diff)
sh-pfc: r8a7740: Remove SDHI and MMCIF function GPIOS
All r8a7740 platforms now use the pinctrl API to control the SDHI and MMCIF pins, the corresponding function GPIOS are unused. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7740.c35
1 files changed, 0 insertions, 35 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
index de1212d0912a..3621d3e81fc3 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -2373,26 +2373,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
2373 GPIO_FN(SIM_D_PORT22), /* SIM_D Port 22/199 */ 2373 GPIO_FN(SIM_D_PORT22), /* SIM_D Port 22/199 */
2374 GPIO_FN(SIM_D_PORT199), 2374 GPIO_FN(SIM_D_PORT199),
2375 2375
2376 /* SDHI0 */
2377 GPIO_FN(SDHI0_D0), GPIO_FN(SDHI0_D1), GPIO_FN(SDHI0_D2),
2378 GPIO_FN(SDHI0_D3), GPIO_FN(SDHI0_CD), GPIO_FN(SDHI0_WP),
2379 GPIO_FN(SDHI0_CMD), GPIO_FN(SDHI0_CLK),
2380
2381 /* SDHI1 */
2382 GPIO_FN(SDHI1_D0), GPIO_FN(SDHI1_D1), GPIO_FN(SDHI1_D2),
2383 GPIO_FN(SDHI1_D3), GPIO_FN(SDHI1_CD), GPIO_FN(SDHI1_WP),
2384 GPIO_FN(SDHI1_CMD), GPIO_FN(SDHI1_CLK),
2385
2386 /* SDHI2 */
2387 GPIO_FN(SDHI2_D0), GPIO_FN(SDHI2_D1), GPIO_FN(SDHI2_D2),
2388 GPIO_FN(SDHI2_D3), GPIO_FN(SDHI2_CLK), GPIO_FN(SDHI2_CMD),
2389
2390 GPIO_FN(SDHI2_CD_PORT24), /* MSEL5CR_19_0 */
2391 GPIO_FN(SDHI2_WP_PORT25),
2392
2393 GPIO_FN(SDHI2_WP_PORT177), /* MSEL5CR_19_1 */
2394 GPIO_FN(SDHI2_CD_PORT202),
2395
2396 /* MSIOF2 */ 2376 /* MSIOF2 */
2397 GPIO_FN(MSIOF2_TXD), GPIO_FN(MSIOF2_RXD), GPIO_FN(MSIOF2_TSCK), 2377 GPIO_FN(MSIOF2_TXD), GPIO_FN(MSIOF2_RXD), GPIO_FN(MSIOF2_TSCK),
2398 GPIO_FN(MSIOF2_SS2), GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_SS1), 2378 GPIO_FN(MSIOF2_SS2), GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_SS1),
@@ -2437,21 +2417,6 @@ static const struct pinmux_func pinmux_func_gpios[] = {
2437 GPIO_FN(MEMC_WAIT), GPIO_FN(MEMC_DREQ1), GPIO_FN(MEMC_BUSCLK), 2417 GPIO_FN(MEMC_WAIT), GPIO_FN(MEMC_DREQ1), GPIO_FN(MEMC_BUSCLK),
2438 GPIO_FN(MEMC_A0), 2418 GPIO_FN(MEMC_A0),
2439 2419
2440 /* MMC */
2441 GPIO_FN(MMC0_D0_PORT68), GPIO_FN(MMC0_D1_PORT69),
2442 GPIO_FN(MMC0_D2_PORT70), GPIO_FN(MMC0_D3_PORT71),
2443 GPIO_FN(MMC0_D4_PORT72), GPIO_FN(MMC0_D5_PORT73),
2444 GPIO_FN(MMC0_D6_PORT74), GPIO_FN(MMC0_D7_PORT75),
2445 GPIO_FN(MMC0_CLK_PORT66),
2446 GPIO_FN(MMC0_CMD_PORT67), /* MSEL4CR_15_0 */
2447
2448 GPIO_FN(MMC1_D0_PORT149), GPIO_FN(MMC1_D1_PORT148),
2449 GPIO_FN(MMC1_D2_PORT147), GPIO_FN(MMC1_D3_PORT146),
2450 GPIO_FN(MMC1_D4_PORT145), GPIO_FN(MMC1_D5_PORT144),
2451 GPIO_FN(MMC1_D6_PORT143), GPIO_FN(MMC1_D7_PORT142),
2452 GPIO_FN(MMC1_CLK_PORT103),
2453 GPIO_FN(MMC1_CMD_PORT104), /* MSEL4CR_15_1 */
2454
2455 /* MSIOF0 */ 2420 /* MSIOF0 */
2456 GPIO_FN(MSIOF0_SS1), GPIO_FN(MSIOF0_SS2), GPIO_FN(MSIOF0_RXD), 2421 GPIO_FN(MSIOF0_SS1), GPIO_FN(MSIOF0_SS2), GPIO_FN(MSIOF0_RXD),
2457 GPIO_FN(MSIOF0_TXD), GPIO_FN(MSIOF0_MCK0), GPIO_FN(MSIOF0_MCK1), 2422 GPIO_FN(MSIOF0_TXD), GPIO_FN(MSIOF0_MCK0), GPIO_FN(MSIOF0_MCK1),