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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-06-04 01:11:24 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-06-11 04:32:22 -0400
commit3dd691ef07abd55154de913b241f9804fc78b979 (patch)
treee42d9a3f7578498dbcf315a6d0532727b2f0aabc
parentb6bb9a6426cab90216763374b9d2ebc4abc48016 (diff)
ARM: shmobile: r8a7778: add support HSPI clock
This patch adds r8a7778 HSPI clock support. It also adds shyway_clk which is requiested from sh-hspi driver Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7778.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7778.c b/arch/arm/mach-shmobile/clock-r8a7778.c
index 1386c59b8e31..c2c1895b9846 100644
--- a/arch/arm/mach-shmobile/clock-r8a7778.c
+++ b/arch/arm/mach-shmobile/clock-r8a7778.c
@@ -108,6 +108,7 @@ enum {
108 MSTP030, 108 MSTP030,
109 MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021, 109 MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
110 MSTP016, MSTP015, 110 MSTP016, MSTP015,
111 MSTP007,
111 MSTP_NR }; 112 MSTP_NR };
112 113
113static struct clk mstp_clks[MSTP_NR] = { 114static struct clk mstp_clks[MSTP_NR] = {
@@ -127,10 +128,12 @@ static struct clk mstp_clks[MSTP_NR] = {
127 [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */ 128 [MSTP021] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 21, 0), /* SCIF5 */
128 [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */ 129 [MSTP016] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 16, 0), /* TMU0 */
129 [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */ 130 [MSTP015] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 15, 0), /* TMU1 */
131 [MSTP007] = SH_CLK_MSTP32(&p_clk, MSTPCR0, 7, 0), /* HSPI */
130}; 132};
131 133
132static struct clk_lookup lookups[] = { 134static struct clk_lookup lookups[] = {
133 /* main */ 135 /* main */
136 CLKDEV_CON_ID("shyway_clk", &s_clk),
134 CLKDEV_CON_ID("peripheral_clk", &p_clk), 137 CLKDEV_CON_ID("peripheral_clk", &p_clk),
135 138
136 /* MSTP32 clocks */ 139 /* MSTP32 clocks */
@@ -150,6 +153,9 @@ static struct clk_lookup lookups[] = {
150 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */ 153 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
151 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */ 154 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
152 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */ 155 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
156 CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
157 CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
158 CLKDEV_DEV_ID("sh-hspi.2", &mstp_clks[MSTP007]), /* HSPI2 */
153}; 159};
154 160
155void __init r8a7778_clock_init(void) 161void __init r8a7778_clock_init(void)