Merge tag 'davinci-for-v3.9/soc' of git://gitorious.org/linux-davinci/linux-davinci into next/soc

From Sekhar Nori:
DaVinci SoC changes for v3.9

This pull request:

1) Fixes a bug with the way SPI devices were registered on DA850
2) Adds support for DSP clock and resetting the DSP on DA850
3) Fixes checkpatch issue with some existing files.

* tag 'davinci-for-v3.9/soc' of git://gitorious.org/linux-davinci/linux-davinci:
  ARM: davinci: da850: add dsp clock definition
  ARM: davinci: psc: introduce reset API
  ARM: davinci: psc.c: change pr_warning() to pr_warn()
  ARM: davinci: devices-da8xx.c: change pr_warning() to pr_warn()
  ARM: davinci: da8xx_register_spi() should not register SPI board info

Signed-off-by: Olof Johansson <olof@lixom.net>

11 files changed, 117 insertions, 24 deletions

diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index e3742716cbaa..6da25eebf911 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -652,8 +652,13 @@ static __init void da830_evm_init(void)
         if (ret)
                 pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
 
-        ret = da8xx_register_spi(0, da830evm_spi_info,
-                                 ARRAY_SIZE(da830evm_spi_info));
+        ret = spi_register_board_info(da830evm_spi_info,
+                                      ARRAY_SIZE(da830evm_spi_info));
+        if (ret)
+                pr_warn("%s: spi info registration failed: %d\n", __func__,
+                        ret);
+
+        ret = da8xx_register_spi_bus(0, ARRAY_SIZE(da830evm_spi_info));
         if (ret)
                 pr_warning("da830_evm_init: spi 0 registration failed: %d\n",
                            ret);
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 3b3356097bb0..3a76a47df39c 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -1565,8 +1565,13 @@ static __init void da850_evm_init(void)
 
         da850_vpif_init();
 
-        ret = da8xx_register_spi(1, da850evm_spi_info,
-                                 ARRAY_SIZE(da850evm_spi_info));
+        ret = spi_register_board_info(da850evm_spi_info,
+                                      ARRAY_SIZE(da850evm_spi_info));
+        if (ret)
+                pr_warn("%s: spi info registration failed: %d\n", __func__,
+                        ret);
+
+        ret = da8xx_register_spi_bus(1, ARRAY_SIZE(da850evm_spi_info));
         if (ret)
                 pr_warning("da850_evm_init: spi 1 registration failed: %d\n",
                                 ret);
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index b0df578bf744..9549d53aa63f 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -529,8 +529,13 @@ static void __init mityomapl138_init(void)
 
         mityomapl138_setup_nand();
 
-        ret = da8xx_register_spi(1, mityomapl138_spi_flash_info,
-                               ARRAY_SIZE(mityomapl138_spi_flash_info));
+        ret = spi_register_board_info(mityomapl138_spi_flash_info,
+                                      ARRAY_SIZE(mityomapl138_spi_flash_info));
+        if (ret)
+                pr_warn("spi info registration failed: %d\n", ret);
+
+        ret = da8xx_register_spi_bus(1,
+                                     ARRAY_SIZE(mityomapl138_spi_flash_info));
         if (ret)
                 pr_warning("spi 1 registration failed: %d\n", ret);
 
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 34668ead53c7..d458558ee84a 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -52,6 +52,40 @@ static void __clk_disable(struct clk *clk)
                 __clk_disable(clk->parent);
 }
 
+int davinci_clk_reset(struct clk *clk, bool reset)
+{
+        unsigned long flags;
+
+        if (clk == NULL || IS_ERR(clk))
+                return -EINVAL;
+
+        spin_lock_irqsave(&clockfw_lock, flags);
+        if (clk->flags & CLK_PSC)
+                davinci_psc_reset(clk->gpsc, clk->lpsc, reset);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+
+        return 0;
+}
+EXPORT_SYMBOL(davinci_clk_reset);
+
+int davinci_clk_reset_assert(struct clk *clk)
+{
+        if (clk == NULL || IS_ERR(clk) || !clk->reset)
+                return -EINVAL;
+
+        return clk->reset(clk, true);
+}
+EXPORT_SYMBOL(davinci_clk_reset_assert);
+
+int davinci_clk_reset_deassert(struct clk *clk)
+{
+        if (clk == NULL || IS_ERR(clk) || !clk->reset)
+                return -EINVAL;
+
+        return clk->reset(clk, false);
+}
+EXPORT_SYMBOL(davinci_clk_reset_deassert);
+
 int clk_enable(struct clk *clk)
 {
         unsigned long flags;
@@ -535,7 +569,7 @@ int davinci_set_refclk_rate(unsigned long rate)
 }
 
 int __init davinci_clk_init(struct clk_lookup *clocks)
-  {
+{
         struct clk_lookup *c;
         struct clk *clk;
         size_t num_clocks = 0;
@@ -576,6 +610,9 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
                 if (clk->lpsc)
                         clk->flags |= CLK_PSC;
 
+                if (clk->flags & PSC_LRST)
+                        clk->reset = davinci_clk_reset;
+
                 clk_register(clk);
                 num_clocks++;
 
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 46f0f1bf1a4c..8694b395fc92 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -103,6 +103,7 @@ struct clk {
         unsigned long (*recalc) (struct clk *);
         int (*set_rate) (struct clk *clk, unsigned long rate);
         int (*round_rate) (struct clk *clk, unsigned long rate);
+        int (*reset) (struct clk *clk, bool reset);
 };
 
 /* Clock flags: SoC-specific flags start at BIT(16) */
@@ -112,6 +113,7 @@ struct clk {
 #define PRE_PLL                 BIT(4) /* source is before PLL mult/div */
 #define PSC_SWRSTDISABLE        BIT(5) /* Disable state is SwRstDisable */
 #define PSC_FORCE               BIT(6) /* Force module state transtition */
+#define PSC_LRST                BIT(8) /* Use local reset on enable/disable */
 
 #define CLK(dev, con, ck)       \
         {                       \
@@ -126,6 +128,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
 int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
 int davinci_set_refclk_rate(unsigned long rate);
 int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
+int davinci_clk_reset(struct clk *clk, bool reset);
 
 extern struct platform_device davinci_wdt_device;
 extern void davinci_watchdog_reset(struct platform_device *);
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 6b9154e9f908..0c4a26ddebba 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -76,6 +76,13 @@ static struct clk pll0_aux_clk = {
         .flags          = CLK_PLL | PRE_PLL,
 };
 
+static struct clk pll0_sysclk1 = {
+        .name           = "pll0_sysclk1",
+        .parent         = &pll0_clk,
+        .flags          = CLK_PLL,
+        .div_reg        = PLLDIV1,
+};
+
 static struct clk pll0_sysclk2 = {
         .name           = "pll0_sysclk2",
         .parent         = &pll0_clk,
@@ -368,10 +375,19 @@ static struct clk sata_clk = {
         .flags          = PSC_FORCE,
 };
 
+static struct clk dsp_clk = {
+        .name           = "dsp",
+        .parent         = &pll0_sysclk1,
+        .domain         = DAVINCI_GPSC_DSPDOMAIN,
+        .lpsc           = DA8XX_LPSC0_GEM,
+        .flags          = PSC_LRST | PSC_FORCE,
+};
+
 static struct clk_lookup da850_clks[] = {
         CLK(NULL,               "ref",          &ref_clk),
         CLK(NULL,               "pll0",         &pll0_clk),
         CLK(NULL,               "pll0_aux",     &pll0_aux_clk),
+        CLK(NULL,               "pll0_sysclk1", &pll0_sysclk1),
         CLK(NULL,               "pll0_sysclk2", &pll0_sysclk2),
         CLK(NULL,               "pll0_sysclk3", &pll0_sysclk3),
         CLK(NULL,               "pll0_sysclk4", &pll0_sysclk4),
@@ -413,6 +429,7 @@ static struct clk_lookup da850_clks[] = {
         CLK("spi_davinci.1",    NULL,           &spi1_clk),
         CLK("vpif",             NULL,           &vpif_clk),
         CLK("ahci",             NULL,           &sata_clk),
+        CLK("davinci-rproc.0",  NULL,           &dsp_clk),
         CLK(NULL,               NULL,           NULL),
 };
 
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 2d5502d84a22..aa402bc160c8 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -751,7 +751,7 @@ void __iomem * __init da8xx_get_mem_ctlr(void)
 
         da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
         if (!da8xx_ddr2_ctlr_base)
-                pr_warning("%s: Unable to map DDR2 controller", __func__);
+                pr_warn("%s: Unable to map DDR2 controller", __func__);
 
         return da8xx_ddr2_ctlr_base;
 }
@@ -832,7 +832,7 @@ static struct resource da8xx_spi1_resources[] = {
         },
 };
 
-struct davinci_spi_platform_data da8xx_spi_pdata[] = {
+static struct davinci_spi_platform_data da8xx_spi_pdata[] = {
         [0] = {
                 .version        = SPI_VERSION_2,
                 .intr_line      = 1,
@@ -866,20 +866,12 @@ static struct platform_device da8xx_spi_device[] = {
         },
 };
 
-int __init da8xx_register_spi(int instance, const struct spi_board_info *info,
-                              unsigned len)
+int __init da8xx_register_spi_bus(int instance, unsigned num_chipselect)
 {
-        int ret;
-
         if (instance < 0 || instance > 1)
                 return -EINVAL;
 
-        ret = spi_register_board_info(info, len);
-        if (ret)
-                pr_warning("%s: failed to register board info for spi %d :"
-                           " %d\n", __func__, instance, ret);
-
-        da8xx_spi_pdata[instance].num_chipselect = len;
+        da8xx_spi_pdata[instance].num_chipselect = num_chipselect;
 
         if (instance == 1 && cpu_is_davinci_da850()) {
                 da8xx_spi1_resources[0].start = DA850_SPI1_BASE;
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
index a3b040219876..3e8af6a0b64c 100644
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ b/arch/arm/mach-davinci/include/mach/clock.h
@@ -18,4 +18,7 @@ struct clk;
 extern int clk_register(struct clk *clk);
 extern void clk_unregister(struct clk *clk);
 
+int davinci_clk_reset_assert(struct clk *c);
+int davinci_clk_reset_deassert(struct clk *c);
+
 #endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 700d311c6854..1b14aea40310 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -82,8 +82,7 @@ void __init da850_init(void);
 int da830_register_edma(struct edma_rsv_info *rsv);
 int da850_register_edma(struct edma_rsv_info *rsv[2]);
 int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
-int da8xx_register_spi(int instance,
-                const struct spi_board_info *info, unsigned len);
+int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
 int da8xx_register_watchdog(void);
 int da8xx_register_usb20(unsigned mA, unsigned potpgt);
 int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
@@ -110,7 +109,6 @@ extern struct platform_device da8xx_serial_device;
 extern struct emac_platform_data da8xx_emac_pdata;
 extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
 extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
-extern struct davinci_spi_platform_data da8xx_spi_pdata[];
 
 extern struct platform_device da8xx_wdt_device;
 
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 40a0027838e8..0a22710493fd 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -246,6 +246,7 @@
 
 #define MDSTAT_STATE_MASK       0x3f
 #define PDSTAT_STATE_MASK       0x1f
+#define MDCTL_LRST              BIT(8)
 #define MDCTL_FORCE             BIT(31)
 #define PDCTL_NEXT              BIT(0)
 #define PDCTL_EPCGOOD           BIT(8)
@@ -253,6 +254,8 @@
 #ifndef __ASSEMBLER__
 
 extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
+extern void davinci_psc_reset(unsigned int ctlr, unsigned int id,
+                bool reset);
 extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 unsigned int id, bool enable, u32 flags);
 
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index d7e210f4b55c..82fdc69d5728 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -35,7 +35,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
         struct davinci_soc_info *soc_info = &davinci_soc_info;
 
         if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
-                pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
+                pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
                                 (int)soc_info->psc_bases, ctlr);
                 return 0;
         }
@@ -48,6 +48,31 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
         return mdstat & BIT(12);
 }
 
+/* Control "reset" line associated with PSC domain */
+void davinci_psc_reset(unsigned int ctlr, unsigned int id, bool reset)
+{
+        u32 mdctl;
+        void __iomem *psc_base;
+        struct davinci_soc_info *soc_info = &davinci_soc_info;
+
+        if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
+                pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
+                                (int)soc_info->psc_bases, ctlr);
+                return;
+        }
+
+        psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
+
+        mdctl = readl(psc_base + MDCTL + 4 * id);
+        if (reset)
+                mdctl &= ~MDCTL_LRST;
+        else
+                mdctl |= MDCTL_LRST;
+        writel(mdctl, psc_base + MDCTL + 4 * id);
+
+        iounmap(psc_base);
+}
+
 /* Enable or disable a PSC domain */
 void davinci_psc_config(unsigned int domain, unsigned int ctlr,
                 unsigned int id, bool enable, u32 flags)
@@ -58,7 +83,7 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
         u32 next_state = PSC_STATE_ENABLE;
 
         if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
-                pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
+                pr_warn("PSC: Bad psc data: 0x%x[%d]\n",
                                 (int)soc_info->psc_bases, ctlr);
                 return;
         }