aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorTony Prisk <linux@prisktech.co.nz>2013-01-02 14:44:16 -0500
committerThierry Reding <thierry.reding@avionic-design.de>2013-01-09 02:17:12 -0500
commit3ccb1c1702ed4bb07006d20c8173899a69dae242 (patch)
treeef55173274b60bec942b0dcfc15f1df3614029fe
parent8ab432caa46413c9f3ca81d82ea9fa5bae07c3c1 (diff)
pwm: vt8500: Add polarity support
Add support to set polarity on PWM devices, allowing for inverted duty cycles. Also update the binding document to #pwm-cells = <3> to allow passing the flags from devicetree. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
-rw-r--r--Documentation/devicetree/bindings/pwm/vt8500-pwm.txt9
-rw-r--r--drivers/pwm/pwm-vt8500.c23
2 files changed, 29 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt b/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt
index bcc63678a9a5..d21d82d29855 100644
--- a/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt
+++ b/Documentation/devicetree/bindings/pwm/vt8500-pwm.txt
@@ -3,14 +3,17 @@ VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller
3Required properties: 3Required properties:
4- compatible: should be "via,vt8500-pwm" 4- compatible: should be "via,vt8500-pwm"
5- reg: physical base address and length of the controller's registers 5- reg: physical base address and length of the controller's registers
6- #pwm-cells: should be 2. The first cell specifies the per-chip index 6- #pwm-cells: Should be 3. Number of cells being used to specify PWM property.
7 of the PWM to use and the second cell is the period in nanoseconds. 7 First cell specifies the per-chip index of the PWM to use, the second
8 cell is the period in nanoseconds and bit 0 in the third cell is used to
9 encode the polarity of PWM output. Set bit 0 of the third in PWM specifier
10 to 1 for inverse polarity & set to 0 for normal polarity.
8- clocks: phandle to the PWM source clock 11- clocks: phandle to the PWM source clock
9 12
10Example: 13Example:
11 14
12pwm1: pwm@d8220000 { 15pwm1: pwm@d8220000 {
13 #pwm-cells = <2>; 16 #pwm-cells = <3>;
14 compatible = "via,vt8500-pwm"; 17 compatible = "via,vt8500-pwm";
15 reg = <0xd8220000 0x1000>; 18 reg = <0xd8220000 0x1000>;
16 clocks = <&clkpwm>; 19 clocks = <&clkpwm>;
diff --git a/drivers/pwm/pwm-vt8500.c b/drivers/pwm/pwm-vt8500.c
index bbc37504103a..98d79e9f0144 100644
--- a/drivers/pwm/pwm-vt8500.c
+++ b/drivers/pwm/pwm-vt8500.c
@@ -164,10 +164,31 @@ static void vt8500_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
164 clk_disable(vt8500->clk); 164 clk_disable(vt8500->clk);
165} 165}
166 166
167static int vt8500_pwm_set_polarity(struct pwm_chip *chip,
168 struct pwm_device *pwm,
169 enum pwm_polarity polarity)
170{
171 struct vt8500_chip *vt8500 = to_vt8500_chip(chip);
172 u32 val;
173
174 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm));
175
176 if (polarity == PWM_POLARITY_INVERSED)
177 val |= CTRL_INVERT;
178 else
179 val &= ~CTRL_INVERT;
180
181 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm));
182 pwm_busy_wait(vt8500, pwm->hwpwm, STATUS_CTRL_UPDATE);
183
184 return 0;
185}
186
167static struct pwm_ops vt8500_pwm_ops = { 187static struct pwm_ops vt8500_pwm_ops = {
168 .enable = vt8500_pwm_enable, 188 .enable = vt8500_pwm_enable,
169 .disable = vt8500_pwm_disable, 189 .disable = vt8500_pwm_disable,
170 .config = vt8500_pwm_config, 190 .config = vt8500_pwm_config,
191 .set_polarity = vt8500_pwm_set_polarity,
171 .owner = THIS_MODULE, 192 .owner = THIS_MODULE,
172}; 193};
173 194
@@ -197,6 +218,8 @@ static int vt8500_pwm_probe(struct platform_device *pdev)
197 218
198 chip->chip.dev = &pdev->dev; 219 chip->chip.dev = &pdev->dev;
199 chip->chip.ops = &vt8500_pwm_ops; 220 chip->chip.ops = &vt8500_pwm_ops;
221 chip->chip.of_xlate = of_pwm_xlate_with_flags;
222 chip->chip.of_pwm_n_cells = 3;
200 chip->chip.base = -1; 223 chip->chip.base = -1;
201 chip->chip.npwm = VT8500_NR_PWMS; 224 chip->chip.npwm = VT8500_NR_PWMS;
202 225