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authorSilvio Fricke <silvio.fricke@gmail.com>2014-07-01 07:09:00 -0400
committerShawn Guo <shawn.guo@freescale.com>2014-07-18 04:49:42 -0400
commit3c6c86859474d146be58fffcf76fad91d0eedb4c (patch)
tree14b48afa7c96e5abf5237b4fa9d35253f3919b3e
parentfd101c4c566321a57dcafe8e3832d7a93dead3b7 (diff)
ARM: dts: imx6: edmqmx6: Add two other i2c buses
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index f36dab0e711c..dd9ef1625d92 100644
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -118,6 +118,13 @@
118 status = "okay"; 118 status = "okay";
119}; 119};
120 120
121&i2c1 {
122 clock-frequency = <100000>;
123 pinctrl-names = "default";
124 pinctrl-0 = <&pinctrl_i2c1>;
125 status = "okay";
126};
127
121&i2c2 { 128&i2c2 {
122 clock-frequency = <100000>; 129 clock-frequency = <100000>;
123 pinctrl-names = "default"; 130 pinctrl-names = "default";
@@ -274,6 +281,13 @@
274 }; 281 };
275}; 282};
276 283
284&i2c3 {
285 clock-frequency = <100000>;
286 pinctrl-names = "default";
287 pinctrl-0 = <&pinctrl_i2c3>;
288 status = "okay";
289};
290
277&iomuxc { 291&iomuxc {
278 pinctrl-names = "default"; 292 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_hog>; 293 pinctrl-0 = <&pinctrl_hog>;
@@ -316,6 +330,13 @@
316 >; 330 >;
317 }; 331 };
318 332
333 pinctrl_i2c1: i2c1grp {
334 fsl,pins = <
335 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
336 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
337 >;
338 };
339
319 pinctrl_i2c2: i2c2grp { 340 pinctrl_i2c2: i2c2grp {
320 fsl,pins = < 341 fsl,pins = <
321 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 342 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
@@ -323,6 +344,13 @@
323 >; 344 >;
324 }; 345 };
325 346
347 pinctrl_i2c3: i2c3grp {
348 fsl,pins = <
349 MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
350 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
351 >;
352 };
353
326 pinctrl_pcie: pciegrp { 354 pinctrl_pcie: pciegrp {
327 fsl,pins = < 355 fsl,pins = <
328 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x100b1 356 MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x100b1