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authorLinus Torvalds <torvalds@linux-foundation.org>2010-10-28 15:06:51 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-10-28 15:06:51 -0400
commit3c3762957818dc902222733a8184f23102e24472 (patch)
tree97a17d0923d87108715af32f83a526d24e65fb80
parente9f29c9a56ca06d0effa557823a737cbe7ec09f7 (diff)
parent63111a3a70fb4d80e3b54ed75f13795e98f7a467 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (32 commits) sh: intc: switch irq_desc iteration to new active IRQ iterator. sh: fix up cpu hotplug IRQ migration for irq_data changes. sh: oprofile: Make sure the backtrace op is available for timer-fallback. sh64: oprofile: Fix up kernel stack pointer size mismatch. sh: oprofile: Fix up and extend op_name_from_perf_id(). sh: lockless get_user_pages_fast() sh64: _PAGE_SPECIAL support. sound: sh: ctrl_in/outX to __raw_read/writeX conversion. sh: disable deprecated genirq support. sh: update show_interrupts() for irq_data chip lookup. sh: intc: irq_data conversion. sh64: irq_data conversion. sh64: update for IRQ flag handling naming changes. rtc: rtc-rs5c313: ctrl_in/outX to __raw_read/writeX conversion. sh: mach-se: irq_data conversion. input: hp680_ts_input: ctrl_in/outX to __raw_read/writeX conversion. input: jornada680_kbd: ctrl_in/outX to __raw_read/writeX conversion. sh: hd64461: irq_data conversion. sh: mach-x3proto: irq_data conversion. sh: mach-systemh: irq_data conversion. ...
Diffstat
-rw-r--r--arch/sh/Kconfig14
-rw-r--r--arch/sh/boards/mach-cayman/irq.c16
-rw-r--r--arch/sh/boards/mach-dreamcast/irq.c17
-rw-r--r--arch/sh/boards/mach-landisk/irq.c15
-rw-r--r--arch/sh/boards/mach-microdev/irq.c30
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c20
-rw-r--r--arch/sh/boards/mach-se/7343/irq.c15
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c15
-rw-r--r--arch/sh/boards/mach-se/7724/irq.c13
-rw-r--r--arch/sh/boards/mach-systemh/irq.c57
-rw-r--r--arch/sh/boards/mach-x3proto/gpio.c7
-rw-r--r--arch/sh/cchips/hd6446x/hd64461.c19
-rw-r--r--arch/sh/include/asm/pgtable.h2
-rw-r--r--arch/sh/include/asm/pgtable_32.h2
-rw-r--r--arch/sh/include/asm/pgtable_64.h9
-rw-r--r--arch/sh/include/asm/processor.h1
-rw-r--r--arch/sh/kernel/cpu/init.c2
-rw-r--r--arch/sh/kernel/cpu/irq/imask.c14
-rw-r--r--arch/sh/kernel/cpu/irq/intc-sh5.c49
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c29
-rw-r--r--arch/sh/kernel/cpu/sh4/perf_event.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/perf_event.c2
-rw-r--r--arch/sh/kernel/irq.c37
-rw-r--r--arch/sh/kernel/irq_64.c16
-rw-r--r--arch/sh/kernel/setup.c4
-rw-r--r--arch/sh/mm/Makefile2
-rw-r--r--arch/sh/mm/gup.c273
-rw-r--r--arch/sh/oprofile/Makefile2
-rw-r--r--arch/sh/oprofile/backtrace.c2
-rw-r--r--arch/sh/oprofile/common.c35
-rw-r--r--drivers/cdrom/gdrom.c76
-rw-r--r--drivers/input/keyboard/jornada680_kbd.c28
-rw-r--r--drivers/input/touchscreen/hp680_ts_input.c16
-rw-r--r--drivers/rtc/rtc-rs5c313.c34
-rw-r--r--drivers/sh/intc/chip.c53
-rw-r--r--drivers/sh/intc/core.c45
-rw-r--r--drivers/sh/intc/dynamic.c91
-rw-r--r--drivers/sh/intc/internals.h2
-rw-r--r--drivers/sh/intc/virq.c14
-rw-r--r--drivers/sh/maple/maple.c20
-rw-r--r--include/linux/sh_intc.h3
-rw-r--r--sound/sh/aica.c2
-rw-r--r--sound/soc/sh/sh7760-ac97.c4
43 files changed, 646 insertions, 463 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 0f40fc35d0a2..792cf902743a 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -25,8 +25,11 @@ config SUPERH
25 select HAVE_KERNEL_LZO 25 select HAVE_KERNEL_LZO
26 select HAVE_SYSCALL_TRACEPOINTS 26 select HAVE_SYSCALL_TRACEPOINTS
27 select HAVE_REGS_AND_STACK_ACCESS_API 27 select HAVE_REGS_AND_STACK_ACCESS_API
28 select HAVE_GENERIC_HARDIRQS
29 select HAVE_SPARSE_IRQ
28 select RTC_LIB 30 select RTC_LIB
29 select GENERIC_ATOMIC64 31 select GENERIC_ATOMIC64
32 select GENERIC_HARDIRQS_NO_DEPRECATED
30 help 33 help
31 The SuperH is a RISC processor targeted for use in embedded systems 34 The SuperH is a RISC processor targeted for use in embedded systems
32 and consumer electronics; it was also used in the Sega Dreamcast 35 and consumer electronics; it was also used in the Sega Dreamcast
@@ -49,6 +52,7 @@ config SUPERH32
49 select HAVE_MIXED_BREAKPOINTS_REGS 52 select HAVE_MIXED_BREAKPOINTS_REGS
50 select PERF_EVENTS 53 select PERF_EVENTS
51 select ARCH_HIBERNATION_POSSIBLE if MMU 54 select ARCH_HIBERNATION_POSSIBLE if MMU
55 select SPARSE_IRQ
52 56
53config SUPERH64 57config SUPERH64
54 def_bool ARCH = "sh64" 58 def_bool ARCH = "sh64"
@@ -78,19 +82,9 @@ config GENERIC_FIND_NEXT_BIT
78config GENERIC_HWEIGHT 82config GENERIC_HWEIGHT
79 def_bool y 83 def_bool y
80 84
81config GENERIC_HARDIRQS
82 def_bool y
83
84config GENERIC_HARDIRQS_NO__DO_IRQ
85 def_bool y
86
87config IRQ_PER_CPU 85config IRQ_PER_CPU
88 def_bool y 86 def_bool y
89 87
90config SPARSE_IRQ
91 def_bool y
92 depends on SUPERH32
93
94config GENERIC_GPIO 88config GENERIC_GPIO
95 def_bool n 89 def_bool n
96 90
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index 1394b078db36..d7ac5af9d102 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -55,8 +55,9 @@ static struct irqaction cayman_action_pci2 = {
55 .flags = IRQF_DISABLED, 55 .flags = IRQF_DISABLED,
56}; 56};
57 57
58static void enable_cayman_irq(unsigned int irq) 58static void enable_cayman_irq(struct irq_data *data)
59{ 59{
60 unsigned int irq = data->irq;
60 unsigned long flags; 61 unsigned long flags;
61 unsigned long mask; 62 unsigned long mask;
62 unsigned int reg; 63 unsigned int reg;
@@ -72,8 +73,9 @@ static void enable_cayman_irq(unsigned int irq)
72 local_irq_restore(flags); 73 local_irq_restore(flags);
73} 74}
74 75
75void disable_cayman_irq(unsigned int irq) 76static void disable_cayman_irq(struct irq_data *data)
76{ 77{
78 unsigned int irq = data->irq;
77 unsigned long flags; 79 unsigned long flags;
78 unsigned long mask; 80 unsigned long mask;
79 unsigned int reg; 81 unsigned int reg;
@@ -89,16 +91,10 @@ void disable_cayman_irq(unsigned int irq)
89 local_irq_restore(flags); 91 local_irq_restore(flags);
90} 92}
91 93
92static void ack_cayman_irq(unsigned int irq)
93{
94 disable_cayman_irq(irq);
95}
96
97struct irq_chip cayman_irq_type = { 94struct irq_chip cayman_irq_type = {
98 .name = "Cayman-IRQ", 95 .name = "Cayman-IRQ",
99 .unmask = enable_cayman_irq, 96 .irq_unmask = enable_cayman_irq,
100 .mask = disable_cayman_irq, 97 .irq_mask = disable_cayman_irq,
101 .mask_ack = ack_cayman_irq,
102}; 98};
103 99
104int cayman_irq_demux(int evt) 100int cayman_irq_demux(int evt)
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index d932667410ab..72e7ac9549da 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -60,8 +60,9 @@
60 */ 60 */
61 61
62/* Disable the hardware event by masking its bit in its EMR */ 62/* Disable the hardware event by masking its bit in its EMR */
63static inline void disable_systemasic_irq(unsigned int irq) 63static inline void disable_systemasic_irq(struct irq_data *data)
64{ 64{
65 unsigned int irq = data->irq;
65 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 66 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
66 __u32 mask; 67 __u32 mask;
67 68
@@ -71,8 +72,9 @@ static inline void disable_systemasic_irq(unsigned int irq)
71} 72}
72 73
73/* Enable the hardware event by setting its bit in its EMR */ 74/* Enable the hardware event by setting its bit in its EMR */
74static inline void enable_systemasic_irq(unsigned int irq) 75static inline void enable_systemasic_irq(struct irq_data *data)
75{ 76{
77 unsigned int irq = data->irq;
76 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 78 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
77 __u32 mask; 79 __u32 mask;
78 80
@@ -82,18 +84,19 @@ static inline void enable_systemasic_irq(unsigned int irq)
82} 84}
83 85
84/* Acknowledge a hardware event by writing its bit back to its ESR */ 86/* Acknowledge a hardware event by writing its bit back to its ESR */
85static void mask_ack_systemasic_irq(unsigned int irq) 87static void mask_ack_systemasic_irq(struct irq_data *data)
86{ 88{
89 unsigned int irq = data->irq;
87 __u32 esr = ESR_BASE + (LEVEL(irq) << 2); 90 __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
88 disable_systemasic_irq(irq); 91 disable_systemasic_irq(data);
89 outl((1 << EVENT_BIT(irq)), esr); 92 outl((1 << EVENT_BIT(irq)), esr);
90} 93}
91 94
92struct irq_chip systemasic_int = { 95struct irq_chip systemasic_int = {
93 .name = "System ASIC", 96 .name = "System ASIC",
94 .mask = disable_systemasic_irq, 97 .irq_mask = disable_systemasic_irq,
95 .mask_ack = mask_ack_systemasic_irq, 98 .irq_mask_ack = mask_ack_systemasic_irq,
96 .unmask = enable_systemasic_irq, 99 .irq_unmask = enable_systemasic_irq,
97}; 100};
98 101
99/* 102/*
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index 96f38a4187d0..e79412a40490 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -18,25 +18,24 @@
18#include <linux/io.h> 18#include <linux/io.h>
19#include <mach-landisk/mach/iodata_landisk.h> 19#include <mach-landisk/mach/iodata_landisk.h>
20 20
21static void disable_landisk_irq(unsigned int irq) 21static void disable_landisk_irq(struct irq_data *data)
22{ 22{
23 unsigned char mask = 0xff ^ (0x01 << (irq - 5)); 23 unsigned char mask = 0xff ^ (0x01 << (data->irq - 5));
24 24
25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK); 25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK);
26} 26}
27 27
28static void enable_landisk_irq(unsigned int irq) 28static void enable_landisk_irq(struct irq_data *data)
29{ 29{
30 unsigned char value = (0x01 << (irq - 5)); 30 unsigned char value = (0x01 << (data->irq - 5));
31 31
32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK); 32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK);
33} 33}
34 34
35static struct irq_chip landisk_irq_chip __read_mostly = { 35static struct irq_chip landisk_irq_chip __read_mostly = {
36 .name = "LANDISK", 36 .name = "LANDISK",
37 .mask = disable_landisk_irq, 37 .irq_mask = disable_landisk_irq,
38 .unmask = enable_landisk_irq, 38 .irq_unmask = enable_landisk_irq,
39 .mask_ack = disable_landisk_irq,
40}; 39};
41 40
42/* 41/*
@@ -50,7 +49,7 @@ void __init init_landisk_IRQ(void)
50 disable_irq_nosync(i); 49 disable_irq_nosync(i);
51 set_irq_chip_and_handler_name(i, &landisk_irq_chip, 50 set_irq_chip_and_handler_name(i, &landisk_irq_chip,
52 handle_level_irq, "level"); 51 handle_level_irq, "level");
53 enable_landisk_irq(i); 52 enable_landisk_irq(irq_get_irq_data(i));
54 } 53 }
55 __raw_writeb(0x00, PA_PWRINT_CLR); 54 __raw_writeb(0x00, PA_PWRINT_CLR);
56} 55}
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index a26d16669aa2..c35001fd9032 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -65,19 +65,9 @@ static const struct {
65# error Inconsistancy in defining the IRQ# for primary IDE! 65# error Inconsistancy in defining the IRQ# for primary IDE!
66#endif 66#endif
67 67
68static void enable_microdev_irq(unsigned int irq); 68static void disable_microdev_irq(struct irq_data *data)
69static void disable_microdev_irq(unsigned int irq);
70static void mask_and_ack_microdev(unsigned int);
71
72static struct irq_chip microdev_irq_type = {
73 .name = "MicroDev-IRQ",
74 .unmask = enable_microdev_irq,
75 .mask = disable_microdev_irq,
76 .ack = mask_and_ack_microdev,
77};
78
79static void disable_microdev_irq(unsigned int irq)
80{ 69{
70 unsigned int irq = data->irq;
81 unsigned int fpgaIrq; 71 unsigned int fpgaIrq;
82 72
83 if (irq >= NUM_EXTERNAL_IRQS) 73 if (irq >= NUM_EXTERNAL_IRQS)
@@ -91,8 +81,9 @@ static void disable_microdev_irq(unsigned int irq)
91 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 81 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
92} 82}
93 83
94static void enable_microdev_irq(unsigned int irq) 84static void enable_microdev_irq(struct irq_data *data)
95{ 85{
86 unsigned int irq = data->irq;
96 unsigned long priorityReg, priorities, pri; 87 unsigned long priorityReg, priorities, pri;
97 unsigned int fpgaIrq; 88 unsigned int fpgaIrq;
98 89
@@ -116,17 +107,18 @@ static void enable_microdev_irq(unsigned int irq)
116 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 107 __raw_writel(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
117} 108}
118 109
110static struct irq_chip microdev_irq_type = {
111 .name = "MicroDev-IRQ",
112 .irq_unmask = enable_microdev_irq,
113 .irq_mask = disable_microdev_irq,
114};
115
119/* This function sets the desired irq handler to be a MicroDev type */ 116/* This function sets the desired irq handler to be a MicroDev type */
120static void __init make_microdev_irq(unsigned int irq) 117static void __init make_microdev_irq(unsigned int irq)
121{ 118{
122 disable_irq_nosync(irq); 119 disable_irq_nosync(irq);
123 set_irq_chip_and_handler(irq, &microdev_irq_type, handle_level_irq); 120 set_irq_chip_and_handler(irq, &microdev_irq_type, handle_level_irq);
124 disable_microdev_irq(irq); 121 disable_microdev_irq(irq_get_irq_data(irq));
125}
126
127static void mask_and_ack_microdev(unsigned int irq)
128{
129 disable_microdev_irq(irq);
130} 122}
131 123
132extern void __init init_microdev_irq(void) 124extern void __init init_microdev_irq(void)
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index 8d82175d83ab..883b21eacaa6 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -25,8 +25,9 @@
25#define INTC_IPR01 0xfffe0818 25#define INTC_IPR01 0xfffe0818
26#define INTC_ICR1 0xfffe0802 26#define INTC_ICR1 0xfffe0802
27 27
28static void disable_se7206_irq(unsigned int irq) 28static void disable_se7206_irq(struct irq_data *data)
29{ 29{
30 unsigned int irq = data->irq;
30 unsigned short val; 31 unsigned short val;
31 unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq))); 32 unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq)));
32 unsigned short msk0,msk1; 33 unsigned short msk0,msk1;
@@ -55,8 +56,9 @@ static void disable_se7206_irq(unsigned int irq)
55 __raw_writew(msk1, INTMSK1); 56 __raw_writew(msk1, INTMSK1);
56} 57}
57 58
58static void enable_se7206_irq(unsigned int irq) 59static void enable_se7206_irq(struct irq_data *data)
59{ 60{
61 unsigned int irq = data->irq;
60 unsigned short val; 62 unsigned short val;
61 unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq))); 63 unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq)));
62 unsigned short msk0,msk1; 64 unsigned short msk0,msk1;
@@ -86,13 +88,14 @@ static void enable_se7206_irq(unsigned int irq)
86 __raw_writew(msk1, INTMSK1); 88 __raw_writew(msk1, INTMSK1);
87} 89}
88 90
89static void eoi_se7206_irq(unsigned int irq) 91static void eoi_se7206_irq(struct irq_data *data)
90{ 92{
91 unsigned short sts0,sts1; 93 unsigned short sts0,sts1;
94 unsigned int irq = data->irq;
92 struct irq_desc *desc = irq_to_desc(irq); 95 struct irq_desc *desc = irq_to_desc(irq);
93 96
94 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))) 97 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
95 enable_se7206_irq(irq); 98 enable_se7206_irq(data);
96 /* FPGA isr clear */ 99 /* FPGA isr clear */
97 sts0 = __raw_readw(INTSTS0); 100 sts0 = __raw_readw(INTSTS0);
98 sts1 = __raw_readw(INTSTS1); 101 sts1 = __raw_readw(INTSTS1);
@@ -115,10 +118,9 @@ static void eoi_se7206_irq(unsigned int irq)
115 118
116static struct irq_chip se7206_irq_chip __read_mostly = { 119static struct irq_chip se7206_irq_chip __read_mostly = {
117 .name = "SE7206-FPGA", 120 .name = "SE7206-FPGA",
118 .mask = disable_se7206_irq, 121 .irq_mask = disable_se7206_irq,
119 .unmask = enable_se7206_irq, 122 .irq_unmask = enable_se7206_irq,
120 .mask_ack = disable_se7206_irq, 123 .irq_eoi = eoi_se7206_irq,
121 .eoi = eoi_se7206_irq,
122}; 124};
123 125
124static void make_se7206_irq(unsigned int irq) 126static void make_se7206_irq(unsigned int irq)
@@ -126,7 +128,7 @@ static void make_se7206_irq(unsigned int irq)
126 disable_irq_nosync(irq); 128 disable_irq_nosync(irq);
127 set_irq_chip_and_handler_name(irq, &se7206_irq_chip, 129 set_irq_chip_and_handler_name(irq, &se7206_irq_chip,
128 handle_level_irq, "level"); 130 handle_level_irq, "level");
129 disable_se7206_irq(irq); 131 disable_se7206_irq(irq_get_irq_data(irq));
130} 132}
131 133
132/* 134/*
diff --git a/arch/sh/boards/mach-se/7343/irq.c b/arch/sh/boards/mach-se/7343/irq.c
index d4305c26e9f7..76255a19417f 100644
--- a/arch/sh/boards/mach-se/7343/irq.c
+++ b/arch/sh/boards/mach-se/7343/irq.c
@@ -18,23 +18,22 @@
18 18
19unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, }; 19unsigned int se7343_fpga_irq[SE7343_FPGA_IRQ_NR] = { 0, };
20 20
21static void disable_se7343_irq(unsigned int irq) 21static void disable_se7343_irq(struct irq_data *data)
22{ 22{
23 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 23 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
24 __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); 24 __raw_writew(__raw_readw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK);
25} 25}
26 26
27static void enable_se7343_irq(unsigned int irq) 27static void enable_se7343_irq(struct irq_data *data)
28{ 28{
29 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 29 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
30 __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); 30 __raw_writew(__raw_readw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK);
31} 31}
32 32
33static struct irq_chip se7343_irq_chip __read_mostly = { 33static struct irq_chip se7343_irq_chip __read_mostly = {
34 .name = "SE7343-FPGA", 34 .name = "SE7343-FPGA",
35 .mask = disable_se7343_irq, 35 .irq_mask = disable_se7343_irq,
36 .unmask = enable_se7343_irq, 36 .irq_unmask = enable_se7343_irq,
37 .mask_ack = disable_se7343_irq,
38}; 37};
39 38
40static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 39static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
index 61605db04ee6..c013f95628ed 100644
--- a/arch/sh/boards/mach-se/7722/irq.c
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -18,23 +18,22 @@
18 18
19unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, }; 19unsigned int se7722_fpga_irq[SE7722_FPGA_IRQ_NR] = { 0, };
20 20
21static void disable_se7722_irq(unsigned int irq) 21static void disable_se7722_irq(struct irq_data *data)
22{ 22{
23 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 23 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
24 __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK); 24 __raw_writew(__raw_readw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
25} 25}
26 26
27static void enable_se7722_irq(unsigned int irq) 27static void enable_se7722_irq(struct irq_data *data)
28{ 28{
29 unsigned int bit = (unsigned int)get_irq_chip_data(irq); 29 unsigned int bit = (unsigned int)irq_data_get_irq_chip_data(data);
30 __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK); 30 __raw_writew(__raw_readw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
31} 31}
32 32
33static struct irq_chip se7722_irq_chip __read_mostly = { 33static struct irq_chip se7722_irq_chip __read_mostly = {
34 .name = "SE7722-FPGA", 34 .name = "SE7722-FPGA",
35 .mask = disable_se7722_irq, 35 .irq_mask = disable_se7722_irq,
36 .unmask = enable_se7722_irq, 36 .irq_unmask = enable_se7722_irq,
37 .mask_ack = disable_se7722_irq,
38}; 37};
39 38
40static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc) 39static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
index 0942be2daef6..5bd87c22b65b 100644
--- a/arch/sh/boards/mach-se/7724/irq.c
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -68,25 +68,26 @@ static struct fpga_irq get_fpga_irq(unsigned int irq)
68 return set; 68 return set;
69} 69}
70 70
71static void disable_se7724_irq(unsigned int irq) 71static void disable_se7724_irq(struct irq_data *data)
72{ 72{
73 unsigned int irq = data->irq;
73 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 74 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
74 unsigned int bit = irq - set.base; 75 unsigned int bit = irq - set.base;
75 __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr); 76 __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr);
76} 77}
77 78
78static void enable_se7724_irq(unsigned int irq) 79static void enable_se7724_irq(struct irq_data *data)
79{ 80{
81 unsigned int irq = data->irq;
80 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); 82 struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
81 unsigned int bit = irq - set.base; 83 unsigned int bit = irq - set.base;
82 __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr); 84 __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
83} 85}
84 86
85static struct irq_chip se7724_irq_chip __read_mostly = { 87static struct irq_chip se7724_irq_chip __read_mostly = {
86 .name = "SE7724-FPGA", 88 .name = "SE7724-FPGA",
87 .mask = disable_se7724_irq, 89 .irq_mask = disable_se7724_irq,
88 .unmask = enable_se7724_irq, 90 .irq_unmask = enable_se7724_irq,
89 .mask_ack = disable_se7724_irq,
90}; 91};
91 92
92static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) 93static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 523aea5dc94e..e5ee13adeff4 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -23,54 +23,39 @@
23static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004; 23static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
24static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000; 24static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
25 25
26/* forward declaration */ 26static void disable_systemh_irq(struct irq_data *data)
27static void enable_systemh_irq(unsigned int irq);
28static void disable_systemh_irq(unsigned int irq);
29static void mask_and_ack_systemh(unsigned int);
30
31static struct irq_chip systemh_irq_type = {
32 .name = " SystemH Register",
33 .unmask = enable_systemh_irq,
34 .mask = disable_systemh_irq,
35 .ack = mask_and_ack_systemh,
36};
37
38static void disable_systemh_irq(unsigned int irq)
39{ 27{
40 if (systemh_irq_mask_register) { 28 unsigned long val, mask = 0x01 << 1;
41 unsigned long val, mask = 0x01 << 1;
42 29
43 /* Clear the "irq"th bit in the mask and set it in the request */ 30 /* Clear the "irq"th bit in the mask and set it in the request */
44 val = __raw_readl((unsigned long)systemh_irq_mask_register); 31 val = __raw_readl((unsigned long)systemh_irq_mask_register);
45 val &= ~mask; 32 val &= ~mask;
46 __raw_writel(val, (unsigned long)systemh_irq_mask_register); 33 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
47 34
48 val = __raw_readl((unsigned long)systemh_irq_request_register); 35 val = __raw_readl((unsigned long)systemh_irq_request_register);
49 val |= mask; 36 val |= mask;
50 __raw_writel(val, (unsigned long)systemh_irq_request_register); 37 __raw_writel(val, (unsigned long)systemh_irq_request_register);
51 }
52} 38}
53 39
54static void enable_systemh_irq(unsigned int irq) 40static void enable_systemh_irq(struct irq_data *data)
55{ 41{
56 if (systemh_irq_mask_register) { 42 unsigned long val, mask = 0x01 << 1;
57 unsigned long val, mask = 0x01 << 1;
58 43
59 /* Set "irq"th bit in the mask register */ 44 /* Set "irq"th bit in the mask register */
60 val = __raw_readl((unsigned long)systemh_irq_mask_register); 45 val = __raw_readl((unsigned long)systemh_irq_mask_register);
61 val |= mask; 46 val |= mask;
62 __raw_writel(val, (unsigned long)systemh_irq_mask_register); 47 __raw_writel(val, (unsigned long)systemh_irq_mask_register);
63 }
64} 48}
65 49
66static void mask_and_ack_systemh(unsigned int irq) 50static struct irq_chip systemh_irq_type = {
67{ 51 .name = "SystemH Register",
68 disable_systemh_irq(irq); 52 .irq_unmask = enable_systemh_irq,
69} 53 .irq_mask = disable_systemh_irq,
54};
70 55
71void make_systemh_irq(unsigned int irq) 56void make_systemh_irq(unsigned int irq)
72{ 57{
73 disable_irq_nosync(irq); 58 disable_irq_nosync(irq);
74 set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq); 59 set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
75 disable_systemh_irq(irq); 60 disable_systemh_irq(irq_get_irq_data(irq));
76} 61}
diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c
index 594adf76e46a..239e74066253 100644
--- a/arch/sh/boards/mach-x3proto/gpio.c
+++ b/arch/sh/boards/mach-x3proto/gpio.c
@@ -54,18 +54,19 @@ static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
54 54
55static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 55static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
56{ 56{
57 struct irq_chip *chip = get_irq_desc_chip(desc); 57 struct irq_data *data = irq_get_irq_data(irq);
58 struct irq_chip *chip = irq_data_get_irq_chip(data);
58 unsigned long mask; 59 unsigned long mask;
59 int pin; 60 int pin;
60 61
61 chip->mask_ack(irq); 62 chip->irq_mask_ack(data);
62 63
63 mask = __raw_readw(KEYDETR); 64 mask = __raw_readw(KEYDETR);
64 65
65 for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS) 66 for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS)
66 generic_handle_irq(x3proto_gpio_to_irq(NULL, pin)); 67 generic_handle_irq(x3proto_gpio_to_irq(NULL, pin));
67 68
68 chip->unmask(irq); 69 chip->irq_unmask(data);
69} 70}
70 71
71struct gpio_chip x3proto_gpio_chip = { 72struct gpio_chip x3proto_gpio_chip = {
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index bcb31ae84a51..177a10b25cad 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -17,8 +17,9 @@
17/* This belongs in cpu specific */ 17/* This belongs in cpu specific */
18#define INTC_ICR1 0xA4140010UL 18#define INTC_ICR1 0xA4140010UL
19 19
20static void hd64461_mask_irq(unsigned int irq) 20static void hd64461_mask_irq(struct irq_data *data)
21{ 21{
22 unsigned int irq = data->irq;
22 unsigned short nimr; 23 unsigned short nimr;
23 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 24 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
24 25
@@ -27,8 +28,9 @@ static void hd64461_mask_irq(unsigned int irq)
27 __raw_writew(nimr, HD64461_NIMR); 28 __raw_writew(nimr, HD64461_NIMR);
28} 29}
29 30
30static void hd64461_unmask_irq(unsigned int irq) 31static void hd64461_unmask_irq(struct irq_data *data)
31{ 32{
33 unsigned int irq = data->irq;
32 unsigned short nimr; 34 unsigned short nimr;
33 unsigned short mask = 1 << (irq - HD64461_IRQBASE); 35 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
34 36
@@ -37,20 +39,21 @@ static void hd64461_unmask_irq(unsigned int irq)
37 __raw_writew(nimr, HD64461_NIMR); 39 __raw_writew(nimr, HD64461_NIMR);
38} 40}
39 41
40static void hd64461_mask_and_ack_irq(unsigned int irq) 42static void hd64461_mask_and_ack_irq(struct irq_data *data)
41{ 43{
42 hd64461_mask_irq(irq); 44 hd64461_mask_irq(data);
45
43#ifdef CONFIG_HD64461_ENABLER 46#ifdef CONFIG_HD64461_ENABLER
44 if (irq == HD64461_IRQBASE + 13) 47 if (data->irq == HD64461_IRQBASE + 13)
45 __raw_writeb(0x00, HD64461_PCC1CSCR); 48 __raw_writeb(0x00, HD64461_PCC1CSCR);
46#endif 49#endif
47} 50}
48 51
49static struct irq_chip hd64461_irq_chip = { 52static struct irq_chip hd64461_irq_chip = {
50 .name = "HD64461-IRQ", 53 .name = "HD64461-IRQ",
51 .mask = hd64461_mask_irq, 54 .irq_mask = hd64461_mask_irq,
52 .mask_ack = hd64461_mask_and_ack_irq, 55 .irq_mask_ack = hd64461_mask_and_ack_irq,
53 .unmask = hd64461_unmask_irq, 56 .irq_unmask = hd64461_unmask_irq,
54}; 57};
55 58
56static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc) 59static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index 02f77450cd8f..a15f1058bbf4 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -169,6 +169,8 @@ extern void page_table_range_init(unsigned long start, unsigned long end,
169#define HAVE_ARCH_UNMAPPED_AREA 169#define HAVE_ARCH_UNMAPPED_AREA
170#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN 170#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
171 171
172#define __HAVE_ARCH_PTE_SPECIAL
173
172#include <asm-generic/pgtable.h> 174#include <asm-generic/pgtable.h>
173 175
174#endif /* __ASM_SH_PGTABLE_H */ 176#endif /* __ASM_SH_PGTABLE_H */
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 69fdfbf14ea5..43528ec656ba 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -378,8 +378,6 @@ PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
378PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); 378PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
379PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL); 379PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL);
380 380
381#define __HAVE_ARCH_PTE_SPECIAL
382
383/* 381/*
384 * Macro and implementation to make a page protection as uncachable. 382 * Macro and implementation to make a page protection as uncachable.
385 */ 383 */
diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h
index 10a48111226d..42cb9dd52161 100644
--- a/arch/sh/include/asm/pgtable_64.h
+++ b/arch/sh/include/asm/pgtable_64.h
@@ -130,6 +130,7 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
130 * anything above the PPN field. 130 * anything above the PPN field.
131 */ 131 */
132#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */ 132#define _PAGE_WIRED _PAGE_EXT(0x001) /* software: wire the tlb entry */
133#define _PAGE_SPECIAL _PAGE_EXT(0x002)
133 134
134#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \ 135#define _PAGE_CLEAR_FLAGS (_PAGE_PRESENT | _PAGE_FILE | _PAGE_SHARED | \
135 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED) 136 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_WIRED)
@@ -173,7 +174,8 @@ static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
173/* Default flags for a User page */ 174/* Default flags for a User page */
174#define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER) 175#define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER)
175 176
176#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 177#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \
178 _PAGE_SPECIAL)
177 179
178/* 180/*
179 * We have full permissions (Read/Write/Execute/Shared). 181 * We have full permissions (Read/Write/Execute/Shared).
@@ -263,7 +265,7 @@ static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
263static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 265static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
264static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 266static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
265static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } 267static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
266static inline int pte_special(pte_t pte){ return 0; } 268static inline int pte_special(pte_t pte){ return pte_val(pte) & _PAGE_SPECIAL; }
267 269
268static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; } 270static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; }
269static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } 271static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; }
@@ -272,8 +274,7 @@ static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) |
272static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } 274static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; }
273static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } 275static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; }
274static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } 276static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; }
275static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 277static inline pte_t pte_mkspecial(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SPECIAL)); return pte; }
276
277 278
278/* 279/*
279 * Conversion functions: convert a page and protection to a page entry. 280 * Conversion functions: convert a page and protection to a page entry.
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 0a58cb25a658..c9e7cbc4768a 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -89,6 +89,7 @@ struct sh_cpuinfo {
89 struct task_struct *idle; 89 struct task_struct *idle;
90#endif 90#endif
91 91
92 unsigned int phys_bits;
92 unsigned long flags; 93 unsigned long flags;
93} __attribute__ ((aligned(L1_CACHE_BYTES))); 94} __attribute__ ((aligned(L1_CACHE_BYTES)));
94 95
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 97661061ff20..fac742e514ee 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -340,6 +340,8 @@ asmlinkage void __cpuinit cpu_init(void)
340 */ 340 */
341 current_cpu_data.asid_cache = NO_CONTEXT; 341 current_cpu_data.asid_cache = NO_CONTEXT;
342 342
343 current_cpu_data.phys_bits = __in_29bit_mode() ? 29 : 32;
344
343 speculative_execution_init(); 345 speculative_execution_init();
344 expmask_init(); 346 expmask_init();
345 347
diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c
index a351ed84eec5..32c825c9488e 100644
--- a/arch/sh/kernel/cpu/irq/imask.c
+++ b/arch/sh/kernel/cpu/irq/imask.c
@@ -51,16 +51,20 @@ static inline void set_interrupt_registers(int ip)
51 : "t"); 51 : "t");
52} 52}
53 53
54static void mask_imask_irq(unsigned int irq) 54static void mask_imask_irq(struct irq_data *data)
55{ 55{
56 unsigned int irq = data->irq;
57
56 clear_bit(irq, imask_mask); 58 clear_bit(irq, imask_mask);
57 if (interrupt_priority < IMASK_PRIORITY - irq) 59 if (interrupt_priority < IMASK_PRIORITY - irq)
58 interrupt_priority = IMASK_PRIORITY - irq; 60 interrupt_priority = IMASK_PRIORITY - irq;
59 set_interrupt_registers(interrupt_priority); 61 set_interrupt_registers(interrupt_priority);
60} 62}
61 63
62static void unmask_imask_irq(unsigned int irq) 64static void unmask_imask_irq(struct irq_data *data)
63{ 65{
66 unsigned int irq = data->irq;
67
64 set_bit(irq, imask_mask); 68 set_bit(irq, imask_mask);
65 interrupt_priority = IMASK_PRIORITY - 69 interrupt_priority = IMASK_PRIORITY -
66 find_first_zero_bit(imask_mask, IMASK_PRIORITY); 70 find_first_zero_bit(imask_mask, IMASK_PRIORITY);
@@ -69,9 +73,9 @@ static void unmask_imask_irq(unsigned int irq)
69 73
70static struct irq_chip imask_irq_chip = { 74static struct irq_chip imask_irq_chip = {
71 .name = "SR.IMASK", 75 .name = "SR.IMASK",
72 .mask = mask_imask_irq, 76 .irq_mask = mask_imask_irq,
73 .unmask = unmask_imask_irq, 77 .irq_unmask = unmask_imask_irq,
74 .mask_ack = mask_imask_irq, 78 .irq_mask_ack = mask_imask_irq,
75}; 79};
76 80
77void make_imask_irq(unsigned int irq) 81void make_imask_irq(unsigned int irq)
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 96a239583948..5af48f8357e5 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -76,39 +76,11 @@ int intc_evt_to_irq[(0xE20/0x20)+1] = {
76}; 76};
77 77
78static unsigned long intc_virt; 78static unsigned long intc_virt;
79
80static unsigned int startup_intc_irq(unsigned int irq);
81static void shutdown_intc_irq(unsigned int irq);
82static void enable_intc_irq(unsigned int irq);
83static void disable_intc_irq(unsigned int irq);
84static void mask_and_ack_intc(unsigned int);
85static void end_intc_irq(unsigned int irq);
86
87static struct irq_chip intc_irq_type = {
88 .name = "INTC",
89 .startup = startup_intc_irq,
90 .shutdown = shutdown_intc_irq,
91 .enable = enable_intc_irq,
92 .disable = disable_intc_irq,
93 .ack = mask_and_ack_intc,
94 .end = end_intc_irq
95};
96
97static int irlm; /* IRL mode */ 79static int irlm; /* IRL mode */
98 80
99static unsigned int startup_intc_irq(unsigned int irq) 81static void enable_intc_irq(struct irq_data *data)
100{
101 enable_intc_irq(irq);
102 return 0; /* never anything pending */
103}
104
105static void shutdown_intc_irq(unsigned int irq)
106{
107 disable_intc_irq(irq);
108}
109
110static void enable_intc_irq(unsigned int irq)
111{ 82{
83 unsigned int irq = data->irq;
112 unsigned long reg; 84 unsigned long reg;
113 unsigned long bitmask; 85 unsigned long bitmask;
114 86
@@ -126,8 +98,9 @@ static void enable_intc_irq(unsigned int irq)
126 __raw_writel(bitmask, reg); 98 __raw_writel(bitmask, reg);
127} 99}
128 100
129static void disable_intc_irq(unsigned int irq) 101static void disable_intc_irq(struct irq_data *data)
130{ 102{
103 unsigned int irq = data->irq;
131 unsigned long reg; 104 unsigned long reg;
132 unsigned long bitmask; 105 unsigned long bitmask;
133 106
@@ -142,15 +115,11 @@ static void disable_intc_irq(unsigned int irq)
142 __raw_writel(bitmask, reg); 115 __raw_writel(bitmask, reg);
143} 116}
144 117
145static void mask_and_ack_intc(unsigned int irq) 118static struct irq_chip intc_irq_type = {
146{ 119 .name = "INTC",
147 disable_intc_irq(irq); 120 .irq_enable = enable_intc_irq,
148} 121 .irq_disable = disable_intc_irq,
149 122};
150static void end_intc_irq(unsigned int irq)
151{
152 enable_intc_irq(irq);
153}
154 123
155void __init plat_irq_setup(void) 124void __init plat_irq_setup(void)
156{ 125{
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 9282d965a1b6..7516c35ee514 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -24,25 +24,25 @@
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/topology.h> 25#include <linux/topology.h>
26 26
27static inline struct ipr_desc *get_ipr_desc(unsigned int irq) 27static inline struct ipr_desc *get_ipr_desc(struct irq_data *data)
28{ 28{
29 struct irq_chip *chip = get_irq_chip(irq); 29 struct irq_chip *chip = irq_data_get_irq_chip(data);
30 return container_of(chip, struct ipr_desc, chip); 30 return container_of(chip, struct ipr_desc, chip);
31} 31}
32 32
33static void disable_ipr_irq(unsigned int irq) 33static void disable_ipr_irq(struct irq_data *data)
34{ 34{
35 struct ipr_data *p = get_irq_chip_data(irq); 35 struct ipr_data *p = irq_data_get_irq_chip_data(data);
36 unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx]; 36 unsigned long addr = get_ipr_desc(data)->ipr_offsets[p->ipr_idx];
37 /* Set the priority in IPR to 0 */ 37 /* Set the priority in IPR to 0 */
38 __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); 38 __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
39 (void)__raw_readw(addr); /* Read back to flush write posting */ 39 (void)__raw_readw(addr); /* Read back to flush write posting */
40} 40}
41 41
42static void enable_ipr_irq(unsigned int irq) 42static void enable_ipr_irq(struct irq_data *data)
43{ 43{
44 struct ipr_data *p = get_irq_chip_data(irq); 44 struct ipr_data *p = irq_data_get_irq_chip_data(data);
45 unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx]; 45 unsigned long addr = get_ipr_desc(data)->ipr_offsets[p->ipr_idx];
46 /* Set priority in IPR back to original value */ 46 /* Set priority in IPR back to original value */
47 __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr); 47 __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
48} 48}
@@ -56,19 +56,18 @@ void register_ipr_controller(struct ipr_desc *desc)
56{ 56{
57 int i; 57 int i;
58 58
59 desc->chip.mask = disable_ipr_irq; 59 desc->chip.irq_mask = disable_ipr_irq;
60 desc->chip.unmask = enable_ipr_irq; 60 desc->chip.irq_unmask = enable_ipr_irq;
61 desc->chip.mask_ack = disable_ipr_irq;
62 61
63 for (i = 0; i < desc->nr_irqs; i++) { 62 for (i = 0; i < desc->nr_irqs; i++) {
64 struct ipr_data *p = desc->ipr_data + i; 63 struct ipr_data *p = desc->ipr_data + i;
65 struct irq_desc *irq_desc; 64 int res;
66 65
67 BUG_ON(p->ipr_idx >= desc->nr_offsets); 66 BUG_ON(p->ipr_idx >= desc->nr_offsets);
68 BUG_ON(!desc->ipr_offsets[p->ipr_idx]); 67 BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
69 68
70 irq_desc = irq_to_desc_alloc_node(p->irq, numa_node_id()); 69 res = irq_alloc_desc_at(p->irq, numa_node_id());
71 if (unlikely(!irq_desc)) { 70 if (unlikely(res != p->irq && res != -EEXIST)) {
72 printk(KERN_INFO "can not get irq_desc for %d\n", 71 printk(KERN_INFO "can not get irq_desc for %d\n",
73 p->irq); 72 p->irq);
74 continue; 73 continue;
@@ -78,7 +77,7 @@ void register_ipr_controller(struct ipr_desc *desc)
78 set_irq_chip_and_handler_name(p->irq, &desc->chip, 77 set_irq_chip_and_handler_name(p->irq, &desc->chip,
79 handle_level_irq, "level"); 78 handle_level_irq, "level");
80 set_irq_chip_data(p->irq, p); 79 set_irq_chip_data(p->irq, p);
81 disable_ipr_irq(p->irq); 80 disable_ipr_irq(irq_get_irq_data(p->irq));
82 } 81 }
83} 82}
84EXPORT_SYMBOL(register_ipr_controller); 83EXPORT_SYMBOL(register_ipr_controller);
diff --git a/arch/sh/kernel/cpu/sh4/perf_event.c b/arch/sh/kernel/cpu/sh4/perf_event.c
index 7f9ecc9c2d02..dbf3b4bb71fe 100644
--- a/arch/sh/kernel/cpu/sh4/perf_event.c
+++ b/arch/sh/kernel/cpu/sh4/perf_event.c
@@ -225,7 +225,7 @@ static void sh7750_pmu_enable_all(void)
225} 225}
226 226
227static struct sh_pmu sh7750_pmu = { 227static struct sh_pmu sh7750_pmu = {
228 .name = "SH7750", 228 .name = "sh7750",
229 .num_events = 2, 229 .num_events = 2,
230 .event_map = sh7750_event_map, 230 .event_map = sh7750_event_map,
231 .max_events = ARRAY_SIZE(sh7750_general_events), 231 .max_events = ARRAY_SIZE(sh7750_general_events),
diff --git a/arch/sh/kernel/cpu/sh4a/perf_event.c b/arch/sh/kernel/cpu/sh4a/perf_event.c
index b8b873d8d6b5..580276525731 100644
--- a/arch/sh/kernel/cpu/sh4a/perf_event.c
+++ b/arch/sh/kernel/cpu/sh4a/perf_event.c
@@ -259,7 +259,7 @@ static void sh4a_pmu_enable_all(void)
259} 259}
260 260
261static struct sh_pmu sh4a_pmu = { 261static struct sh_pmu sh4a_pmu = {
262 .name = "SH-4A", 262 .name = "sh4a",
263 .num_events = 2, 263 .num_events = 2,
264 .event_map = sh4a_event_map, 264 .event_map = sh4a_event_map,
265 .max_events = ARRAY_SIZE(sh4a_general_events), 265 .max_events = ARRAY_SIZE(sh4a_general_events),
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 9dc447db8a44..68ecbe6c881a 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -56,6 +56,8 @@ int show_interrupts(struct seq_file *p, void *v)
56 int i = *(loff_t *)v, j, prec; 56 int i = *(loff_t *)v, j, prec;
57 struct irqaction *action; 57 struct irqaction *action;
58 struct irq_desc *desc; 58 struct irq_desc *desc;
59 struct irq_data *data;
60 struct irq_chip *chip;
59 61
60 if (i > nr_irqs) 62 if (i > nr_irqs)
61 return 0; 63 return 0;
@@ -77,6 +79,9 @@ int show_interrupts(struct seq_file *p, void *v)
77 if (!desc) 79 if (!desc)
78 return 0; 80 return 0;
79 81
82 data = irq_get_irq_data(i);
83 chip = irq_data_get_irq_chip(data);
84
80 raw_spin_lock_irqsave(&desc->lock, flags); 85 raw_spin_lock_irqsave(&desc->lock, flags);
81 for_each_online_cpu(j) 86 for_each_online_cpu(j)
82 any_count |= kstat_irqs_cpu(i, j); 87 any_count |= kstat_irqs_cpu(i, j);
@@ -87,7 +92,7 @@ int show_interrupts(struct seq_file *p, void *v)
87 seq_printf(p, "%*d: ", prec, i); 92 seq_printf(p, "%*d: ", prec, i);
88 for_each_online_cpu(j) 93 for_each_online_cpu(j)
89 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); 94 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
90 seq_printf(p, " %14s", desc->chip->name); 95 seq_printf(p, " %14s", chip->name);
91 seq_printf(p, "-%-8s", desc->name); 96 seq_printf(p, "-%-8s", desc->name);
92 97
93 if (action) { 98 if (action) {
@@ -273,12 +278,6 @@ void __init init_IRQ(void)
273{ 278{
274 plat_irq_setup(); 279 plat_irq_setup();
275 280
276 /*
277 * Pin any of the legacy IRQ vectors that haven't already been
278 * grabbed by the platform
279 */
280 reserve_irq_legacy();
281
282 /* Perform the machine specific initialisation */ 281 /* Perform the machine specific initialisation */
283 if (sh_mv.mv_init_irq) 282 if (sh_mv.mv_init_irq)
284 sh_mv.mv_init_irq(); 283 sh_mv.mv_init_irq();
@@ -297,13 +296,16 @@ int __init arch_probe_nr_irqs(void)
297#endif 296#endif
298 297
299#ifdef CONFIG_HOTPLUG_CPU 298#ifdef CONFIG_HOTPLUG_CPU
300static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu) 299static void route_irq(struct irq_data *data, unsigned int irq, unsigned int cpu)
301{ 300{
301 struct irq_desc *desc = irq_to_desc(irq);
302 struct irq_chip *chip = irq_data_get_irq_chip(data);
303
302 printk(KERN_INFO "IRQ%u: moving from cpu%u to cpu%u\n", 304 printk(KERN_INFO "IRQ%u: moving from cpu%u to cpu%u\n",
303 irq, desc->node, cpu); 305 irq, data->node, cpu);
304 306
305 raw_spin_lock_irq(&desc->lock); 307 raw_spin_lock_irq(&desc->lock);
306 desc->chip->set_affinity(irq, cpumask_of(cpu)); 308 chip->irq_set_affinity(data, cpumask_of(cpu), false);
307 raw_spin_unlock_irq(&desc->lock); 309 raw_spin_unlock_irq(&desc->lock);
308} 310}
309 311
@@ -314,24 +316,25 @@ static void route_irq(struct irq_desc *desc, unsigned int irq, unsigned int cpu)
314 */ 316 */
315void migrate_irqs(void) 317void migrate_irqs(void)
316{ 318{
317 struct irq_desc *desc;
318 unsigned int irq, cpu = smp_processor_id(); 319 unsigned int irq, cpu = smp_processor_id();
319 320
320 for_each_irq_desc(irq, desc) { 321 for_each_active_irq(irq) {
321 if (desc->node == cpu) { 322 struct irq_data *data = irq_get_irq_data(irq);
322 unsigned int newcpu = cpumask_any_and(desc->affinity, 323
324 if (data->node == cpu) {
325 unsigned int newcpu = cpumask_any_and(data->affinity,
323 cpu_online_mask); 326 cpu_online_mask);
324 if (newcpu >= nr_cpu_ids) { 327 if (newcpu >= nr_cpu_ids) {
325 if (printk_ratelimit()) 328 if (printk_ratelimit())
326 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", 329 printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n",
327 irq, cpu); 330 irq, cpu);
328 331
329 cpumask_setall(desc->affinity); 332 cpumask_setall(data->affinity);
330 newcpu = cpumask_any_and(desc->affinity, 333 newcpu = cpumask_any_and(data->affinity,
331 cpu_online_mask); 334 cpu_online_mask);
332 } 335 }
333 336
334 route_irq(desc, irq, newcpu); 337 route_irq(data, irq, newcpu);
335 } 338 }
336 } 339 }
337} 340}
diff --git a/arch/sh/kernel/irq_64.c b/arch/sh/kernel/irq_64.c
index 32365ba0e039..8fc05b997b6d 100644
--- a/arch/sh/kernel/irq_64.c
+++ b/arch/sh/kernel/irq_64.c
@@ -11,17 +11,17 @@
11#include <linux/module.h> 11#include <linux/module.h>
12#include <cpu/registers.h> 12#include <cpu/registers.h>
13 13
14void notrace raw_local_irq_restore(unsigned long flags) 14void notrace arch_local_irq_restore(unsigned long flags)
15{ 15{
16 unsigned long long __dummy; 16 unsigned long long __dummy;
17 17
18 if (flags == RAW_IRQ_DISABLED) { 18 if (flags == ARCH_IRQ_DISABLED) {
19 __asm__ __volatile__ ( 19 __asm__ __volatile__ (
20 "getcon " __SR ", %0\n\t" 20 "getcon " __SR ", %0\n\t"
21 "or %0, %1, %0\n\t" 21 "or %0, %1, %0\n\t"
22 "putcon %0, " __SR "\n\t" 22 "putcon %0, " __SR "\n\t"
23 : "=&r" (__dummy) 23 : "=&r" (__dummy)
24 : "r" (RAW_IRQ_DISABLED) 24 : "r" (ARCH_IRQ_DISABLED)
25 ); 25 );
26 } else { 26 } else {
27 __asm__ __volatile__ ( 27 __asm__ __volatile__ (
@@ -29,13 +29,13 @@ void notrace raw_local_irq_restore(unsigned long flags)
29 "and %0, %1, %0\n\t" 29 "and %0, %1, %0\n\t"
30 "putcon %0, " __SR "\n\t" 30 "putcon %0, " __SR "\n\t"
31 : "=&r" (__dummy) 31 : "=&r" (__dummy)
32 : "r" (~RAW_IRQ_DISABLED) 32 : "r" (~ARCH_IRQ_DISABLED)
33 ); 33 );
34 } 34 }
35} 35}
36EXPORT_SYMBOL(raw_local_irq_restore); 36EXPORT_SYMBOL(arch_local_irq_restore);
37 37
38unsigned long notrace __raw_local_save_flags(void) 38unsigned long notrace arch_local_save_flags(void)
39{ 39{
40 unsigned long flags; 40 unsigned long flags;
41 41
@@ -43,9 +43,9 @@ unsigned long notrace __raw_local_save_flags(void)
43 "getcon " __SR ", %0\n\t" 43 "getcon " __SR ", %0\n\t"
44 "and %0, %1, %0" 44 "and %0, %1, %0"
45 : "=&r" (flags) 45 : "=&r" (flags)
46 : "r" (RAW_IRQ_DISABLED) 46 : "r" (ARCH_IRQ_DISABLED)
47 ); 47 );
48 48
49 return flags; 49 return flags;
50} 50}
51EXPORT_SYMBOL(__raw_local_save_flags); 51EXPORT_SYMBOL(arch_local_save_flags);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 4e278467f76c..d6b018c7ebdc 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -41,6 +41,7 @@
41#include <asm/smp.h> 41#include <asm/smp.h>
42#include <asm/mmu_context.h> 42#include <asm/mmu_context.h>
43#include <asm/mmzone.h> 43#include <asm/mmzone.h>
44#include <asm/sparsemem.h>
44 45
45/* 46/*
46 * Initialize loops_per_jiffy as 10000000 (1000MIPS). 47 * Initialize loops_per_jiffy as 10000000 (1000MIPS).
@@ -52,6 +53,7 @@ struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
52 .type = CPU_SH_NONE, 53 .type = CPU_SH_NONE,
53 .family = CPU_FAMILY_UNKNOWN, 54 .family = CPU_FAMILY_UNKNOWN,
54 .loops_per_jiffy = 10000000, 55 .loops_per_jiffy = 10000000,
56 .phys_bits = MAX_PHYSMEM_BITS,
55 }, 57 },
56}; 58};
57EXPORT_SYMBOL(cpu_data); 59EXPORT_SYMBOL(cpu_data);
@@ -432,6 +434,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
432 if (c->flags & CPU_HAS_L2_CACHE) 434 if (c->flags & CPU_HAS_L2_CACHE)
433 show_cacheinfo(m, "scache", c->scache); 435 show_cacheinfo(m, "scache", c->scache);
434 436
437 seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);
438
435 seq_printf(m, "bogomips\t: %lu.%02lu\n", 439 seq_printf(m, "bogomips\t: %lu.%02lu\n",
436 c->loops_per_jiffy/(500000/HZ), 440 c->loops_per_jiffy/(500000/HZ),
437 (c->loops_per_jiffy/(5000/HZ)) % 100); 441 (c->loops_per_jiffy/(5000/HZ)) % 100);
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index ab89ea4f9414..150aa326afff 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -15,7 +15,7 @@ cacheops-$(CONFIG_CPU_SHX3) += cache-shx3.o
15obj-y += $(cacheops-y) 15obj-y += $(cacheops-y)
16 16
17mmu-y := nommu.o extable_32.o 17mmu-y := nommu.o extable_32.o
18mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o \ 18mmu-$(CONFIG_MMU) := extable_$(BITS).o fault_$(BITS).o gup.o \
19 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o 19 ioremap.o kmap.o pgtable.o tlbflush_$(BITS).o
20 20
21obj-y += $(mmu-y) 21obj-y += $(mmu-y)
diff --git a/arch/sh/mm/gup.c b/arch/sh/mm/gup.c
new file mode 100644
index 000000000000..bf8daf9d9c9b
--- /dev/null
+++ b/arch/sh/mm/gup.c
@@ -0,0 +1,273 @@
1/*
2 * Lockless get_user_pages_fast for SuperH
3 *
4 * Copyright (C) 2009 - 2010 Paul Mundt
5 *
6 * Cloned from the x86 and PowerPC versions, by:
7 *
8 * Copyright (C) 2008 Nick Piggin
9 * Copyright (C) 2008 Novell Inc.
10 */
11#include <linux/sched.h>
12#include <linux/mm.h>
13#include <linux/vmstat.h>
14#include <linux/highmem.h>
15#include <asm/pgtable.h>
16
17static inline pte_t gup_get_pte(pte_t *ptep)
18{
19#ifndef CONFIG_X2TLB
20 return ACCESS_ONCE(*ptep);
21#else
22 /*
23 * With get_user_pages_fast, we walk down the pagetables without
24 * taking any locks. For this we would like to load the pointers
25 * atomically, but that is not possible with 64-bit PTEs. What
26 * we do have is the guarantee that a pte will only either go
27 * from not present to present, or present to not present or both
28 * -- it will not switch to a completely different present page
29 * without a TLB flush in between; something that we are blocking
30 * by holding interrupts off.
31 *
32 * Setting ptes from not present to present goes:
33 * ptep->pte_high = h;
34 * smp_wmb();
35 * ptep->pte_low = l;
36 *
37 * And present to not present goes:
38 * ptep->pte_low = 0;
39 * smp_wmb();
40 * ptep->pte_high = 0;
41 *
42 * We must ensure here that the load of pte_low sees l iff pte_high
43 * sees h. We load pte_high *after* loading pte_low, which ensures we
44 * don't see an older value of pte_high. *Then* we recheck pte_low,
45 * which ensures that we haven't picked up a changed pte high. We might
46 * have got rubbish values from pte_low and pte_high, but we are
47 * guaranteed that pte_low will not have the present bit set *unless*
48 * it is 'l'. And get_user_pages_fast only operates on present ptes, so
49 * we're safe.
50 *
51 * gup_get_pte should not be used or copied outside gup.c without being
52 * very careful -- it does not atomically load the pte or anything that
53 * is likely to be useful for you.
54 */
55 pte_t pte;
56
57retry:
58 pte.pte_low = ptep->pte_low;
59 smp_rmb();
60 pte.pte_high = ptep->pte_high;
61 smp_rmb();
62 if (unlikely(pte.pte_low != ptep->pte_low))
63 goto retry;
64
65 return pte;
66#endif
67}
68
69/*
70 * The performance critical leaf functions are made noinline otherwise gcc
71 * inlines everything into a single function which results in too much
72 * register pressure.
73 */
74static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
75 unsigned long end, int write, struct page **pages, int *nr)
76{
77 u64 mask, result;
78 pte_t *ptep;
79
80#ifdef CONFIG_X2TLB
81 result = _PAGE_PRESENT | _PAGE_EXT(_PAGE_EXT_KERN_READ | _PAGE_EXT_USER_READ);
82 if (write)
83 result |= _PAGE_EXT(_PAGE_EXT_KERN_WRITE | _PAGE_EXT_USER_WRITE);
84#elif defined(CONFIG_SUPERH64)
85 result = _PAGE_PRESENT | _PAGE_USER | _PAGE_READ;
86 if (write)
87 result |= _PAGE_WRITE;
88#else
89 result = _PAGE_PRESENT | _PAGE_USER;
90 if (write)
91 result |= _PAGE_RW;
92#endif
93
94 mask = result | _PAGE_SPECIAL;
95
96 ptep = pte_offset_map(&pmd, addr);
97 do {
98 pte_t pte = gup_get_pte(ptep);
99 struct page *page;
100
101 if ((pte_val(pte) & mask) != result) {
102 pte_unmap(ptep);
103 return 0;
104 }
105 VM_BUG_ON(!pfn_valid(pte_pfn(pte)));
106 page = pte_page(pte);
107 get_page(page);
108 pages[*nr] = page;
109 (*nr)++;
110
111 } while (ptep++, addr += PAGE_SIZE, addr != end);
112 pte_unmap(ptep - 1);
113
114 return 1;
115}
116
117static int gup_pmd_range(pud_t pud, unsigned long addr, unsigned long end,
118 int write, struct page **pages, int *nr)
119{
120 unsigned long next;
121 pmd_t *pmdp;
122
123 pmdp = pmd_offset(&pud, addr);
124 do {
125 pmd_t pmd = *pmdp;
126
127 next = pmd_addr_end(addr, end);
128 if (pmd_none(pmd))
129 return 0;
130 if (!gup_pte_range(pmd, addr, next, write, pages, nr))
131 return 0;
132 } while (pmdp++, addr = next, addr != end);
133
134 return 1;
135}
136
137static int gup_pud_range(pgd_t pgd, unsigned long addr, unsigned long end,
138 int write, struct page **pages, int *nr)
139{
140 unsigned long next;
141 pud_t *pudp;
142
143 pudp = pud_offset(&pgd, addr);
144 do {
145 pud_t pud = *pudp;
146
147 next = pud_addr_end(addr, end);
148 if (pud_none(pud))
149 return 0;
150 if (!gup_pmd_range(pud, addr, next, write, pages, nr))
151 return 0;
152 } while (pudp++, addr = next, addr != end);
153
154 return 1;
155}
156
157/*
158 * Like get_user_pages_fast() except its IRQ-safe in that it won't fall
159 * back to the regular GUP.
160 */
161int __get_user_pages_fast(unsigned long start, int nr_pages, int write,
162 struct page **pages)
163{
164 struct mm_struct *mm = current->mm;
165 unsigned long addr, len, end;
166 unsigned long next;
167 unsigned long flags;
168 pgd_t *pgdp;
169 int nr = 0;
170
171 start &= PAGE_MASK;
172 addr = start;
173 len = (unsigned long) nr_pages << PAGE_SHIFT;
174 end = start + len;
175 if (unlikely(!access_ok(write ? VERIFY_WRITE : VERIFY_READ,
176 (void __user *)start, len)))
177 return 0;
178
179 /*
180 * This doesn't prevent pagetable teardown, but does prevent
181 * the pagetables and pages from being freed.
182 */
183 local_irq_save(flags);
184 pgdp = pgd_offset(mm, addr);
185 do {
186 pgd_t pgd = *pgdp;
187
188 next = pgd_addr_end(addr, end);
189 if (pgd_none(pgd))
190 break;
191 if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
192 break;
193 } while (pgdp++, addr = next, addr != end);
194 local_irq_restore(flags);
195
196 return nr;
197}
198
199/**
200 * get_user_pages_fast() - pin user pages in memory
201 * @start: starting user address
202 * @nr_pages: number of pages from start to pin
203 * @write: whether pages will be written to
204 * @pages: array that receives pointers to the pages pinned.
205 * Should be at least nr_pages long.
206 *
207 * Attempt to pin user pages in memory without taking mm->mmap_sem.
208 * If not successful, it will fall back to taking the lock and
209 * calling get_user_pages().
210 *
211 * Returns number of pages pinned. This may be fewer than the number
212 * requested. If nr_pages is 0 or negative, returns 0. If no pages
213 * were pinned, returns -errno.
214 */
215int get_user_pages_fast(unsigned long start, int nr_pages, int write,
216 struct page **pages)
217{
218 struct mm_struct *mm = current->mm;
219 unsigned long addr, len, end;
220 unsigned long next;
221 pgd_t *pgdp;
222 int nr = 0;
223
224 start &= PAGE_MASK;
225 addr = start;
226 len = (unsigned long) nr_pages << PAGE_SHIFT;
227
228 end = start + len;
229 if (end < start)
230 goto slow_irqon;
231
232 local_irq_disable();
233 pgdp = pgd_offset(mm, addr);
234 do {
235 pgd_t pgd = *pgdp;
236
237 next = pgd_addr_end(addr, end);
238 if (pgd_none(pgd))
239 goto slow;
240 if (!gup_pud_range(pgd, addr, next, write, pages, &nr))
241 goto slow;
242 } while (pgdp++, addr = next, addr != end);
243 local_irq_enable();
244
245 VM_BUG_ON(nr != (end - start) >> PAGE_SHIFT);
246 return nr;
247
248 {
249 int ret;
250
251slow:
252 local_irq_enable();
253slow_irqon:
254 /* Try to get the remaining pages with get_user_pages */
255 start += nr << PAGE_SHIFT;
256 pages += nr;
257
258 down_read(&mm->mmap_sem);
259 ret = get_user_pages(current, mm, start,
260 (end - start) >> PAGE_SHIFT, write, 0, pages, NULL);
261 up_read(&mm->mmap_sem);
262
263 /* Have to be a bit careful with return values */
264 if (nr > 0) {
265 if (ret < 0)
266 ret = nr;
267 else
268 ret += nr;
269 }
270
271 return ret;
272 }
273}
diff --git a/arch/sh/oprofile/Makefile b/arch/sh/oprofile/Makefile
index e85aae73e3dc..ce3b119021e7 100644
--- a/arch/sh/oprofile/Makefile
+++ b/arch/sh/oprofile/Makefile
@@ -1,5 +1,7 @@
1obj-$(CONFIG_OPROFILE) += oprofile.o 1obj-$(CONFIG_OPROFILE) += oprofile.o
2 2
3CFLAGS_common.o += -DUTS_MACHINE='"$(UTS_MACHINE)"'
4
3DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \ 5DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
4 oprof.o cpu_buffer.o buffer_sync.o \ 6 oprof.o cpu_buffer.o buffer_sync.o \
5 event_buffer.o oprofile_files.o \ 7 event_buffer.o oprofile_files.o \
diff --git a/arch/sh/oprofile/backtrace.c b/arch/sh/oprofile/backtrace.c
index 2bc74de23f08..37f3a75ea6cb 100644
--- a/arch/sh/oprofile/backtrace.c
+++ b/arch/sh/oprofile/backtrace.c
@@ -91,7 +91,7 @@ void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
91 if (depth > backtrace_limit) 91 if (depth > backtrace_limit)
92 depth = backtrace_limit; 92 depth = backtrace_limit;
93 93
94 stackaddr = (unsigned long *)regs->regs[15]; 94 stackaddr = (unsigned long *)kernel_stack_pointer(regs);
95 if (!user_mode(regs)) { 95 if (!user_mode(regs)) {
96 if (depth) 96 if (depth)
97 unwind_stack(NULL, regs, stackaddr, 97 unwind_stack(NULL, regs, stackaddr,
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index e10d89376f9b..b4c2d2b946dd 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * arch/sh/oprofile/init.c 2 * arch/sh/oprofile/init.c
3 * 3 *
4 * Copyright (C) 2003 - 2008 Paul Mundt 4 * Copyright (C) 2003 - 2010 Paul Mundt
5 * 5 *
6 * Based on arch/mips/oprofile/common.c: 6 * Based on arch/mips/oprofile/common.c:
7 * 7 *
@@ -18,43 +18,46 @@
18#include <linux/errno.h> 18#include <linux/errno.h>
19#include <linux/smp.h> 19#include <linux/smp.h>
20#include <linux/perf_event.h> 20#include <linux/perf_event.h>
21#include <linux/slab.h>
21#include <asm/processor.h> 22#include <asm/processor.h>
22 23
23#ifdef CONFIG_HW_PERF_EVENTS
24extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth); 24extern void sh_backtrace(struct pt_regs * const regs, unsigned int depth);
25 25
26#ifdef CONFIG_HW_PERF_EVENTS
27/*
28 * This will need to be reworked when multiple PMUs are supported.
29 */
30static char *sh_pmu_op_name;
31
26char *op_name_from_perf_id(void) 32char *op_name_from_perf_id(void)
27{ 33{
28 const char *pmu; 34 return sh_pmu_op_name;
29 char buf[20];
30 int size;
31
32 pmu = perf_pmu_name();
33 if (!pmu)
34 return NULL;
35
36 size = snprintf(buf, sizeof(buf), "sh/%s", pmu);
37 if (size > -1 && size < sizeof(buf))
38 return buf;
39
40 return NULL;
41} 35}
42 36
43int __init oprofile_arch_init(struct oprofile_operations *ops) 37int __init oprofile_arch_init(struct oprofile_operations *ops)
44{ 38{
45 ops->backtrace = sh_backtrace; 39 ops->backtrace = sh_backtrace;
46 40
41 if (perf_num_counters() == 0)
42 return -ENODEV;
43
44 sh_pmu_op_name = kasprintf(GFP_KERNEL, "%s/%s",
45 UTS_MACHINE, perf_pmu_name());
46 if (unlikely(!sh_pmu_op_name))
47 return -ENOMEM;
48
47 return oprofile_perf_init(ops); 49 return oprofile_perf_init(ops);
48} 50}
49 51
50void __exit oprofile_arch_exit(void) 52void __exit oprofile_arch_exit(void)
51{ 53{
52 oprofile_perf_exit(); 54 oprofile_perf_exit();
55 kfree(sh_pmu_op_name);
53} 56}
54#else 57#else
55int __init oprofile_arch_init(struct oprofile_operations *ops) 58int __init oprofile_arch_init(struct oprofile_operations *ops)
56{ 59{
57 pr_info("oprofile: hardware counters not available\n"); 60 ops->backtrace = sh_backtrace;
58 return -ENODEV; 61 return -ENODEV;
59} 62}
60void __exit oprofile_arch_exit(void) {} 63void __exit oprofile_arch_exit(void) {}
diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c
index 3af6516919b7..de65915308fb 100644
--- a/drivers/cdrom/gdrom.c
+++ b/drivers/cdrom/gdrom.c
@@ -142,18 +142,18 @@ static int gdrom_hardreset(struct cdrom_device_info *cd_info);
142 142
143static bool gdrom_is_busy(void) 143static bool gdrom_is_busy(void)
144{ 144{
145 return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) != 0; 145 return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) != 0;
146} 146}
147 147
148static bool gdrom_data_request(void) 148static bool gdrom_data_request(void)
149{ 149{
150 return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x88) == 8; 150 return (__raw_readb(GDROM_ALTSTATUS_REG) & 0x88) == 8;
151} 151}
152 152
153static bool gdrom_wait_clrbusy(void) 153static bool gdrom_wait_clrbusy(void)
154{ 154{
155 unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT; 155 unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
156 while ((ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) && 156 while ((__raw_readb(GDROM_ALTSTATUS_REG) & 0x80) &&
157 (time_before(jiffies, timeout))) 157 (time_before(jiffies, timeout)))
158 cpu_relax(); 158 cpu_relax();
159 return time_before(jiffies, timeout + 1); 159 return time_before(jiffies, timeout + 1);
@@ -181,14 +181,14 @@ static void gdrom_identifydevice(void *buf)
181 gdrom_getsense(NULL); 181 gdrom_getsense(NULL);
182 return; 182 return;
183 } 183 }
184 ctrl_outb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG); 184 __raw_writeb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG);
185 if (!gdrom_wait_busy_sleeps()) { 185 if (!gdrom_wait_busy_sleeps()) {
186 gdrom_getsense(NULL); 186 gdrom_getsense(NULL);
187 return; 187 return;
188 } 188 }
189 /* now read in the data */ 189 /* now read in the data */
190 for (c = 0; c < 40; c++) 190 for (c = 0; c < 40; c++)
191 data[c] = ctrl_inw(GDROM_DATA_REG); 191 data[c] = __raw_readw(GDROM_DATA_REG);
192} 192}
193 193
194static void gdrom_spicommand(void *spi_string, int buflen) 194static void gdrom_spicommand(void *spi_string, int buflen)
@@ -197,21 +197,21 @@ static void gdrom_spicommand(void *spi_string, int buflen)
197 unsigned long timeout; 197 unsigned long timeout;
198 198
199 /* ensure IRQ_WAIT is set */ 199 /* ensure IRQ_WAIT is set */
200 ctrl_outb(0x08, GDROM_ALTSTATUS_REG); 200 __raw_writeb(0x08, GDROM_ALTSTATUS_REG);
201 /* specify how many bytes we expect back */ 201 /* specify how many bytes we expect back */
202 ctrl_outb(buflen & 0xFF, GDROM_BCL_REG); 202 __raw_writeb(buflen & 0xFF, GDROM_BCL_REG);
203 ctrl_outb((buflen >> 8) & 0xFF, GDROM_BCH_REG); 203 __raw_writeb((buflen >> 8) & 0xFF, GDROM_BCH_REG);
204 /* other parameters */ 204 /* other parameters */
205 ctrl_outb(0, GDROM_INTSEC_REG); 205 __raw_writeb(0, GDROM_INTSEC_REG);
206 ctrl_outb(0, GDROM_SECNUM_REG); 206 __raw_writeb(0, GDROM_SECNUM_REG);
207 ctrl_outb(0, GDROM_ERROR_REG); 207 __raw_writeb(0, GDROM_ERROR_REG);
208 /* Wait until we can go */ 208 /* Wait until we can go */
209 if (!gdrom_wait_clrbusy()) { 209 if (!gdrom_wait_clrbusy()) {
210 gdrom_getsense(NULL); 210 gdrom_getsense(NULL);
211 return; 211 return;
212 } 212 }
213 timeout = jiffies + GDROM_DEFAULT_TIMEOUT; 213 timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
214 ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); 214 __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
215 while (!gdrom_data_request() && time_before(jiffies, timeout)) 215 while (!gdrom_data_request() && time_before(jiffies, timeout))
216 cpu_relax(); 216 cpu_relax();
217 if (!time_before(jiffies, timeout + 1)) { 217 if (!time_before(jiffies, timeout + 1)) {
@@ -233,10 +233,10 @@ static char gdrom_execute_diagnostic(void)
233 gdrom_hardreset(gd.cd_info); 233 gdrom_hardreset(gd.cd_info);
234 if (!gdrom_wait_clrbusy()) 234 if (!gdrom_wait_clrbusy())
235 return 0; 235 return 0;
236 ctrl_outb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG); 236 __raw_writeb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG);
237 if (!gdrom_wait_busy_sleeps()) 237 if (!gdrom_wait_busy_sleeps())
238 return 0; 238 return 0;
239 return ctrl_inb(GDROM_ERROR_REG); 239 return __raw_readb(GDROM_ERROR_REG);
240} 240}
241 241
242/* 242/*
@@ -385,7 +385,7 @@ static void gdrom_release(struct cdrom_device_info *cd_info)
385static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore) 385static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore)
386{ 386{
387 /* read the sense key */ 387 /* read the sense key */
388 char sense = ctrl_inb(GDROM_ERROR_REG); 388 char sense = __raw_readb(GDROM_ERROR_REG);
389 sense &= 0xF0; 389 sense &= 0xF0;
390 if (sense == 0) 390 if (sense == 0)
391 return CDS_DISC_OK; 391 return CDS_DISC_OK;
@@ -398,16 +398,16 @@ static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore)
398static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore) 398static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore)
399{ 399{
400 /* check the sense key */ 400 /* check the sense key */
401 return (ctrl_inb(GDROM_ERROR_REG) & 0xF0) == 0x60; 401 return (__raw_readb(GDROM_ERROR_REG) & 0xF0) == 0x60;
402} 402}
403 403
404/* reset the G1 bus */ 404/* reset the G1 bus */
405static int gdrom_hardreset(struct cdrom_device_info *cd_info) 405static int gdrom_hardreset(struct cdrom_device_info *cd_info)
406{ 406{
407 int count; 407 int count;
408 ctrl_outl(0x1fffff, GDROM_RESET_REG); 408 __raw_writel(0x1fffff, GDROM_RESET_REG);
409 for (count = 0xa0000000; count < 0xa0200000; count += 4) 409 for (count = 0xa0000000; count < 0xa0200000; count += 4)
410 ctrl_inl(count); 410 __raw_readl(count);
411 return 0; 411 return 0;
412} 412}
413 413
@@ -536,7 +536,7 @@ static const struct block_device_operations gdrom_bdops = {
536 536
537static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id) 537static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id)
538{ 538{
539 gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG); 539 gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG);
540 if (gd.pending != 1) 540 if (gd.pending != 1)
541 return IRQ_HANDLED; 541 return IRQ_HANDLED;
542 gd.pending = 0; 542 gd.pending = 0;
@@ -546,7 +546,7 @@ static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id)
546 546
547static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id) 547static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id)
548{ 548{
549 gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG); 549 gd.status = __raw_readb(GDROM_STATUSCOMMAND_REG);
550 if (gd.transfer != 1) 550 if (gd.transfer != 1)
551 return IRQ_HANDLED; 551 return IRQ_HANDLED;
552 gd.transfer = 0; 552 gd.transfer = 0;
@@ -600,10 +600,10 @@ static void gdrom_readdisk_dma(struct work_struct *work)
600 spin_unlock(&gdrom_lock); 600 spin_unlock(&gdrom_lock);
601 block = blk_rq_pos(req)/GD_TO_BLK + GD_SESSION_OFFSET; 601 block = blk_rq_pos(req)/GD_TO_BLK + GD_SESSION_OFFSET;
602 block_cnt = blk_rq_sectors(req)/GD_TO_BLK; 602 block_cnt = blk_rq_sectors(req)/GD_TO_BLK;
603 ctrl_outl(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG); 603 __raw_writel(virt_to_phys(req->buffer), GDROM_DMA_STARTADDR_REG);
604 ctrl_outl(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG); 604 __raw_writel(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG);
605 ctrl_outl(1, GDROM_DMA_DIRECTION_REG); 605 __raw_writel(1, GDROM_DMA_DIRECTION_REG);
606 ctrl_outl(1, GDROM_DMA_ENABLE_REG); 606 __raw_writel(1, GDROM_DMA_ENABLE_REG);
607 read_command->cmd[2] = (block >> 16) & 0xFF; 607 read_command->cmd[2] = (block >> 16) & 0xFF;
608 read_command->cmd[3] = (block >> 8) & 0xFF; 608 read_command->cmd[3] = (block >> 8) & 0xFF;
609 read_command->cmd[4] = block & 0xFF; 609 read_command->cmd[4] = block & 0xFF;
@@ -611,18 +611,18 @@ static void gdrom_readdisk_dma(struct work_struct *work)
611 read_command->cmd[9] = (block_cnt >> 8) & 0xFF; 611 read_command->cmd[9] = (block_cnt >> 8) & 0xFF;
612 read_command->cmd[10] = block_cnt & 0xFF; 612 read_command->cmd[10] = block_cnt & 0xFF;
613 /* set for DMA */ 613 /* set for DMA */
614 ctrl_outb(1, GDROM_ERROR_REG); 614 __raw_writeb(1, GDROM_ERROR_REG);
615 /* other registers */ 615 /* other registers */
616 ctrl_outb(0, GDROM_SECNUM_REG); 616 __raw_writeb(0, GDROM_SECNUM_REG);
617 ctrl_outb(0, GDROM_BCL_REG); 617 __raw_writeb(0, GDROM_BCL_REG);
618 ctrl_outb(0, GDROM_BCH_REG); 618 __raw_writeb(0, GDROM_BCH_REG);
619 ctrl_outb(0, GDROM_DSEL_REG); 619 __raw_writeb(0, GDROM_DSEL_REG);
620 ctrl_outb(0, GDROM_INTSEC_REG); 620 __raw_writeb(0, GDROM_INTSEC_REG);
621 /* Wait for registers to reset after any previous activity */ 621 /* Wait for registers to reset after any previous activity */
622 timeout = jiffies + HZ / 2; 622 timeout = jiffies + HZ / 2;
623 while (gdrom_is_busy() && time_before(jiffies, timeout)) 623 while (gdrom_is_busy() && time_before(jiffies, timeout))
624 cpu_relax(); 624 cpu_relax();
625 ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG); 625 __raw_writeb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
626 timeout = jiffies + HZ / 2; 626 timeout = jiffies + HZ / 2;
627 /* Wait for packet command to finish */ 627 /* Wait for packet command to finish */
628 while (gdrom_is_busy() && time_before(jiffies, timeout)) 628 while (gdrom_is_busy() && time_before(jiffies, timeout))
@@ -632,11 +632,11 @@ static void gdrom_readdisk_dma(struct work_struct *work)
632 outsw(GDROM_DATA_REG, &read_command->cmd, 6); 632 outsw(GDROM_DATA_REG, &read_command->cmd, 6);
633 timeout = jiffies + HZ / 2; 633 timeout = jiffies + HZ / 2;
634 /* Wait for any pending DMA to finish */ 634 /* Wait for any pending DMA to finish */
635 while (ctrl_inb(GDROM_DMA_STATUS_REG) && 635 while (__raw_readb(GDROM_DMA_STATUS_REG) &&
636 time_before(jiffies, timeout)) 636 time_before(jiffies, timeout))
637 cpu_relax(); 637 cpu_relax();
638 /* start transfer */ 638 /* start transfer */
639 ctrl_outb(1, GDROM_DMA_STATUS_REG); 639 __raw_writeb(1, GDROM_DMA_STATUS_REG);
640 wait_event_interruptible_timeout(request_queue, 640 wait_event_interruptible_timeout(request_queue,
641 gd.transfer == 0, GDROM_DEFAULT_TIMEOUT); 641 gd.transfer == 0, GDROM_DEFAULT_TIMEOUT);
642 err = gd.transfer ? -EIO : 0; 642 err = gd.transfer ? -EIO : 0;
@@ -714,11 +714,11 @@ free_id:
714/* set the default mode for DMA transfer */ 714/* set the default mode for DMA transfer */
715static int __devinit gdrom_init_dma_mode(void) 715static int __devinit gdrom_init_dma_mode(void)
716{ 716{
717 ctrl_outb(0x13, GDROM_ERROR_REG); 717 __raw_writeb(0x13, GDROM_ERROR_REG);
718 ctrl_outb(0x22, GDROM_INTSEC_REG); 718 __raw_writeb(0x22, GDROM_INTSEC_REG);
719 if (!gdrom_wait_clrbusy()) 719 if (!gdrom_wait_clrbusy())
720 return -EBUSY; 720 return -EBUSY;
721 ctrl_outb(0xEF, GDROM_STATUSCOMMAND_REG); 721 __raw_writeb(0xEF, GDROM_STATUSCOMMAND_REG);
722 if (!gdrom_wait_busy_sleeps()) 722 if (!gdrom_wait_busy_sleeps())
723 return -EBUSY; 723 return -EBUSY;
724 /* Memory protection setting for GDROM DMA 724 /* Memory protection setting for GDROM DMA
@@ -728,8 +728,8 @@ static int __devinit gdrom_init_dma_mode(void)
728 * Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80 728 * Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80
729 * (0x40 | 0x80) = start range at 0x0C000000 729 * (0x40 | 0x80) = start range at 0x0C000000
730 * (0x7F | 0x80) = end range at 0x0FFFFFFF */ 730 * (0x7F | 0x80) = end range at 0x0FFFFFFF */
731 ctrl_outl(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG); 731 __raw_writel(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG);
732 ctrl_outl(9, GDROM_DMA_WAIT_REG); /* DMA word setting */ 732 __raw_writel(9, GDROM_DMA_WAIT_REG); /* DMA word setting */
733 return 0; 733 return 0;
734} 734}
735 735
diff --git a/drivers/input/keyboard/jornada680_kbd.c b/drivers/input/keyboard/jornada680_kbd.c
index 5fc976dbce0b..7197c5698747 100644
--- a/drivers/input/keyboard/jornada680_kbd.c
+++ b/drivers/input/keyboard/jornada680_kbd.c
@@ -139,35 +139,35 @@ static void jornada_scan_keyb(unsigned char *s)
139 }, *y = matrix_PDE; 139 }, *y = matrix_PDE;
140 140
141 /* Save these control reg bits */ 141 /* Save these control reg bits */
142 dc_static = (ctrl_inw(PDCR) & (~0xcc0c)); 142 dc_static = (__raw_readw(PDCR) & (~0xcc0c));
143 ec_static = (ctrl_inw(PECR) & (~0xf0cf)); 143 ec_static = (__raw_readw(PECR) & (~0xf0cf));
144 144
145 for (i = 0; i < 8; i++) { 145 for (i = 0; i < 8; i++) {
146 /* disable output for all but the one we want to scan */ 146 /* disable output for all but the one we want to scan */
147 ctrl_outw((dc_static | *y++), PDCR); 147 __raw_writew((dc_static | *y++), PDCR);
148 ctrl_outw((ec_static | *y++), PECR); 148 __raw_writew((ec_static | *y++), PECR);
149 udelay(5); 149 udelay(5);
150 150
151 /* Get scanline row */ 151 /* Get scanline row */
152 ctrl_outb(*t++, PDDR); 152 __raw_writeb(*t++, PDDR);
153 ctrl_outb(*t++, PEDR); 153 __raw_writeb(*t++, PEDR);
154 udelay(50); 154 udelay(50);
155 155
156 /* Read data */ 156 /* Read data */
157 *s++ = ctrl_inb(PCDR); 157 *s++ = __raw_readb(PCDR);
158 *s++ = ctrl_inb(PFDR); 158 *s++ = __raw_readb(PFDR);
159 } 159 }
160 /* Scan no lines */ 160 /* Scan no lines */
161 ctrl_outb(0xff, PDDR); 161 __raw_writeb(0xff, PDDR);
162 ctrl_outb(0xff, PEDR); 162 __raw_writeb(0xff, PEDR);
163 163
164 /* Enable all scanlines */ 164 /* Enable all scanlines */
165 ctrl_outw((dc_static | (0x5555 & 0xcc0c)),PDCR); 165 __raw_writew((dc_static | (0x5555 & 0xcc0c)),PDCR);
166 ctrl_outw((ec_static | (0x5555 & 0xf0cf)),PECR); 166 __raw_writew((ec_static | (0x5555 & 0xf0cf)),PECR);
167 167
168 /* Ignore extra keys and events */ 168 /* Ignore extra keys and events */
169 *s++ = ctrl_inb(PGDR); 169 *s++ = __raw_readb(PGDR);
170 *s++ = ctrl_inb(PHDR); 170 *s++ = __raw_readb(PHDR);
171} 171}
172 172
173static void jornadakbd680_poll(struct input_polled_dev *dev) 173static void jornadakbd680_poll(struct input_polled_dev *dev)
diff --git a/drivers/input/touchscreen/hp680_ts_input.c b/drivers/input/touchscreen/hp680_ts_input.c
index 498bd62af09a..dd4e8f020b99 100644
--- a/drivers/input/touchscreen/hp680_ts_input.c
+++ b/drivers/input/touchscreen/hp680_ts_input.c
@@ -28,29 +28,29 @@ static void do_softint(struct work_struct *work)
28 u8 scpdr; 28 u8 scpdr;
29 int touched = 0; 29 int touched = 0;
30 30
31 if (ctrl_inb(PHDR) & PHDR_TS_PEN_DOWN) { 31 if (__raw_readb(PHDR) & PHDR_TS_PEN_DOWN) {
32 scpdr = ctrl_inb(SCPDR); 32 scpdr = __raw_readb(SCPDR);
33 scpdr |= SCPDR_TS_SCAN_ENABLE; 33 scpdr |= SCPDR_TS_SCAN_ENABLE;
34 scpdr &= ~SCPDR_TS_SCAN_Y; 34 scpdr &= ~SCPDR_TS_SCAN_Y;
35 ctrl_outb(scpdr, SCPDR); 35 __raw_writeb(scpdr, SCPDR);
36 udelay(30); 36 udelay(30);
37 37
38 absy = adc_single(ADC_CHANNEL_TS_Y); 38 absy = adc_single(ADC_CHANNEL_TS_Y);
39 39
40 scpdr = ctrl_inb(SCPDR); 40 scpdr = __raw_readb(SCPDR);
41 scpdr |= SCPDR_TS_SCAN_Y; 41 scpdr |= SCPDR_TS_SCAN_Y;
42 scpdr &= ~SCPDR_TS_SCAN_X; 42 scpdr &= ~SCPDR_TS_SCAN_X;
43 ctrl_outb(scpdr, SCPDR); 43 __raw_writeb(scpdr, SCPDR);
44 udelay(30); 44 udelay(30);
45 45
46 absx = adc_single(ADC_CHANNEL_TS_X); 46 absx = adc_single(ADC_CHANNEL_TS_X);
47 47
48 scpdr = ctrl_inb(SCPDR); 48 scpdr = __raw_readb(SCPDR);
49 scpdr |= SCPDR_TS_SCAN_X; 49 scpdr |= SCPDR_TS_SCAN_X;
50 scpdr &= ~SCPDR_TS_SCAN_ENABLE; 50 scpdr &= ~SCPDR_TS_SCAN_ENABLE;
51 ctrl_outb(scpdr, SCPDR); 51 __raw_writeb(scpdr, SCPDR);
52 udelay(100); 52 udelay(100);
53 touched = ctrl_inb(PHDR) & PHDR_TS_PEN_DOWN; 53 touched = __raw_readb(PHDR) & PHDR_TS_PEN_DOWN;
54 } 54 }
55 55
56 if (touched) { 56 if (touched) {
diff --git a/drivers/rtc/rtc-rs5c313.c b/drivers/rtc/rtc-rs5c313.c
index e6ea3f5ee1eb..e3ff179b99ca 100644
--- a/drivers/rtc/rtc-rs5c313.c
+++ b/drivers/rtc/rtc-rs5c313.c
@@ -80,21 +80,21 @@
80/* SCSPTR1 data */ 80/* SCSPTR1 data */
81unsigned char scsptr1_data; 81unsigned char scsptr1_data;
82 82
83#define RS5C313_CEENABLE ctrl_outb(RS5C313_CE_RTCCE, RS5C313_CE); 83#define RS5C313_CEENABLE __raw_writeb(RS5C313_CE_RTCCE, RS5C313_CE);
84#define RS5C313_CEDISABLE ctrl_outb(0x00, RS5C313_CE) 84#define RS5C313_CEDISABLE __raw_writeb(0x00, RS5C313_CE)
85#define RS5C313_MISCOP ctrl_outb(0x02, 0xB0000008) 85#define RS5C313_MISCOP __raw_writeb(0x02, 0xB0000008)
86 86
87static void rs5c313_init_port(void) 87static void rs5c313_init_port(void)
88{ 88{
89 /* Set SCK as I/O port and Initialize SCSPTR1 data & I/O port. */ 89 /* Set SCK as I/O port and Initialize SCSPTR1 data & I/O port. */
90 ctrl_outb(ctrl_inb(SCSMR1) & ~SCSMR1_CA, SCSMR1); 90 __raw_writeb(__raw_readb(SCSMR1) & ~SCSMR1_CA, SCSMR1);
91 ctrl_outb(ctrl_inb(SCSCR1) & ~SCSCR1_CKE, SCSCR1); 91 __raw_writeb(__raw_readb(SCSCR1) & ~SCSCR1_CKE, SCSCR1);
92 92
93 /* And Initialize SCL for RS5C313 clock */ 93 /* And Initialize SCL for RS5C313 clock */
94 scsptr1_data = ctrl_inb(SCSPTR1) | SCL; /* SCL:H */ 94 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */
95 ctrl_outb(scsptr1_data, SCSPTR1); 95 __raw_writeb(scsptr1_data, SCSPTR1);
96 scsptr1_data = ctrl_inb(SCSPTR1) | SCL_OEN; /* SCL output enable */ 96 scsptr1_data = __raw_readb(SCSPTR1) | SCL_OEN; /* SCL output enable */
97 ctrl_outb(scsptr1_data, SCSPTR1); 97 __raw_writeb(scsptr1_data, SCSPTR1);
98 RS5C313_CEDISABLE; /* CE:L */ 98 RS5C313_CEDISABLE; /* CE:L */
99} 99}
100 100
@@ -106,21 +106,21 @@ static void rs5c313_write_data(unsigned char data)
106 /* SDA:Write Data */ 106 /* SDA:Write Data */
107 scsptr1_data = (scsptr1_data & ~SDA) | 107 scsptr1_data = (scsptr1_data & ~SDA) |
108 ((((0x80 >> i) & data) >> (7 - i)) << 2); 108 ((((0x80 >> i) & data) >> (7 - i)) << 2);
109 ctrl_outb(scsptr1_data, SCSPTR1); 109 __raw_writeb(scsptr1_data, SCSPTR1);
110 if (i == 0) { 110 if (i == 0) {
111 scsptr1_data |= SDA_OEN; /* SDA:output enable */ 111 scsptr1_data |= SDA_OEN; /* SDA:output enable */
112 ctrl_outb(scsptr1_data, SCSPTR1); 112 __raw_writeb(scsptr1_data, SCSPTR1);
113 } 113 }
114 ndelay(700); 114 ndelay(700);
115 scsptr1_data &= ~SCL; /* SCL:L */ 115 scsptr1_data &= ~SCL; /* SCL:L */
116 ctrl_outb(scsptr1_data, SCSPTR1); 116 __raw_writeb(scsptr1_data, SCSPTR1);
117 ndelay(700); 117 ndelay(700);
118 scsptr1_data |= SCL; /* SCL:H */ 118 scsptr1_data |= SCL; /* SCL:H */
119 ctrl_outb(scsptr1_data, SCSPTR1); 119 __raw_writeb(scsptr1_data, SCSPTR1);
120 } 120 }
121 121
122 scsptr1_data &= ~SDA_OEN; /* SDA:output disable */ 122 scsptr1_data &= ~SDA_OEN; /* SDA:output disable */
123 ctrl_outb(scsptr1_data, SCSPTR1); 123 __raw_writeb(scsptr1_data, SCSPTR1);
124} 124}
125 125
126static unsigned char rs5c313_read_data(void) 126static unsigned char rs5c313_read_data(void)
@@ -131,12 +131,12 @@ static unsigned char rs5c313_read_data(void)
131 for (i = 0; i < 8; i++) { 131 for (i = 0; i < 8; i++) {
132 ndelay(700); 132 ndelay(700);
133 /* SDA:Read Data */ 133 /* SDA:Read Data */
134 data |= ((ctrl_inb(SCSPTR1) & SDA) >> 2) << (7 - i); 134 data |= ((__raw_readb(SCSPTR1) & SDA) >> 2) << (7 - i);
135 scsptr1_data &= ~SCL; /* SCL:L */ 135 scsptr1_data &= ~SCL; /* SCL:L */
136 ctrl_outb(scsptr1_data, SCSPTR1); 136 __raw_writeb(scsptr1_data, SCSPTR1);
137 ndelay(700); 137 ndelay(700);
138 scsptr1_data |= SCL; /* SCL:H */ 138 scsptr1_data |= SCL; /* SCL:H */
139 ctrl_outb(scsptr1_data, SCSPTR1); 139 __raw_writeb(scsptr1_data, SCSPTR1);
140 } 140 }
141 return data & 0x0F; 141 return data & 0x0F;
142} 142}
diff --git a/drivers/sh/intc/chip.c b/drivers/sh/intc/chip.c
index 35c03706cc21..de885a0f917a 100644
--- a/drivers/sh/intc/chip.c
+++ b/drivers/sh/intc/chip.c
@@ -12,15 +12,16 @@
12#include <linux/io.h> 12#include <linux/io.h>
13#include "internals.h" 13#include "internals.h"
14 14
15void _intc_enable(unsigned int irq, unsigned long handle) 15void _intc_enable(struct irq_data *data, unsigned long handle)
16{ 16{
17 unsigned int irq = data->irq;
17 struct intc_desc_int *d = get_intc_desc(irq); 18 struct intc_desc_int *d = get_intc_desc(irq);
18 unsigned long addr; 19 unsigned long addr;
19 unsigned int cpu; 20 unsigned int cpu;
20 21
21 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) { 22 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_E(handle)); cpu++) {
22#ifdef CONFIG_SMP 23#ifdef CONFIG_SMP
23 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity)) 24 if (!cpumask_test_cpu(cpu, data->affinity))
24 continue; 25 continue;
25#endif 26#endif
26 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu); 27 addr = INTC_REG(d, _INTC_ADDR_E(handle), cpu);
@@ -31,15 +32,16 @@ void _intc_enable(unsigned int irq, unsigned long handle)
31 intc_balancing_enable(irq); 32 intc_balancing_enable(irq);
32} 33}
33 34
34static void intc_enable(unsigned int irq) 35static void intc_enable(struct irq_data *data)
35{ 36{
36 _intc_enable(irq, (unsigned long)get_irq_chip_data(irq)); 37 _intc_enable(data, (unsigned long)irq_data_get_irq_chip_data(data));
37} 38}
38 39
39static void intc_disable(unsigned int irq) 40static void intc_disable(struct irq_data *data)
40{ 41{
42 unsigned int irq = data->irq;
41 struct intc_desc_int *d = get_intc_desc(irq); 43 struct intc_desc_int *d = get_intc_desc(irq);
42 unsigned long handle = (unsigned long)get_irq_chip_data(irq); 44 unsigned long handle = (unsigned long)irq_data_get_irq_chip_data(data);
43 unsigned long addr; 45 unsigned long addr;
44 unsigned int cpu; 46 unsigned int cpu;
45 47
@@ -47,7 +49,7 @@ static void intc_disable(unsigned int irq)
47 49
48 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) { 50 for (cpu = 0; cpu < SMP_NR(d, _INTC_ADDR_D(handle)); cpu++) {
49#ifdef CONFIG_SMP 51#ifdef CONFIG_SMP
50 if (!cpumask_test_cpu(cpu, irq_to_desc(irq)->affinity)) 52 if (!cpumask_test_cpu(cpu, data->affinity))
51 continue; 53 continue;
52#endif 54#endif
53 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu); 55 addr = INTC_REG(d, _INTC_ADDR_D(handle), cpu);
@@ -56,7 +58,7 @@ static void intc_disable(unsigned int irq)
56 } 58 }
57} 59}
58 60
59static int intc_set_wake(unsigned int irq, unsigned int on) 61static int intc_set_wake(struct irq_data *data, unsigned int on)
60{ 62{
61 return 0; /* allow wakeup, but setup hardware in intc_suspend() */ 63 return 0; /* allow wakeup, but setup hardware in intc_suspend() */
62} 64}
@@ -67,24 +69,27 @@ static int intc_set_wake(unsigned int irq, unsigned int on)
67 * additional locking here at the intc desc level. The affinity mask is 69 * additional locking here at the intc desc level. The affinity mask is
68 * later tested in the enable/disable paths. 70 * later tested in the enable/disable paths.
69 */ 71 */
70static int intc_set_affinity(unsigned int irq, const struct cpumask *cpumask) 72static int intc_set_affinity(struct irq_data *data,
73 const struct cpumask *cpumask,
74 bool force)
71{ 75{
72 if (!cpumask_intersects(cpumask, cpu_online_mask)) 76 if (!cpumask_intersects(cpumask, cpu_online_mask))
73 return -1; 77 return -1;
74 78
75 cpumask_copy(irq_to_desc(irq)->affinity, cpumask); 79 cpumask_copy(data->affinity, cpumask);
76 80
77 return 0; 81 return 0;
78} 82}
79#endif 83#endif
80 84
81static void intc_mask_ack(unsigned int irq) 85static void intc_mask_ack(struct irq_data *data)
82{ 86{
87 unsigned int irq = data->irq;
83 struct intc_desc_int *d = get_intc_desc(irq); 88 struct intc_desc_int *d = get_intc_desc(irq);
84 unsigned long handle = intc_get_ack_handle(irq); 89 unsigned long handle = intc_get_ack_handle(irq);
85 unsigned long addr; 90 unsigned long addr;
86 91
87 intc_disable(irq); 92 intc_disable(data);
88 93
89 /* read register and write zero only to the associated bit */ 94 /* read register and write zero only to the associated bit */
90 if (handle) { 95 if (handle) {
@@ -144,6 +149,7 @@ static struct intc_handle_int *intc_find_irq(struct intc_handle_int *hp,
144int intc_set_priority(unsigned int irq, unsigned int prio) 149int intc_set_priority(unsigned int irq, unsigned int prio)
145{ 150{
146 struct intc_desc_int *d = get_intc_desc(irq); 151 struct intc_desc_int *d = get_intc_desc(irq);
152 struct irq_data *data = irq_get_irq_data(irq);
147 struct intc_handle_int *ihp; 153 struct intc_handle_int *ihp;
148 154
149 if (!intc_get_prio_level(irq) || prio <= 1) 155 if (!intc_get_prio_level(irq) || prio <= 1)
@@ -162,7 +168,7 @@ int intc_set_priority(unsigned int irq, unsigned int prio)
162 * priority level will be set during next enable() 168 * priority level will be set during next enable()
163 */ 169 */
164 if (_INTC_FN(ihp->handle) != REG_FN_ERR) 170 if (_INTC_FN(ihp->handle) != REG_FN_ERR)
165 _intc_enable(irq, ihp->handle); 171 _intc_enable(data, ihp->handle);
166 } 172 }
167 return 0; 173 return 0;
168} 174}
@@ -181,8 +187,9 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
181#endif 187#endif
182}; 188};
183 189
184static int intc_set_type(unsigned int irq, unsigned int type) 190static int intc_set_type(struct irq_data *data, unsigned int type)
185{ 191{
192 unsigned int irq = data->irq;
186 struct intc_desc_int *d = get_intc_desc(irq); 193 struct intc_desc_int *d = get_intc_desc(irq);
187 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK]; 194 unsigned char value = intc_irq_sense_table[type & IRQ_TYPE_SENSE_MASK];
188 struct intc_handle_int *ihp; 195 struct intc_handle_int *ihp;
@@ -201,15 +208,15 @@ static int intc_set_type(unsigned int irq, unsigned int type)
201} 208}
202 209
203struct irq_chip intc_irq_chip = { 210struct irq_chip intc_irq_chip = {
204 .mask = intc_disable, 211 .irq_mask = intc_disable,
205 .unmask = intc_enable, 212 .irq_unmask = intc_enable,
206 .mask_ack = intc_mask_ack, 213 .irq_mask_ack = intc_mask_ack,
207 .enable = intc_enable, 214 .irq_enable = intc_enable,
208 .disable = intc_disable, 215 .irq_disable = intc_disable,
209 .shutdown = intc_disable, 216 .irq_shutdown = intc_disable,
210 .set_type = intc_set_type, 217 .irq_set_type = intc_set_type,
211 .set_wake = intc_set_wake, 218 .irq_set_wake = intc_set_wake,
212#ifdef CONFIG_SMP 219#ifdef CONFIG_SMP
213 .set_affinity = intc_set_affinity, 220 .irq_set_affinity = intc_set_affinity,
214#endif 221#endif
215}; 222};
diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
index 306ed287077a..873a99ff8f64 100644
--- a/drivers/sh/intc/core.c
+++ b/drivers/sh/intc/core.c
@@ -71,6 +71,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
71 unsigned int irq) 71 unsigned int irq)
72{ 72{
73 struct intc_handle_int *hp; 73 struct intc_handle_int *hp;
74 struct irq_data *irq_data;
74 unsigned int data[2], primary; 75 unsigned int data[2], primary;
75 unsigned long flags; 76 unsigned long flags;
76 77
@@ -78,7 +79,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
78 * Register the IRQ position with the global IRQ map, then insert 79 * Register the IRQ position with the global IRQ map, then insert
79 * it in to the radix tree. 80 * it in to the radix tree.
80 */ 81 */
81 reserve_irq_vector(irq); 82 irq_reserve_irqs(irq, 1);
82 83
83 raw_spin_lock_irqsave(&intc_big_lock, flags); 84 raw_spin_lock_irqsave(&intc_big_lock, flags);
84 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq)); 85 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq));
@@ -111,6 +112,8 @@ static void __init intc_register_irq(struct intc_desc *desc,
111 112
112 BUG_ON(!data[primary]); /* must have primary masking method */ 113 BUG_ON(!data[primary]); /* must have primary masking method */
113 114
115 irq_data = irq_get_irq_data(irq);
116
114 disable_irq_nosync(irq); 117 disable_irq_nosync(irq);
115 set_irq_chip_and_handler_name(irq, &d->chip, 118 set_irq_chip_and_handler_name(irq, &d->chip,
116 handle_level_irq, "level"); 119 handle_level_irq, "level");
@@ -123,7 +126,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
123 126
124 /* enable secondary masking method if present */ 127 /* enable secondary masking method if present */
125 if (data[!primary]) 128 if (data[!primary])
126 _intc_enable(irq, data[!primary]); 129 _intc_enable(irq_data, data[!primary]);
127 130
128 /* add irq to d->prio list if priority is available */ 131 /* add irq to d->prio list if priority is available */
129 if (data[1]) { 132 if (data[1]) {
@@ -151,7 +154,7 @@ static void __init intc_register_irq(struct intc_desc *desc,
151 } 154 }
152 155
153 /* irq should be disabled by default */ 156 /* irq should be disabled by default */
154 d->chip.mask(irq); 157 d->chip.irq_mask(irq_data);
155 158
156 intc_set_ack_handle(irq, desc, d, enum_id); 159 intc_set_ack_handle(irq, desc, d, enum_id);
157 intc_set_dist_handle(irq, desc, d, enum_id); 160 intc_set_dist_handle(irq, desc, d, enum_id);
@@ -284,7 +287,7 @@ int __init register_intc_controller(struct intc_desc *desc)
284 for (i = 0; i < hw->nr_ack_regs; i++) 287 for (i = 0; i < hw->nr_ack_regs; i++)
285 k += save_reg(d, k, hw->ack_regs[i].set_reg, 0); 288 k += save_reg(d, k, hw->ack_regs[i].set_reg, 0);
286 else 289 else
287 d->chip.mask_ack = d->chip.disable; 290 d->chip.irq_mask_ack = d->chip.irq_disable;
288 291
289 /* disable bits matching force_disable before registering irqs */ 292 /* disable bits matching force_disable before registering irqs */
290 if (desc->force_disable) 293 if (desc->force_disable)
@@ -300,13 +303,13 @@ int __init register_intc_controller(struct intc_desc *desc)
300 for (i = 0; i < hw->nr_vectors; i++) { 303 for (i = 0; i < hw->nr_vectors; i++) {
301 struct intc_vect *vect = hw->vectors + i; 304 struct intc_vect *vect = hw->vectors + i;
302 unsigned int irq = evt2irq(vect->vect); 305 unsigned int irq = evt2irq(vect->vect);
303 struct irq_desc *irq_desc; 306 int res;
304 307
305 if (!vect->enum_id) 308 if (!vect->enum_id)
306 continue; 309 continue;
307 310
308 irq_desc = irq_to_desc_alloc_node(irq, numa_node_id()); 311 res = irq_alloc_desc_at(irq, numa_node_id());
309 if (unlikely(!irq_desc)) { 312 if (res != irq && res != -EEXIST) {
310 pr_err("can't get irq_desc for %d\n", irq); 313 pr_err("can't get irq_desc for %d\n", irq);
311 continue; 314 continue;
312 } 315 }
@@ -326,8 +329,8 @@ int __init register_intc_controller(struct intc_desc *desc)
326 * IRQ support, each vector still needs to have 329 * IRQ support, each vector still needs to have
327 * its own backing irq_desc. 330 * its own backing irq_desc.
328 */ 331 */
329 irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id()); 332 res = irq_alloc_desc_at(irq2, numa_node_id());
330 if (unlikely(!irq_desc)) { 333 if (res != irq2 && res != -EEXIST) {
331 pr_err("can't get irq_desc for %d\n", irq2); 334 pr_err("can't get irq_desc for %d\n", irq2);
332 continue; 335 continue;
333 } 336 }
@@ -387,7 +390,9 @@ static SYSDEV_ATTR(name, S_IRUGO, show_intc_name, NULL);
387static int intc_suspend(struct sys_device *dev, pm_message_t state) 390static int intc_suspend(struct sys_device *dev, pm_message_t state)
388{ 391{
389 struct intc_desc_int *d; 392 struct intc_desc_int *d;
393 struct irq_data *data;
390 struct irq_desc *desc; 394 struct irq_desc *desc;
395 struct irq_chip *chip;
391 int irq; 396 int irq;
392 397
393 /* get intc controller associated with this sysdev */ 398 /* get intc controller associated with this sysdev */
@@ -398,17 +403,21 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state)
398 if (d->state.event != PM_EVENT_FREEZE) 403 if (d->state.event != PM_EVENT_FREEZE)
399 break; 404 break;
400 405
401 for_each_irq_desc(irq, desc) { 406 for_each_active_irq(irq) {
407 desc = irq_to_desc(irq);
408 data = irq_get_irq_data(irq);
409 chip = irq_data_get_irq_chip(data);
410
402 /* 411 /*
403 * This will catch the redirect and VIRQ cases 412 * This will catch the redirect and VIRQ cases
404 * due to the dummy_irq_chip being inserted. 413 * due to the dummy_irq_chip being inserted.
405 */ 414 */
406 if (desc->chip != &d->chip) 415 if (chip != &d->chip)
407 continue; 416 continue;
408 if (desc->status & IRQ_DISABLED) 417 if (desc->status & IRQ_DISABLED)
409 desc->chip->disable(irq); 418 chip->irq_disable(data);
410 else 419 else
411 desc->chip->enable(irq); 420 chip->irq_enable(data);
412 } 421 }
413 break; 422 break;
414 case PM_EVENT_FREEZE: 423 case PM_EVENT_FREEZE:
@@ -416,11 +425,15 @@ static int intc_suspend(struct sys_device *dev, pm_message_t state)
416 break; 425 break;
417 case PM_EVENT_SUSPEND: 426 case PM_EVENT_SUSPEND:
418 /* enable wakeup irqs belonging to this intc controller */ 427 /* enable wakeup irqs belonging to this intc controller */
419 for_each_irq_desc(irq, desc) { 428 for_each_active_irq(irq) {
420 if (desc->chip != &d->chip) 429 desc = irq_to_desc(irq);
430 data = irq_get_irq_data(irq);
431 chip = irq_data_get_irq_chip(data);
432
433 if (chip != &d->chip)
421 continue; 434 continue;
422 if ((desc->status & IRQ_WAKEUP)) 435 if ((desc->status & IRQ_WAKEUP))
423 desc->chip->enable(irq); 436 chip->irq_enable(data);
424 } 437 }
425 break; 438 break;
426 } 439 }
diff --git a/drivers/sh/intc/dynamic.c b/drivers/sh/intc/dynamic.c
index 6caecdffe201..4187cce20ffd 100644
--- a/drivers/sh/intc/dynamic.c
+++ b/drivers/sh/intc/dynamic.c
@@ -17,7 +17,7 @@
17#include "internals.h" /* only for activate_irq() damage.. */ 17#include "internals.h" /* only for activate_irq() damage.. */
18 18
19/* 19/*
20 * The intc_irq_map provides a global map of bound IRQ vectors for a 20 * The IRQ bitmap provides a global map of bound IRQ vectors for a
21 * given platform. Allocation of IRQs are either static through the CPU 21 * given platform. Allocation of IRQs are either static through the CPU
22 * vector map, or dynamic in the case of board mux vectors or MSI. 22 * vector map, or dynamic in the case of board mux vectors or MSI.
23 * 23 *
@@ -27,109 +27,38 @@
27 * when dynamically creating IRQs, as well as tying in to otherwise 27 * when dynamically creating IRQs, as well as tying in to otherwise
28 * unused irq_desc positions in the sparse array. 28 * unused irq_desc positions in the sparse array.
29 */ 29 */
30static DECLARE_BITMAP(intc_irq_map, NR_IRQS);
31static DEFINE_RAW_SPINLOCK(vector_lock);
32 30
33/* 31/*
34 * Dynamic IRQ allocation and deallocation 32 * Dynamic IRQ allocation and deallocation
35 */ 33 */
36unsigned int create_irq_nr(unsigned int irq_want, int node) 34unsigned int create_irq_nr(unsigned int irq_want, int node)
37{ 35{
38 unsigned int irq = 0, new; 36 int irq = irq_alloc_desc_at(irq_want, node);
39 unsigned long flags; 37 if (irq < 0)
40 struct irq_desc *desc; 38 return 0;
41
42 raw_spin_lock_irqsave(&vector_lock, flags);
43
44 /*
45 * First try the wanted IRQ
46 */
47 if (test_and_set_bit(irq_want, intc_irq_map) == 0) {
48 new = irq_want;
49 } else {
50 /* .. then fall back to scanning. */
51 new = find_first_zero_bit(intc_irq_map, nr_irqs);
52 if (unlikely(new == nr_irqs))
53 goto out_unlock;
54
55 __set_bit(new, intc_irq_map);
56 }
57
58 desc = irq_to_desc_alloc_node(new, node);
59 if (unlikely(!desc)) {
60 pr_err("can't get irq_desc for %d\n", new);
61 goto out_unlock;
62 }
63
64 desc = move_irq_desc(desc, node);
65 irq = new;
66
67out_unlock:
68 raw_spin_unlock_irqrestore(&vector_lock, flags);
69
70 if (irq > 0) {
71 dynamic_irq_init(irq);
72 activate_irq(irq);
73 }
74 39
40 activate_irq(irq);
75 return irq; 41 return irq;
76} 42}
77 43
78int create_irq(void) 44int create_irq(void)
79{ 45{
80 int nid = cpu_to_node(smp_processor_id()); 46 int irq = irq_alloc_desc(numa_node_id());
81 int irq; 47 if (irq >= 0)
82 48 activate_irq(irq);
83 irq = create_irq_nr(NR_IRQS_LEGACY, nid);
84 if (irq == 0)
85 irq = -1;
86 49
87 return irq; 50 return irq;
88} 51}
89 52
90void destroy_irq(unsigned int irq) 53void destroy_irq(unsigned int irq)
91{ 54{
92 unsigned long flags; 55 irq_free_desc(irq);
93
94 dynamic_irq_cleanup(irq);
95
96 raw_spin_lock_irqsave(&vector_lock, flags);
97 __clear_bit(irq, intc_irq_map);
98 raw_spin_unlock_irqrestore(&vector_lock, flags);
99}
100
101int reserve_irq_vector(unsigned int irq)
102{
103 unsigned long flags;
104 int ret = 0;
105
106 raw_spin_lock_irqsave(&vector_lock, flags);
107 if (test_and_set_bit(irq, intc_irq_map))
108 ret = -EBUSY;
109 raw_spin_unlock_irqrestore(&vector_lock, flags);
110
111 return ret;
112} 56}
113 57
114void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs) 58void reserve_intc_vectors(struct intc_vect *vectors, unsigned int nr_vecs)
115{ 59{
116 unsigned long flags;
117 int i; 60 int i;
118 61
119 raw_spin_lock_irqsave(&vector_lock, flags);
120 for (i = 0; i < nr_vecs; i++) 62 for (i = 0; i < nr_vecs; i++)
121 __set_bit(evt2irq(vectors[i].vect), intc_irq_map); 63 irq_reserve_irqs(evt2irq(vectors[i].vect), 1);
122 raw_spin_unlock_irqrestore(&vector_lock, flags);
123}
124
125void reserve_irq_legacy(void)
126{
127 unsigned long flags;
128 int i, j;
129
130 raw_spin_lock_irqsave(&vector_lock, flags);
131 j = find_first_bit(intc_irq_map, nr_irqs);
132 for (i = 0; i < j; i++)
133 __set_bit(i, intc_irq_map);
134 raw_spin_unlock_irqrestore(&vector_lock, flags);
135} 64}
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
index d49482c623fa..0cf8260971d4 100644
--- a/drivers/sh/intc/internals.h
+++ b/drivers/sh/intc/internals.h
@@ -152,7 +152,7 @@ intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
152 152
153/* chip.c */ 153/* chip.c */
154extern struct irq_chip intc_irq_chip; 154extern struct irq_chip intc_irq_chip;
155void _intc_enable(unsigned int irq, unsigned long handle); 155void _intc_enable(struct irq_data *data, unsigned long handle);
156 156
157/* core.c */ 157/* core.c */
158extern struct list_head intc_list; 158extern struct list_head intc_list;
diff --git a/drivers/sh/intc/virq.c b/drivers/sh/intc/virq.c
index 643dfd4d2057..e5bf5d3c698e 100644
--- a/drivers/sh/intc/virq.c
+++ b/drivers/sh/intc/virq.c
@@ -83,11 +83,11 @@ EXPORT_SYMBOL_GPL(intc_irq_lookup);
83static int add_virq_to_pirq(unsigned int irq, unsigned int virq) 83static int add_virq_to_pirq(unsigned int irq, unsigned int virq)
84{ 84{
85 struct intc_virq_list **last, *entry; 85 struct intc_virq_list **last, *entry;
86 struct irq_desc *desc = irq_to_desc(irq); 86 struct irq_data *data = irq_get_irq_data(irq);
87 87
88 /* scan for duplicates */ 88 /* scan for duplicates */
89 last = (struct intc_virq_list **)&desc->handler_data; 89 last = (struct intc_virq_list **)&data->handler_data;
90 for_each_virq(entry, desc->handler_data) { 90 for_each_virq(entry, data->handler_data) {
91 if (entry->irq == virq) 91 if (entry->irq == virq)
92 return 0; 92 return 0;
93 last = &entry->next; 93 last = &entry->next;
@@ -108,10 +108,12 @@ static int add_virq_to_pirq(unsigned int irq, unsigned int virq)
108 108
109static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) 109static void intc_virq_handler(unsigned int irq, struct irq_desc *desc)
110{ 110{
111 struct intc_virq_list *entry, *vlist = get_irq_data(irq); 111 struct irq_data *data = irq_get_irq_data(irq);
112 struct irq_chip *chip = irq_data_get_irq_chip(data);
113 struct intc_virq_list *entry, *vlist = irq_data_get_irq_data(data);
112 struct intc_desc_int *d = get_intc_desc(irq); 114 struct intc_desc_int *d = get_intc_desc(irq);
113 115
114 desc->chip->mask_ack(irq); 116 chip->irq_mask_ack(data);
115 117
116 for_each_virq(entry, vlist) { 118 for_each_virq(entry, vlist) {
117 unsigned long addr, handle; 119 unsigned long addr, handle;
@@ -123,7 +125,7 @@ static void intc_virq_handler(unsigned int irq, struct irq_desc *desc)
123 generic_handle_irq(entry->irq); 125 generic_handle_irq(entry->irq);
124 } 126 }
125 127
126 desc->chip->unmask(irq); 128 chip->irq_unmask(data);
127} 129}
128 130
129static unsigned long __init intc_subgroup_data(struct intc_subgroup *subgroup, 131static unsigned long __init intc_subgroup_data(struct intc_subgroup *subgroup,
diff --git a/drivers/sh/maple/maple.c b/drivers/sh/maple/maple.c
index 4e8f57d4131f..1e20604257af 100644
--- a/drivers/sh/maple/maple.c
+++ b/drivers/sh/maple/maple.c
@@ -94,9 +94,9 @@ EXPORT_SYMBOL_GPL(maple_driver_unregister);
94/* set hardware registers to enable next round of dma */ 94/* set hardware registers to enable next round of dma */
95static void maple_dma_reset(void) 95static void maple_dma_reset(void)
96{ 96{
97 ctrl_outl(MAPLE_MAGIC, MAPLE_RESET); 97 __raw_writel(MAPLE_MAGIC, MAPLE_RESET);
98 /* set trig type to 0 for software trigger, 1 for hardware (VBLANK) */ 98 /* set trig type to 0 for software trigger, 1 for hardware (VBLANK) */
99 ctrl_outl(1, MAPLE_TRIGTYPE); 99 __raw_writel(1, MAPLE_TRIGTYPE);
100 /* 100 /*
101 * Maple system register 101 * Maple system register
102 * bits 31 - 16 timeout in units of 20nsec 102 * bits 31 - 16 timeout in units of 20nsec
@@ -105,9 +105,9 @@ static void maple_dma_reset(void)
105 * bits 3 - 0 delay (in 1.3ms) between VBLANK and start of DMA 105 * bits 3 - 0 delay (in 1.3ms) between VBLANK and start of DMA
106 * max delay is 11 106 * max delay is 11
107 */ 107 */
108 ctrl_outl(MAPLE_2MBPS | MAPLE_TIMEOUT(0xFFFF), MAPLE_SPEED); 108 __raw_writel(MAPLE_2MBPS | MAPLE_TIMEOUT(0xFFFF), MAPLE_SPEED);
109 ctrl_outl(virt_to_phys(maple_sendbuf), MAPLE_DMAADDR); 109 __raw_writel(virt_to_phys(maple_sendbuf), MAPLE_DMAADDR);
110 ctrl_outl(1, MAPLE_ENABLE); 110 __raw_writel(1, MAPLE_ENABLE);
111} 111}
112 112
113/** 113/**
@@ -130,7 +130,7 @@ EXPORT_SYMBOL_GPL(maple_getcond_callback);
130 130
131static int maple_dma_done(void) 131static int maple_dma_done(void)
132{ 132{
133 return (ctrl_inl(MAPLE_STATE) & 1) == 0; 133 return (__raw_readl(MAPLE_STATE) & 1) == 0;
134} 134}
135 135
136static void maple_release_device(struct device *dev) 136static void maple_release_device(struct device *dev)
@@ -275,7 +275,7 @@ static void maple_send(void)
275 return; 275 return;
276 276
277 /* disable DMA */ 277 /* disable DMA */
278 ctrl_outl(0, MAPLE_ENABLE); 278 __raw_writel(0, MAPLE_ENABLE);
279 279
280 if (!list_empty(&maple_sentq)) 280 if (!list_empty(&maple_sentq))
281 goto finish; 281 goto finish;
@@ -450,7 +450,7 @@ static void maple_vblank_handler(struct work_struct *work)
450 if (!maple_dma_done()) 450 if (!maple_dma_done())
451 return; 451 return;
452 452
453 ctrl_outl(0, MAPLE_ENABLE); 453 __raw_writel(0, MAPLE_ENABLE);
454 454
455 if (!list_empty(&maple_sentq)) 455 if (!list_empty(&maple_sentq))
456 goto finish; 456 goto finish;
@@ -636,7 +636,7 @@ static void maple_dma_handler(struct work_struct *work)
636 636
637 if (!maple_dma_done()) 637 if (!maple_dma_done())
638 return; 638 return;
639 ctrl_outl(0, MAPLE_ENABLE); 639 __raw_writel(0, MAPLE_ENABLE);
640 if (!list_empty(&maple_sentq)) { 640 if (!list_empty(&maple_sentq)) {
641 list_for_each_entry_safe(mq, nmq, &maple_sentq, list) { 641 list_for_each_entry_safe(mq, nmq, &maple_sentq, list) {
642 mdev = mq->dev; 642 mdev = mq->dev;
@@ -796,7 +796,7 @@ static int __init maple_bus_init(void)
796 int retval, i; 796 int retval, i;
797 struct maple_device *mdev[MAPLE_PORTS]; 797 struct maple_device *mdev[MAPLE_PORTS];
798 798
799 ctrl_outl(0, MAPLE_ENABLE); 799 __raw_writel(0, MAPLE_ENABLE);
800 800
801 retval = device_register(&maple_bus); 801 retval = device_register(&maple_bus);
802 if (retval) 802 if (retval)
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index b4f183a31f13..f656d1a43dc0 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -129,7 +129,4 @@ static inline int register_intc_userimask(unsigned long addr)
129} 129}
130#endif 130#endif
131 131
132int reserve_irq_vector(unsigned int irq);
133void reserve_irq_legacy(void);
134
135#endif /* __SH_INTC_H */ 132#endif /* __SH_INTC_H */
diff --git a/sound/sh/aica.c b/sound/sh/aica.c
index a0df401ebb9f..94c6ea7fa7c2 100644
--- a/sound/sh/aica.c
+++ b/sound/sh/aica.c
@@ -188,7 +188,7 @@ static void spu_reset(void)
188 spu_memset(0, 0, 0x200000 / 4); 188 spu_memset(0, 0, 0x200000 / 4);
189 /* Put ARM7 in endless loop */ 189 /* Put ARM7 in endless loop */
190 local_irq_save(flags); 190 local_irq_save(flags);
191 ctrl_outl(0xea000002, SPU_MEMORY_BASE); 191 __raw_writel(0xea000002, SPU_MEMORY_BASE);
192 local_irq_restore(flags); 192 local_irq_restore(flags);
193 spu_enable(); 193 spu_enable();
194} 194}
diff --git a/sound/soc/sh/sh7760-ac97.c b/sound/soc/sh/sh7760-ac97.c
index b897f7b96d89..f8e0ab82ef59 100644
--- a/sound/soc/sh/sh7760-ac97.c
+++ b/sound/soc/sh/sh7760-ac97.c
@@ -52,8 +52,8 @@ static int __init sh7760_ac97_init(void)
52 unsigned short ipsel; 52 unsigned short ipsel;
53 53
54 /* enable both AC97 controllers in pinmux reg */ 54 /* enable both AC97 controllers in pinmux reg */
55 ipsel = ctrl_inw(IPSEL); 55 ipsel = __raw_readw(IPSEL);
56 ctrl_outw(ipsel | (3 << 10), IPSEL); 56 __raw_writew(ipsel | (3 << 10), IPSEL);
57 57
58 ret = -ENOMEM; 58 ret = -ENOMEM;
59 sh7760_ac97_snd_device = platform_device_alloc("soc-audio", -1); 59 sh7760_ac97_snd_device = platform_device_alloc("soc-audio", -1);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-27 13:27:05 -0500