diff options
author | Arend van Spriel <arend@broadcom.com> | 2014-01-06 06:40:43 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2014-01-06 15:48:02 -0500 |
commit | 3bd44d991f1906ee71807e07b388d9d2d94b7f7a (patch) | |
tree | b37f9e83ee7c766e88e2d549f2df297f4d953ff7 | |
parent | af35f55f94595c34076b7bf1cbe0087429d1ae5b (diff) |
brcmfmac: correct detection of save&restore device capability
The detection of the save&restore capability in brcmf_sdio_sr_capable()
is only valid for certain chipsets. This patch should cover it for all
chipsets currently supported.
Reviewed-by: Hante Meuleman <meuleman@broadcom.com>
Reviewed-by: Franky Lin <frankyl@broadcom.com>
Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c | 29 |
1 files changed, 22 insertions, 7 deletions
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c index 270cf9bed65d..ae5f040edb1c 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c | |||
@@ -3384,7 +3384,8 @@ err: | |||
3384 | 3384 | ||
3385 | static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus) | 3385 | static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus) |
3386 | { | 3386 | { |
3387 | u32 addr, reg; | 3387 | u32 addr, reg, pmu_cc3_mask = ~0; |
3388 | int err; | ||
3388 | 3389 | ||
3389 | brcmf_dbg(TRACE, "Enter\n"); | 3390 | brcmf_dbg(TRACE, "Enter\n"); |
3390 | 3391 | ||
@@ -3392,13 +3393,27 @@ static bool brcmf_sdio_sr_capable(struct brcmf_sdio *bus) | |||
3392 | if (bus->ci->pmurev < 17) | 3393 | if (bus->ci->pmurev < 17) |
3393 | return false; | 3394 | return false; |
3394 | 3395 | ||
3395 | /* read PMU chipcontrol register 3*/ | 3396 | switch (bus->ci->chip) { |
3396 | addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr); | 3397 | case BCM43241_CHIP_ID: |
3397 | brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL); | 3398 | case BCM4335_CHIP_ID: |
3398 | addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data); | 3399 | case BCM4339_CHIP_ID: |
3399 | reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL); | 3400 | /* read PMU chipcontrol register 3 */ |
3401 | addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_addr); | ||
3402 | brcmf_sdiod_regwl(bus->sdiodev, addr, 3, NULL); | ||
3403 | addr = CORE_CC_REG(bus->ci->c_inf[0].base, chipcontrol_data); | ||
3404 | reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL); | ||
3405 | return (reg & pmu_cc3_mask) != 0; | ||
3406 | default: | ||
3407 | addr = CORE_CC_REG(bus->ci->c_inf[0].base, pmucapabilities_ext); | ||
3408 | reg = brcmf_sdiod_regrl(bus->sdiodev, addr, &err); | ||
3409 | if ((reg & PCAPEXT_SR_SUPPORTED_MASK) == 0) | ||
3410 | return false; | ||
3400 | 3411 | ||
3401 | return (bool)reg; | 3412 | addr = CORE_CC_REG(bus->ci->c_inf[0].base, retention_ctl); |
3413 | reg = brcmf_sdiod_regrl(bus->sdiodev, addr, NULL); | ||
3414 | return (reg & (PMU_RCTL_MACPHY_DISABLE_MASK | | ||
3415 | PMU_RCTL_LOGIC_DISABLE_MASK)) == 0; | ||
3416 | } | ||
3402 | } | 3417 | } |
3403 | 3418 | ||
3404 | static void brcmf_sdio_sr_init(struct brcmf_sdio *bus) | 3419 | static void brcmf_sdio_sr_init(struct brcmf_sdio *bus) |