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authorMark Brown <broonie@opensource.wolfsonmicro.com>2013-02-11 06:06:49 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-02-11 06:06:49 -0500
commit3bb26706d929cb922c41edd03d1e4a89f2734cea (patch)
tree8e397556497e7b1db0d047d9be275ce7067d895f
parent3dc4b7af38d14fc7eeab18f3c08d533ad84a187e (diff)
parent1a786243235b8a8f4762ee57f185dadd97794fa4 (diff)
Merge remote-tracking branch 'asoc/topic/wm2200' into asoc-next
-rw-r--r--include/sound/wm2200.h22
-rw-r--r--sound/soc/codecs/wm2200.c58
2 files changed, 79 insertions, 1 deletions
diff --git a/include/sound/wm2200.h b/include/sound/wm2200.h
index 79bf55be7ffa..bc7ab1a4b480 100644
--- a/include/sound/wm2200.h
+++ b/include/sound/wm2200.h
@@ -12,6 +12,7 @@
12#define __LINUX_SND_WM2200_H 12#define __LINUX_SND_WM2200_H
13 13
14#define WM2200_GPIO_SET 0x10000 14#define WM2200_GPIO_SET 0x10000
15#define WM2200_MAX_MICBIAS 2
15 16
16enum wm2200_in_mode { 17enum wm2200_in_mode {
17 WM2200_IN_SE = 0, 18 WM2200_IN_SE = 0,
@@ -25,6 +26,24 @@ enum wm2200_dmic_sup {
25 WM2200_DMIC_SUP_MICBIAS2 = 2, 26 WM2200_DMIC_SUP_MICBIAS2 = 2,
26}; 27};
27 28
29enum wm2200_mbias_lvl {
30 WM2200_MBIAS_LVL_1V5 = 1,
31 WM2200_MBIAS_LVL_1V8 = 2,
32 WM2200_MBIAS_LVL_1V9 = 3,
33 WM2200_MBIAS_LVL_2V0 = 4,
34 WM2200_MBIAS_LVL_2V2 = 5,
35 WM2200_MBIAS_LVL_2V4 = 6,
36 WM2200_MBIAS_LVL_2V5 = 7,
37 WM2200_MBIAS_LVL_2V6 = 8,
38};
39
40struct wm2200_micbias {
41 enum wm2200_mbias_lvl mb_lvl; /** Regulated voltage */
42 unsigned int discharge:1; /** Actively discharge */
43 unsigned int fast_start:1; /** Enable aggressive startup ramp rate */
44 unsigned int bypass:1; /** Use bypass mode */
45};
46
28struct wm2200_pdata { 47struct wm2200_pdata {
29 int reset; /** GPIO controlling /RESET, if any */ 48 int reset; /** GPIO controlling /RESET, if any */
30 int ldo_ena; /** GPIO controlling LODENA, if any */ 49 int ldo_ena; /** GPIO controlling LODENA, if any */
@@ -35,7 +54,8 @@ struct wm2200_pdata {
35 enum wm2200_in_mode in_mode[3]; 54 enum wm2200_in_mode in_mode[3];
36 enum wm2200_dmic_sup dmic_sup[3]; 55 enum wm2200_dmic_sup dmic_sup[3];
37 56
38 int micbias_cfg[2]; /** Register value to configure MICBIAS */ 57 /** MICBIAS configurations */
58 struct wm2200_micbias micbias[WM2200_MAX_MICBIAS];
39}; 59};
40 60
41#endif 61#endif
diff --git a/sound/soc/codecs/wm2200.c b/sound/soc/codecs/wm2200.c
index d5371e0d8909..ddc98f02ecbd 100644
--- a/sound/soc/codecs/wm2200.c
+++ b/sound/soc/codecs/wm2200.c
@@ -1109,6 +1109,16 @@ static int wm2200_mixer_values[] = {
1109 static WM2200_MUX_CTL_DECL(name##_aux5); \ 1109 static WM2200_MUX_CTL_DECL(name##_aux5); \
1110 static WM2200_MUX_CTL_DECL(name##_aux6); 1110 static WM2200_MUX_CTL_DECL(name##_aux6);
1111 1111
1112static const char *wm2200_rxanc_input_sel_texts[] = {
1113 "None", "IN1", "IN2", "IN3",
1114};
1115
1116static const struct soc_enum wm2200_rxanc_input_sel =
1117 SOC_ENUM_SINGLE(WM2200_RXANC_SRC,
1118 WM2200_IN_RXANC_SEL_SHIFT,
1119 ARRAY_SIZE(wm2200_rxanc_input_sel_texts),
1120 wm2200_rxanc_input_sel_texts);
1121
1112static const struct snd_kcontrol_new wm2200_snd_controls[] = { 1122static const struct snd_kcontrol_new wm2200_snd_controls[] = {
1113SOC_SINGLE("IN1 High Performance Switch", WM2200_IN1L_CONTROL, 1123SOC_SINGLE("IN1 High Performance Switch", WM2200_IN1L_CONTROL,
1114 WM2200_IN1_OSR_SHIFT, 1, 0), 1124 WM2200_IN1_OSR_SHIFT, 1, 0),
@@ -1141,6 +1151,12 @@ SOC_DOUBLE_R_TLV("IN3 Digital Volume", WM2200_ADC_DIGITAL_VOLUME_3L,
1141 WM2200_ADC_DIGITAL_VOLUME_3R, WM2200_IN3L_DIG_VOL_SHIFT, 1151 WM2200_ADC_DIGITAL_VOLUME_3R, WM2200_IN3L_DIG_VOL_SHIFT,
1142 0xbf, 0, digital_tlv), 1152 0xbf, 0, digital_tlv),
1143 1153
1154SND_SOC_BYTES_MASK("EQL Coefficients", WM2200_EQL_1, 20, WM2200_EQL_ENA),
1155SND_SOC_BYTES_MASK("EQR Coefficients", WM2200_EQR_1, 20, WM2200_EQR_ENA),
1156
1157SND_SOC_BYTES("LHPF1 Coefficeints", WM2200_HPLPF1_2, 1),
1158SND_SOC_BYTES("LHPF2 Coefficeints", WM2200_HPLPF2_2, 1),
1159
1144SOC_SINGLE("OUT1 High Performance Switch", WM2200_DAC_DIGITAL_VOLUME_1L, 1160SOC_SINGLE("OUT1 High Performance Switch", WM2200_DAC_DIGITAL_VOLUME_1L,
1145 WM2200_OUT1_OSR_SHIFT, 1, 0), 1161 WM2200_OUT1_OSR_SHIFT, 1, 0),
1146SOC_SINGLE("OUT2 High Performance Switch", WM2200_DAC_DIGITAL_VOLUME_2L, 1162SOC_SINGLE("OUT2 High Performance Switch", WM2200_DAC_DIGITAL_VOLUME_2L,
@@ -1162,6 +1178,7 @@ SOC_DOUBLE_R_TLV("OUT2 Digital Volume", WM2200_DAC_DIGITAL_VOLUME_2L,
1162 digital_tlv), 1178 digital_tlv),
1163SOC_DOUBLE("OUT2 Switch", WM2200_PDM_1, WM2200_SPK1L_MUTE_SHIFT, 1179SOC_DOUBLE("OUT2 Switch", WM2200_PDM_1, WM2200_SPK1L_MUTE_SHIFT,
1164 WM2200_SPK1R_MUTE_SHIFT, 1, 1), 1180 WM2200_SPK1R_MUTE_SHIFT, 1, 1),
1181SOC_ENUM("RxANC Src", wm2200_rxanc_input_sel),
1165}; 1182};
1166 1183
1167WM2200_MIXER_ENUMS(OUT1L, WM2200_OUT1LMIX_INPUT_1_SOURCE); 1184WM2200_MIXER_ENUMS(OUT1L, WM2200_OUT1LMIX_INPUT_1_SOURCE);
@@ -1548,6 +1565,10 @@ static int wm2200_probe(struct snd_soc_codec *codec)
1548 return ret; 1565 return ret;
1549 } 1566 }
1550 1567
1568 ret = snd_soc_add_codec_controls(codec, wm_adsp_fw_controls, 2);
1569 if (ret != 0)
1570 return ret;
1571
1551 return ret; 1572 return ret;
1552} 1573}
1553 1574
@@ -2182,6 +2203,7 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
2182 struct wm2200_priv *wm2200; 2203 struct wm2200_priv *wm2200;
2183 unsigned int reg; 2204 unsigned int reg;
2184 int ret, i; 2205 int ret, i;
2206 int val;
2185 2207
2186 wm2200 = devm_kzalloc(&i2c->dev, sizeof(struct wm2200_priv), 2208 wm2200 = devm_kzalloc(&i2c->dev, sizeof(struct wm2200_priv),
2187 GFP_KERNEL); 2209 GFP_KERNEL);
@@ -2205,6 +2227,9 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
2205 wm2200->dsp[i].num = i + 1; 2227 wm2200->dsp[i].num = i + 1;
2206 wm2200->dsp[i].dev = &i2c->dev; 2228 wm2200->dsp[i].dev = &i2c->dev;
2207 wm2200->dsp[i].regmap = wm2200->regmap; 2229 wm2200->dsp[i].regmap = wm2200->regmap;
2230 wm2200->dsp[i].sysclk_reg = WM2200_CLOCKING_3;
2231 wm2200->dsp[i].sysclk_mask = WM2200_SYSCLK_FREQ_MASK;
2232 wm2200->dsp[i].sysclk_shift = WM2200_SYSCLK_FREQ_SHIFT;
2208 } 2233 }
2209 2234
2210 wm2200->dsp[0].base = WM2200_DSP1_CONTROL_1; 2235 wm2200->dsp[0].base = WM2200_DSP1_CONTROL_1;
@@ -2215,6 +2240,9 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
2215 wm2200->dsp[1].mem = wm2200_dsp2_regions; 2240 wm2200->dsp[1].mem = wm2200_dsp2_regions;
2216 wm2200->dsp[1].num_mems = ARRAY_SIZE(wm2200_dsp2_regions); 2241 wm2200->dsp[1].num_mems = ARRAY_SIZE(wm2200_dsp2_regions);
2217 2242
2243 for (i = 0; i < ARRAY_SIZE(wm2200->dsp); i++)
2244 wm_adsp1_init(&wm2200->dsp[i]);
2245
2218 if (pdata) 2246 if (pdata)
2219 wm2200->pdata = *pdata; 2247 wm2200->pdata = *pdata;
2220 2248
@@ -2326,6 +2354,36 @@ static int wm2200_i2c_probe(struct i2c_client *i2c,
2326 regmap_write(wm2200->regmap, WM2200_AUDIO_IF_1_16 + i, i); 2354 regmap_write(wm2200->regmap, WM2200_AUDIO_IF_1_16 + i, i);
2327 } 2355 }
2328 2356
2357 for (i = 0; i < WM2200_MAX_MICBIAS; i++) {
2358 if (!wm2200->pdata.micbias[i].mb_lvl &&
2359 !wm2200->pdata.micbias[i].bypass)
2360 continue;
2361
2362 /* Apply default for bypass mode */
2363 if (!wm2200->pdata.micbias[i].mb_lvl)
2364 wm2200->pdata.micbias[i].mb_lvl
2365 = WM2200_MBIAS_LVL_1V5;
2366
2367 val = (wm2200->pdata.micbias[i].mb_lvl -1)
2368 << WM2200_MICB1_LVL_SHIFT;
2369
2370 if (wm2200->pdata.micbias[i].discharge)
2371 val |= WM2200_MICB1_DISCH;
2372
2373 if (wm2200->pdata.micbias[i].fast_start)
2374 val |= WM2200_MICB1_RATE;
2375
2376 if (wm2200->pdata.micbias[i].bypass)
2377 val |= WM2200_MICB1_MODE;
2378
2379 regmap_update_bits(wm2200->regmap,
2380 WM2200_MIC_BIAS_CTRL_1 + i,
2381 WM2200_MICB1_LVL_MASK |
2382 WM2200_MICB1_DISCH |
2383 WM2200_MICB1_MODE |
2384 WM2200_MICB1_RATE, val);
2385 }
2386
2329 for (i = 0; i < ARRAY_SIZE(wm2200->pdata.in_mode); i++) { 2387 for (i = 0; i < ARRAY_SIZE(wm2200->pdata.in_mode); i++) {
2330 regmap_update_bits(wm2200->regmap, wm2200_mic_ctrl_reg[i], 2388 regmap_update_bits(wm2200->regmap, wm2200_mic_ctrl_reg[i],
2331 WM2200_IN1_MODE_MASK | 2389 WM2200_IN1_MODE_MASK |