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authorLennert Buytenhek <buytenh@wantstofly.org>2010-11-29 04:34:58 -0500
committerLennert Buytenhek <buytenh@wantstofly.org>2011-01-13 11:18:43 -0500
commit3b7cff6604768bd561b032a02c38746707cbd3d1 (patch)
tree001b2c53937c2686e72505e5f259c27530b5edbf
parent3cdb791bdabd3771f93522871755ec97a797d0fd (diff)
ARM: lh7a40x: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
-rw-r--r--arch/arm/mach-lh7a40x/arch-kev7a400.c20
-rw-r--r--arch/arm/mach-lh7a40x/arch-lpd7a40x.c25
-rw-r--r--arch/arm/mach-lh7a40x/irq-lh7a400.c30
-rw-r--r--arch/arm/mach-lh7a40x/irq-lh7a404.c60
-rw-r--r--arch/arm/mach-lh7a40x/irq-lpd7a40x.c22
5 files changed, 79 insertions, 78 deletions
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c
index 9088c16662e8..71129c33c7d2 100644
--- a/arch/arm/mach-lh7a40x/arch-kev7a400.c
+++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c
@@ -46,28 +46,28 @@ void __init kev7a400_map_io(void)
46 46
47static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */ 47static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */
48 48
49static void kev7a400_ack_cpld_irq (u32 irq) 49static void kev7a400_ack_cpld_irq(struct irq_data *d)
50{ 50{
51 CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD); 51 CPLD_CL_INT = 1 << (d->irq - IRQ_KEV7A400_CPLD);
52} 52}
53 53
54static void kev7a400_mask_cpld_irq (u32 irq) 54static void kev7a400_mask_cpld_irq(struct irq_data *d)
55{ 55{
56 CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD)); 56 CPLD_IRQ_mask &= ~(1 << (d->irq - IRQ_KEV7A400_CPLD));
57 CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; 57 CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
58} 58}
59 59
60static void kev7a400_unmask_cpld_irq (u32 irq) 60static void kev7a400_unmask_cpld_irq(struct irq_data *d)
61{ 61{
62 CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD); 62 CPLD_IRQ_mask |= 1 << (d->irq - IRQ_KEV7A400_CPLD);
63 CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; 63 CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
64} 64}
65 65
66static struct irq_chip kev7a400_cpld_chip = { 66static struct irq_chip kev7a400_cpld_chip = {
67 .name = "CPLD", 67 .name = "CPLD",
68 .ack = kev7a400_ack_cpld_irq, 68 .irq_ack = kev7a400_ack_cpld_irq,
69 .mask = kev7a400_mask_cpld_irq, 69 .irq_mask = kev7a400_mask_cpld_irq,
70 .unmask = kev7a400_unmask_cpld_irq, 70 .irq_unmask = kev7a400_unmask_cpld_irq,
71}; 71};
72 72
73 73
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
index 7315a569aea1..e735546181ad 100644
--- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c
@@ -159,7 +159,7 @@ static void __init lpd7a40x_init (void)
159#endif 159#endif
160} 160}
161 161
162static void lh7a40x_ack_cpld_irq (u32 irq) 162static void lh7a40x_ack_cpld_irq(struct irq_data *d)
163{ 163{
164 /* CPLD doesn't have ack capability, but some devices may */ 164 /* CPLD doesn't have ack capability, but some devices may */
165 165
@@ -167,14 +167,14 @@ static void lh7a40x_ack_cpld_irq (u32 irq)
167 /* The touch control *must* mask the interrupt because the 167 /* The touch control *must* mask the interrupt because the
168 * interrupt bit is read by the driver to determine if the pen 168 * interrupt bit is read by the driver to determine if the pen
169 * is still down. */ 169 * is still down. */
170 if (irq == IRQ_TOUCH) 170 if (d->irq == IRQ_TOUCH)
171 CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH; 171 CPLD_INTERRUPTS |= CPLD_INTMASK_TOUCH;
172#endif 172#endif
173} 173}
174 174
175static void lh7a40x_mask_cpld_irq (u32 irq) 175static void lh7a40x_mask_cpld_irq(struct irq_data *d)
176{ 176{
177 switch (irq) { 177 switch (d->irq) {
178 case IRQ_LPD7A40X_ETH_INT: 178 case IRQ_LPD7A40X_ETH_INT:
179 CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET; 179 CPLD_INTERRUPTS |= CPLD_INTMASK_ETHERNET;
180 break; 180 break;
@@ -186,9 +186,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq)
186 } 186 }
187} 187}
188 188
189static void lh7a40x_unmask_cpld_irq (u32 irq) 189static void lh7a40x_unmask_cpld_irq(struct irq_data *d)
190{ 190{
191 switch (irq) { 191 switch (d->irq) {
192 case IRQ_LPD7A40X_ETH_INT: 192 case IRQ_LPD7A40X_ETH_INT:
193 CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET; 193 CPLD_INTERRUPTS &= ~CPLD_INTMASK_ETHERNET;
194 break; 194 break;
@@ -201,17 +201,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq)
201} 201}
202 202
203static struct irq_chip lpd7a40x_cpld_chip = { 203static struct irq_chip lpd7a40x_cpld_chip = {
204 .name = "CPLD", 204 .name = "CPLD",
205 .ack = lh7a40x_ack_cpld_irq, 205 .irq_ack = lh7a40x_ack_cpld_irq,
206 .mask = lh7a40x_mask_cpld_irq, 206 .irq_mask = lh7a40x_mask_cpld_irq,
207 .unmask = lh7a40x_unmask_cpld_irq, 207 .irq_unmask = lh7a40x_unmask_cpld_irq,
208}; 208};
209 209
210static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) 210static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
211{ 211{
212 unsigned int mask = CPLD_INTERRUPTS; 212 unsigned int mask = CPLD_INTERRUPTS;
213 213
214 desc->chip->ack (irq); 214 desc->irq_data.chip->irq_ack(&desc->irq_data);
215 215
216 if ((mask & (1<<0)) == 0) /* WLAN */ 216 if ((mask & (1<<0)) == 0) /* WLAN */
217 generic_handle_irq(IRQ_LPD7A40X_ETH_INT); 217 generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -221,7 +221,8 @@ static void lpd7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
221 generic_handle_irq(IRQ_TOUCH); 221 generic_handle_irq(IRQ_TOUCH);
222#endif 222#endif
223 223
224 desc->chip->unmask (irq); /* Level-triggered need this */ 224 /* Level-triggered need this */
225 desc->irq_data.chip->irq_unmask(&desc->irq_data);
225} 226}
226 227
227 228
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c
index 1ad3afcf6b3d..f2e7e655ca35 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a400.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c
@@ -21,34 +21,34 @@
21 21
22 /* CPU IRQ handling */ 22 /* CPU IRQ handling */
23 23
24static void lh7a400_mask_irq (u32 irq) 24static void lh7a400_mask_irq(struct irq_data *d)
25{ 25{
26 INTC_INTENC = (1 << irq); 26 INTC_INTENC = (1 << d->irq);
27} 27}
28 28
29static void lh7a400_unmask_irq (u32 irq) 29static void lh7a400_unmask_irq(struct irq_data *d)
30{ 30{
31 INTC_INTENS = (1 << irq); 31 INTC_INTENS = (1 << d->irq);
32} 32}
33 33
34static void lh7a400_ack_gpio_irq (u32 irq) 34static void lh7a400_ack_gpio_irq(struct irq_data *d)
35{ 35{
36 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); 36 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
37 INTC_INTENC = (1 << irq); 37 INTC_INTENC = (1 << d->irq);
38} 38}
39 39
40static struct irq_chip lh7a400_internal_chip = { 40static struct irq_chip lh7a400_internal_chip = {
41 .name = "MPU", 41 .name = "MPU",
42 .ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ 42 .irq_ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */
43 .mask = lh7a400_mask_irq, 43 .irq_mask = lh7a400_mask_irq,
44 .unmask = lh7a400_unmask_irq, 44 .irq_unmask = lh7a400_unmask_irq,
45}; 45};
46 46
47static struct irq_chip lh7a400_gpio_chip = { 47static struct irq_chip lh7a400_gpio_chip = {
48 .name = "GPIO", 48 .name = "GPIO",
49 .ack = lh7a400_ack_gpio_irq, 49 .irq_ack = lh7a400_ack_gpio_irq,
50 .mask = lh7a400_mask_irq, 50 .irq_mask = lh7a400_mask_irq,
51 .unmask = lh7a400_unmask_irq, 51 .irq_unmask = lh7a400_unmask_irq,
52}; 52};
53 53
54 54
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c
index 12b045b688c6..14b173389573 100644
--- a/arch/arm/mach-lh7a40x/irq-lh7a404.c
+++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c
@@ -43,64 +43,64 @@ static unsigned char irq_pri_vic2[] = {
43 43
44 /* CPU IRQ handling */ 44 /* CPU IRQ handling */
45 45
46static void lh7a404_vic1_mask_irq (u32 irq) 46static void lh7a404_vic1_mask_irq(struct irq_data *d)
47{ 47{
48 VIC1_INTENCLR = (1 << irq); 48 VIC1_INTENCLR = (1 << d->irq);
49} 49}
50 50
51static void lh7a404_vic1_unmask_irq (u32 irq) 51static void lh7a404_vic1_unmask_irq(struct irq_data *d)
52{ 52{
53 VIC1_INTEN = (1 << irq); 53 VIC1_INTEN = (1 << d->irq);
54} 54}
55 55
56static void lh7a404_vic2_mask_irq (u32 irq) 56static void lh7a404_vic2_mask_irq(struct irq_data *d)
57{ 57{
58 VIC2_INTENCLR = (1 << (irq - 32)); 58 VIC2_INTENCLR = (1 << (d->irq - 32));
59} 59}
60 60
61static void lh7a404_vic2_unmask_irq (u32 irq) 61static void lh7a404_vic2_unmask_irq(struct irq_data *d)
62{ 62{
63 VIC2_INTEN = (1 << (irq - 32)); 63 VIC2_INTEN = (1 << (d->irq - 32));
64} 64}
65 65
66static void lh7a404_vic1_ack_gpio_irq (u32 irq) 66static void lh7a404_vic1_ack_gpio_irq(struct irq_data *d)
67{ 67{
68 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); 68 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
69 VIC1_INTENCLR = (1 << irq); 69 VIC1_INTENCLR = (1 << d->irq);
70} 70}
71 71
72static void lh7a404_vic2_ack_gpio_irq (u32 irq) 72static void lh7a404_vic2_ack_gpio_irq(struct irq_data *d)
73{ 73{
74 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (irq)); 74 GPIO_GPIOFEOI = (1 << IRQ_TO_GPIO (d->irq));
75 VIC2_INTENCLR = (1 << irq); 75 VIC2_INTENCLR = (1 << d->irq);
76} 76}
77 77
78static struct irq_chip lh7a404_vic1_chip = { 78static struct irq_chip lh7a404_vic1_chip = {
79 .name = "VIC1", 79 .name = "VIC1",
80 .ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ 80 .irq_ack = lh7a404_vic1_mask_irq, /* Because level-triggered */
81 .mask = lh7a404_vic1_mask_irq, 81 .irq_mask = lh7a404_vic1_mask_irq,
82 .unmask = lh7a404_vic1_unmask_irq, 82 .irq_unmask = lh7a404_vic1_unmask_irq,
83}; 83};
84 84
85static struct irq_chip lh7a404_vic2_chip = { 85static struct irq_chip lh7a404_vic2_chip = {
86 .name = "VIC2", 86 .name = "VIC2",
87 .ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ 87 .irq_ack = lh7a404_vic2_mask_irq, /* Because level-triggered */
88 .mask = lh7a404_vic2_mask_irq, 88 .irq_mask = lh7a404_vic2_mask_irq,
89 .unmask = lh7a404_vic2_unmask_irq, 89 .irq_unmask = lh7a404_vic2_unmask_irq,
90}; 90};
91 91
92static struct irq_chip lh7a404_gpio_vic1_chip = { 92static struct irq_chip lh7a404_gpio_vic1_chip = {
93 .name = "GPIO-VIC1", 93 .name = "GPIO-VIC1",
94 .ack = lh7a404_vic1_ack_gpio_irq, 94 .irq_ack = lh7a404_vic1_ack_gpio_irq,
95 .mask = lh7a404_vic1_mask_irq, 95 .irq_mask = lh7a404_vic1_mask_irq,
96 .unmask = lh7a404_vic1_unmask_irq, 96 .irq_unmask = lh7a404_vic1_unmask_irq,
97}; 97};
98 98
99static struct irq_chip lh7a404_gpio_vic2_chip = { 99static struct irq_chip lh7a404_gpio_vic2_chip = {
100 .name = "GPIO-VIC2", 100 .name = "GPIO-VIC2",
101 .ack = lh7a404_vic2_ack_gpio_irq, 101 .irq_ack = lh7a404_vic2_ack_gpio_irq,
102 .mask = lh7a404_vic2_mask_irq, 102 .irq_mask = lh7a404_vic2_mask_irq,
103 .unmask = lh7a404_vic2_unmask_irq, 103 .irq_unmask = lh7a404_vic2_unmask_irq,
104}; 104};
105 105
106 /* IRQ initialization */ 106 /* IRQ initialization */
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
index fd033bb4342f..1bfdcddcb93e 100644
--- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
+++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c
@@ -20,14 +20,14 @@
20 20
21#include "common.h" 21#include "common.h"
22 22
23static void lh7a40x_ack_cpld_irq (u32 irq) 23static void lh7a40x_ack_cpld_irq(struct irq_data *d)
24{ 24{
25 /* CPLD doesn't have ack capability */ 25 /* CPLD doesn't have ack capability */
26} 26}
27 27
28static void lh7a40x_mask_cpld_irq (u32 irq) 28static void lh7a40x_mask_cpld_irq(struct irq_data *d)
29{ 29{
30 switch (irq) { 30 switch (d->irq) {
31 case IRQ_LPD7A40X_ETH_INT: 31 case IRQ_LPD7A40X_ETH_INT:
32 CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4; 32 CPLD_INTERRUPTS = CPLD_INTERRUPTS | 0x4;
33 break; 33 break;
@@ -37,9 +37,9 @@ static void lh7a40x_mask_cpld_irq (u32 irq)
37 } 37 }
38} 38}
39 39
40static void lh7a40x_unmask_cpld_irq (u32 irq) 40static void lh7a40x_unmask_cpld_irq(struct irq_data *d)
41{ 41{
42 switch (irq) { 42 switch (d->irq) {
43 case IRQ_LPD7A40X_ETH_INT: 43 case IRQ_LPD7A40X_ETH_INT:
44 CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4; 44 CPLD_INTERRUPTS = CPLD_INTERRUPTS & ~ 0x4;
45 break; 45 break;
@@ -50,17 +50,17 @@ static void lh7a40x_unmask_cpld_irq (u32 irq)
50} 50}
51 51
52static struct irq_chip lh7a40x_cpld_chip = { 52static struct irq_chip lh7a40x_cpld_chip = {
53 .name = "CPLD", 53 .name = "CPLD",
54 .ack = lh7a40x_ack_cpld_irq, 54 .irq_ack = lh7a40x_ack_cpld_irq,
55 .mask = lh7a40x_mask_cpld_irq, 55 .irq_mask = lh7a40x_mask_cpld_irq,
56 .unmask = lh7a40x_unmask_cpld_irq, 56 .irq_unmask = lh7a40x_unmask_cpld_irq,
57}; 57};
58 58
59static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc) 59static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
60{ 60{
61 unsigned int mask = CPLD_INTERRUPTS; 61 unsigned int mask = CPLD_INTERRUPTS;
62 62
63 desc->chip->ack (irq); 63 desc->irq_data.chip->ack (irq);
64 64
65 if ((mask & 0x1) == 0) /* WLAN */ 65 if ((mask & 0x1) == 0) /* WLAN */
66 generic_handle_irq(IRQ_LPD7A40X_ETH_INT); 66 generic_handle_irq(IRQ_LPD7A40X_ETH_INT);
@@ -68,7 +68,7 @@ static void lh7a40x_cpld_handler (unsigned int irq, struct irq_desc *desc)
68 if ((mask & 0x2) == 0) /* Touch */ 68 if ((mask & 0x2) == 0) /* Touch */
69 generic_handle_irq(IRQ_LPD7A400_TS); 69 generic_handle_irq(IRQ_LPD7A400_TS);
70 70
71 desc->chip->unmask (irq); /* Level-triggered need this */ 71 desc->irq_data.chip->unmask (irq); /* Level-triggered need this */
72} 72}
73 73
74 74