diff options
author | Georgi Djakov <georgi.djakov@linaro.org> | 2015-03-23 12:47:29 -0400 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@linaro.org> | 2015-03-25 04:46:36 -0400 |
commit | 3a3ad3e9d54c968de1a26fe8ad5982f7ddec7e9f (patch) | |
tree | 98e12f5c3706927aa79b7e1155a453de97ad5916 | |
parent | 07bf2b54cd8555390cf5fced9471689ebf7fd56c (diff) |
mmc: sdhci-msm: Add support for vendor capabilities registers
Some versions of this controller do not advertise their 3.0v and
8bit bus-width support capabilities. It is required to explicitly
set these capabilities for the specific controller versions.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-rw-r--r-- | drivers/mmc/host/sdhci-msm.c | 29 |
1 files changed, 28 insertions, 1 deletions
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 3d32ce896b09..4a09f7608c66 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c | |||
@@ -22,6 +22,11 @@ | |||
22 | 22 | ||
23 | #include "sdhci-pltfm.h" | 23 | #include "sdhci-pltfm.h" |
24 | 24 | ||
25 | #define CORE_MCI_VERSION 0x50 | ||
26 | #define CORE_VERSION_MAJOR_SHIFT 28 | ||
27 | #define CORE_VERSION_MAJOR_MASK (0xf << CORE_VERSION_MAJOR_SHIFT) | ||
28 | #define CORE_VERSION_MINOR_MASK 0xff | ||
29 | |||
25 | #define CORE_HC_MODE 0x78 | 30 | #define CORE_HC_MODE 0x78 |
26 | #define HC_MODE_EN 0x1 | 31 | #define HC_MODE_EN 0x1 |
27 | #define CORE_POWER 0x0 | 32 | #define CORE_POWER 0x0 |
@@ -41,6 +46,8 @@ | |||
41 | #define CORE_VENDOR_SPEC 0x10c | 46 | #define CORE_VENDOR_SPEC 0x10c |
42 | #define CORE_CLK_PWRSAVE BIT(1) | 47 | #define CORE_CLK_PWRSAVE BIT(1) |
43 | 48 | ||
49 | #define CORE_VENDOR_SPEC_CAPABILITIES0 0x11c | ||
50 | |||
44 | #define CDR_SELEXT_SHIFT 20 | 51 | #define CDR_SELEXT_SHIFT 20 |
45 | #define CDR_SELEXT_MASK (0xf << CDR_SELEXT_SHIFT) | 52 | #define CDR_SELEXT_MASK (0xf << CDR_SELEXT_SHIFT) |
46 | #define CMUX_SHIFT_PHASE_SHIFT 24 | 53 | #define CMUX_SHIFT_PHASE_SHIFT 24 |
@@ -426,7 +433,9 @@ static int sdhci_msm_probe(struct platform_device *pdev) | |||
426 | struct sdhci_msm_host *msm_host; | 433 | struct sdhci_msm_host *msm_host; |
427 | struct resource *core_memres; | 434 | struct resource *core_memres; |
428 | int ret; | 435 | int ret; |
429 | u16 host_version; | 436 | u16 host_version, core_minor; |
437 | u32 core_version, caps; | ||
438 | u8 core_major; | ||
430 | 439 | ||
431 | msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); | 440 | msm_host = devm_kzalloc(&pdev->dev, sizeof(*msm_host), GFP_KERNEL); |
432 | if (!msm_host) | 441 | if (!msm_host) |
@@ -516,6 +525,24 @@ static int sdhci_msm_probe(struct platform_device *pdev) | |||
516 | host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >> | 525 | host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >> |
517 | SDHCI_VENDOR_VER_SHIFT)); | 526 | SDHCI_VENDOR_VER_SHIFT)); |
518 | 527 | ||
528 | core_version = readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION); | ||
529 | core_major = (core_version & CORE_VERSION_MAJOR_MASK) >> | ||
530 | CORE_VERSION_MAJOR_SHIFT; | ||
531 | core_minor = core_version & CORE_VERSION_MINOR_MASK; | ||
532 | dev_dbg(&pdev->dev, "MCI Version: 0x%08x, major: 0x%04x, minor: 0x%02x\n", | ||
533 | core_version, core_major, core_minor); | ||
534 | |||
535 | /* | ||
536 | * Support for some capabilities is not advertised by newer | ||
537 | * controller versions and must be explicitly enabled. | ||
538 | */ | ||
539 | if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) { | ||
540 | caps = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES); | ||
541 | caps |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT; | ||
542 | writel_relaxed(caps, host->ioaddr + | ||
543 | CORE_VENDOR_SPEC_CAPABILITIES0); | ||
544 | } | ||
545 | |||
519 | ret = sdhci_add_host(host); | 546 | ret = sdhci_add_host(host); |
520 | if (ret) | 547 | if (ret) |
521 | goto clk_disable; | 548 | goto clk_disable; |