ARM: shmobile: r8a7790: Add CMT devices to DT

Add the CMT0 and CMT1 counters to the r8a7790 device tree and make them
disabled by default.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

1 files changed, 32 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index d9ddecbb859c..7218bfff0bca 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -206,6 +206,38 @@
                              <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
         };
 
+        cmt0: timer@ffca0000 {
+                compatible = "renesas,cmt-48-gen2";
+                reg = <0 0xffca0000 0 0x1004>;
+                interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 143 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
+                clock-names = "fck";
+
+                renesas,channels-mask = <0x60>;
+
+                status = "disabled";
+        };
+
+        cmt1: timer@e6130000 {
+                compatible = "renesas,cmt-48-gen2";
+                reg = <0 0xe6130000 0 0x1004>;
+                interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 121 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 122 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 123 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 124 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 125 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 126 IRQ_TYPE_LEVEL_HIGH>,
+                             <0 127 IRQ_TYPE_LEVEL_HIGH>;
+                clocks = <&mstp3_clks R8A7790_CLK_CMT1>;
+                clock-names = "fck";
+
+                renesas,channels-mask = <0xff>;
+
+                status = "disabled";
+        };
+
         irqc0: interrupt-controller@e61c0000 {
                 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
                 #interrupt-cells = <2>;