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authorArnd Bergmann <arnd@arndb.de>2014-03-17 10:38:07 -0400
committerArnd Bergmann <arnd@arndb.de>2014-03-17 10:38:07 -0400
commit397d77a5669d39c6ee5d373e3a51131959fac21e (patch)
treeb417b96ca2d2a45b4ab87f1fba76a8c97ab24509
parent0daba17de771388a004148a357f7c63d648b0b3b (diff)
parent050208dfd0d725c307e6ad3442d9f809501091cd (diff)
Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/cleanup
Merge "First batch of AT91 cleanup for 3.15" from Nicolas Ferre: - some updates on the defconfig front - two SoCs converted to Device Tree: sam9261 and sam9rl (with use of CCF!) - a little PWM clock update that goes on top of this * tag 'at91-cleanup' of git://github.com/at91linux/linux-at91: ARM: at91: add PWM clock ARM: at91: move sam9261 SoC to common clk ARM: at91: prepare common clk transition for sam9261 SoC ARM: at91: updated the at91_dt_defconfig with support for the ADS7846 ARM: at91: dt: sam9261: Device Tree support for the at91sam9261ek ARM: at91: dt: defconfig: Added the sam9261 to the list of DT-enabled SOCs ARM: at91: dt: Add at91sam9261 dt SoC support ARM: at91: switch sam9rl to common clock framework ARM: at91/dt: define main clk frequency of at91sam9rlek ARM: at91/dt: define at91sam9rl clocks ARM: at91: prepare common clk transition for sam9rl SoCs ARM: at91: prepare sam9 dt boards transition to common clk ARM: at91: dt: sam9rl: Device Tree for the at91sam9rlek ARM: at91/defconfig: Add the sam9rl to the list of DT-enabled SOCs ARM: at91: Add at91sam9rl DT SoC support ARM: at91: prepare at91sam9rl DT transition ARM: at91/defconfig: refresh at91sam9260_9g20_defconfig ARM: at91/defconfig: remove useless configuration in at91sam9260_9g20_defconfig ARM: at91/defconfig: refresh at91sam9rl_defconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat
-rw-r--r--arch/arm/boot/dts/Makefile4
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi735
-rw-r--r--arch/arm/boot/dts/at91sam9261ek.dts211
-rw-r--r--arch/arm/boot/dts/at91sam9rl.dtsi802
-rw-r--r--arch/arm/boot/dts/at91sam9rlek.dts157
-rw-r--r--arch/arm/configs/at91_dt_defconfig3
-rw-r--r--arch/arm/configs/at91sam9260_9g20_defconfig9
-rw-r--r--arch/arm/configs/at91sam9rl_defconfig10
-rw-r--r--arch/arm/mach-at91/Kconfig2
-rw-r--r--arch/arm/mach-at91/at91sam9261.c25
-rw-r--r--arch/arm/mach-at91/at91sam9263.c1
-rw-r--r--arch/arm/mach-at91/at91sam9g45.c1
-rw-r--r--arch/arm/mach-at91/at91sam9n12.c1
-rw-r--r--arch/arm/mach-at91/at91sam9rl.c24
-rw-r--r--arch/arm/mach-at91/at91sam9x5.c1
-rw-r--r--arch/arm/mach-at91/board-dt-sam9.c11
16 files changed, 1981 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 3269029a1ce6..ea3964b8511f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -12,6 +12,8 @@ dtb-$(CONFIG_ARCH_AT91) += ethernut5.dtb
12dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb 12dtb-$(CONFIG_ARCH_AT91) += evk-pro3.dtb
13dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb 13dtb-$(CONFIG_ARCH_AT91) += tny_a9260.dtb
14dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb 14dtb-$(CONFIG_ARCH_AT91) += usb_a9260.dtb
15# sam9261
16dtb-$(CONFIG_ARCH_AT91) += at91sam9261ek.dtb
15# sam9263 17# sam9263
16dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb 18dtb-$(CONFIG_ARCH_AT91) += at91sam9263ek.dtb
17dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb 19dtb-$(CONFIG_ARCH_AT91) += tny_a9263.dtb
@@ -29,6 +31,8 @@ dtb-$(CONFIG_ARCH_AT91) += at91sam9m10g45ek.dtb
29dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb 31dtb-$(CONFIG_ARCH_AT91) += pm9g45.dtb
30# sam9n12 32# sam9n12
31dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb 33dtb-$(CONFIG_ARCH_AT91) += at91sam9n12ek.dtb
34# sam9rl
35dtb-$(CONFIG_ARCH_AT91) += at91sam9rlek.dtb
32# sam9x5 36# sam9x5
33dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb 37dtb-$(CONFIG_ARCH_AT91) += at91-ariag25.dtb
34dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb 38dtb-$(CONFIG_ARCH_AT91) += at91-cosino_mega2560.dtb
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
new file mode 100644
index 000000000000..e21dda0e8986
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -0,0 +1,735 @@
1/*
2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
3 *
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clk/at91.h>
14
15/ {
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 gpio0 = &pioA;
26 gpio1 = &pioB;
27 gpio2 = &pioC;
28 tcb0 = &tcb0;
29 i2c0 = &i2c0;
30 ssc0 = &ssc0;
31 ssc1 = &ssc1;
32 };
33
34 cpus {
35 #address-cells = <0>;
36 #size-cells = <0>;
37
38 cpu {
39 compatible = "arm,arm926ej-s";
40 device_type = "cpu";
41 };
42 };
43
44 memory {
45 reg = <0x20000000 0x08000000>;
46 };
47
48 ahb {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 ranges;
53
54 usb0: ohci@00500000 {
55 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
56 reg = <0x00500000 0x100000>;
57 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
58 clocks = <&usb>, <&ohci_clk>, <&hclk0>, <&uhpck>;
59 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
60 status = "disabled";
61 };
62
63 fb0: fb@0x00600000 {
64 compatible = "atmel,at91sam9261-lcdc";
65 reg = <0x00600000 0x1000>;
66 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_fb>;
69 clocks = <&lcd_clk>, <&hclk1>;
70 clock-names = "lcdc_clk", "hclk";
71 status = "disabled";
72 };
73
74 nand0: nand@40000000 {
75 compatible = "atmel,at91rm9200-nand";
76 #address-cells = <1>;
77 #size-cells = <1>;
78 reg = <0x40000000 0x10000000>;
79 atmel,nand-addr-offset = <22>;
80 atmel,nand-cmd-offset = <21>;
81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_nand>;
83
84 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
85 <&pioC 14 GPIO_ACTIVE_HIGH>,
86 <0>;
87 status = "disabled";
88 };
89
90 apb {
91 compatible = "simple-bus";
92 #address-cells = <1>;
93 #size-cells = <1>;
94 ranges;
95
96 tcb0: timer@fffa0000 {
97 compatible = "atmel,at91rm9200-tcb";
98 reg = <0xfffa0000 0x100>;
99 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
100 <18 IRQ_TYPE_LEVEL_HIGH 0>,
101 <19 IRQ_TYPE_LEVEL_HIGH 0>;
102 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
103 clock-names = "t0_clk", "t1_clk", "t2_clk";
104 };
105
106 usb1: gadget@fffa4000 {
107 compatible = "atmel,at91rm9200-udc";
108 reg = <0xfffa4000 0x4000>;
109 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
110 clocks = <&usb>, <&udc_clk>, <&udpck>;
111 clock-names = "usb_clk", "udc_clk", "udpck";
112 status = "disabled";
113 };
114
115 mmc0: mmc@fffa8000 {
116 compatible = "atmel,hsmci";
117 reg = <0xfffa8000 0x600>;
118 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
121 #address-cells = <1>;
122 #size-cells = <0>;
123 clocks = <&mci0_clk>;
124 clock-names = "mci_clk";
125 status = "disabled";
126 };
127
128 i2c0: i2c@fffac000 {
129 compatible = "atmel,at91sam9261-i2c";
130 pinctrl-names = "default";
131 pinctrl-0 = <&pinctrl_i2c_twi>;
132 reg = <0xfffac000 0x100>;
133 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
134 #address-cells = <1>;
135 #size-cells = <0>;
136 clocks = <&twi0_clk>;
137 status = "disabled";
138 };
139
140 usart0: serial@fffb0000 {
141 compatible = "atmel,at91sam9260-usart";
142 reg = <0xfffb0000 0x200>;
143 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
144 atmel,use-dma-rx;
145 atmel,use-dma-tx;
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_usart0>;
148 clocks = <&usart0_clk>;
149 clock-names = "usart";
150 status = "disabled";
151 };
152
153 usart1: serial@fffb4000 {
154 compatible = "atmel,at91sam9260-usart";
155 reg = <0xfffb4000 0x200>;
156 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
157 atmel,use-dma-rx;
158 atmel,use-dma-tx;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_usart1>;
161 clocks = <&usart1_clk>;
162 clock-names = "usart";
163 status = "disabled";
164 };
165
166 usart2: serial@fffb8000{
167 compatible = "atmel,at91sam9260-usart";
168 reg = <0xfffb8000 0x200>;
169 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
170 atmel,use-dma-rx;
171 atmel,use-dma-tx;
172 pinctrl-names = "default";
173 pinctrl-0 = <&pinctrl_usart2>;
174 clocks = <&usart2_clk>;
175 clock-names = "usart";
176 status = "disabled";
177 };
178
179 ssc0: ssc@fffbc000 {
180 compatible = "atmel,at91rm9200-ssc";
181 reg = <0xfffbc000 0x4000>;
182 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
185 status = "disabled";
186 };
187
188 ssc1: ssc@fffc0000 {
189 compatible = "atmel,at91rm9200-ssc";
190 reg = <0xfffc0000 0x4000>;
191 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
194 status = "disabled";
195 };
196
197 spi0: spi@fffc8000 {
198 #address-cells = <1>;
199 #size-cells = <0>;
200 compatible = "atmel,at91rm9200-spi";
201 reg = <0xfffc8000 0x200>;
202 cs-gpios = <0>, <0>, <0>, <0>;
203 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&pinctrl_spi0>;
206 clocks = <&spi0_clk>;
207 clock-names = "spi_clk";
208 status = "disabled";
209 };
210
211 spi1: spi@fffcc000 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "atmel,at91rm9200-spi";
215 reg = <0xfffcc000 0x200>;
216 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&pinctrl_spi1>;
219 clocks = <&spi1_clk>;
220 clock-names = "spi_clk";
221 status = "disabled";
222 };
223
224 ramc: ramc@ffffea00 {
225 compatible = "atmel,at91sam9260-sdramc";
226 reg = <0xffffea00 0x200>;
227 };
228
229 matrix: matrix@ffffee00 {
230 compatible = "atmel,at91sam9260-bus-matrix";
231 reg = <0xffffee00 0x200>;
232 };
233
234 aic: interrupt-controller@fffff000 {
235 #interrupt-cells = <3>;
236 compatible = "atmel,at91rm9200-aic";
237 interrupt-controller;
238 reg = <0xfffff000 0x200>;
239 atmel,external-irqs = <29 30 31>;
240 };
241
242 dbgu: serial@fffff200 {
243 compatible = "atmel,at91sam9260-usart";
244 reg = <0xfffff200 0x200>;
245 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_dbgu>;
248 clocks = <&mck>;
249 clock-names = "usart";
250 status = "disabled";
251 };
252
253 pinctrl@fffff400 {
254 #address-cells = <1>;
255 #size-cells = <1>;
256 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
257 ranges = <0xfffff400 0xfffff400 0x600>;
258
259 atmel,mux-mask =
260 /* A B */
261 <0xffffffff 0xfffffff7>, /* pioA */
262 <0xffffffff 0xfffffff4>, /* pioB */
263 <0xffffffff 0xffffff07>; /* pioC */
264
265 /* shared pinctrl settings */
266 dbgu {
267 pinctrl_dbgu: dbgu-0 {
268 atmel,pins =
269 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
270 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
271 };
272 };
273
274 usart0 {
275 pinctrl_usart0: usart0-0 {
276 atmel,pins =
277 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
278 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
279 };
280
281 pinctrl_usart0_rts: usart0_rts-0 {
282 atmel,pins =
283 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
284 };
285
286 pinctrl_usart0_cts: usart0_cts-0 {
287 atmel,pins =
288 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
289 };
290 };
291
292 usart1 {
293 pinctrl_usart1: usart1-0 {
294 atmel,pins =
295 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
296 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
297 };
298
299 pinctrl_usart1_rts: usart1_rts-0 {
300 atmel,pins =
301 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
302 };
303
304 pinctrl_usart1_cts: usart1_cts-0 {
305 atmel,pins =
306 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
307 };
308 };
309
310 usart2 {
311 pinctrl_usart2: usart2-0 {
312 atmel,pins =
313 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
314 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
315 };
316
317 pinctrl_usart2_rts: usart2_rts-0 {
318 atmel,pins =
319 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
320 };
321
322 pinctrl_usart2_cts: usart2_cts-0 {
323 atmel,pins =
324 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
325 };
326 };
327
328 nand {
329 pinctrl_nand: nand-0 {
330 atmel,pins =
331 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
332 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
333 };
334 };
335
336 mmc0 {
337 pinctrl_mmc0_clk: mmc0_clk-0 {
338 atmel,pins =
339 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
340 };
341
342 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
343 atmel,pins =
344 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
345 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
346 };
347
348 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
349 atmel,pins =
350 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
351 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
352 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
353 };
354 };
355
356 ssc0 {
357 pinctrl_ssc0_tx: ssc0_tx-0 {
358 atmel,pins =
359 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
360 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
361 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
362 };
363
364 pinctrl_ssc0_rx: ssc0_rx-0 {
365 atmel,pins =
366 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
367 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
368 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
369 };
370 };
371
372 ssc1 {
373 pinctrl_ssc1_tx: ssc1_tx-0 {
374 atmel,pins =
375 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
376 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
377 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
378 };
379
380 pinctrl_ssc1_rx: ssc1_rx-0 {
381 atmel,pins =
382 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
383 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
384 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
385 };
386 };
387
388 spi0 {
389 pinctrl_spi0: spi0-0 {
390 atmel,pins =
391 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
392 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
393 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
394 };
395 };
396
397 spi1 {
398 pinctrl_spi1: spi1-0 {
399 atmel,pins =
400 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
401 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
402 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
403 };
404 };
405
406 tcb0 {
407 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
408 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 };
410
411 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
412 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
413 };
414
415 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
416 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
417 };
418
419 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
420 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
421 };
422
423 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
424 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
425 };
426
427 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
428 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429 };
430
431 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
432 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
436 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
437 };
438
439 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
440 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
441 };
442 };
443
444 i2c0 {
445 pinctrl_i2c_bitbang: i2c-0-bitbang {
446 atmel,pins =
447 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
448 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
449 };
450 pinctrl_i2c_twi: i2c-0-twi {
451 atmel,pins =
452 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
454 };
455 };
456
457 fb {
458 pinctrl_fb: fb-0 {
459 atmel,pins =
460 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
461 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
462 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
463 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
464 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
465 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
466 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
467 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
468 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
469 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
470 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
471 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
472 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
473 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
474 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
475 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
476 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
477 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
478 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
479 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
480 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
481 };
482 };
483
484 pioA: gpio@fffff400 {
485 compatible = "atmel,at91rm9200-gpio";
486 reg = <0xfffff400 0x200>;
487 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
488 #gpio-cells = <2>;
489 gpio-controller;
490 interrupt-controller;
491 #interrupt-cells = <2>;
492 clocks = <&pioA_clk>;
493 };
494
495 pioB: gpio@fffff600 {
496 compatible = "atmel,at91rm9200-gpio";
497 reg = <0xfffff600 0x200>;
498 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
499 #gpio-cells = <2>;
500 gpio-controller;
501 interrupt-controller;
502 #interrupt-cells = <2>;
503 clocks = <&pioB_clk>;
504 };
505
506 pioC: gpio@fffff800 {
507 compatible = "atmel,at91rm9200-gpio";
508 reg = <0xfffff800 0x200>;
509 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
510 #gpio-cells = <2>;
511 gpio-controller;
512 interrupt-controller;
513 #interrupt-cells = <2>;
514 clocks = <&pioC_clk>;
515 };
516 };
517
518 pmc: pmc@fffffc00 {
519 compatible = "atmel,at91rm9200-pmc";
520 reg = <0xfffffc00 0x100>;
521 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
522 interrupt-controller;
523 #address-cells = <1>;
524 #size-cells = <0>;
525 #interrupt-cells = <1>;
526
527 clk32k: slck {
528 compatible = "fixed-clock";
529 #clock-cells = <0>;
530 clock-frequency = <32768>;
531 };
532
533 main: mainck {
534 compatible = "atmel,at91rm9200-clk-main";
535 #clock-cells = <0>;
536 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
537 clocks = <&clk32k>;
538 };
539
540 plla: pllack {
541 compatible = "atmel,at91rm9200-clk-pll";
542 #clock-cells = <0>;
543 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
544 clocks = <&main>;
545 reg = <0>;
546 atmel,clk-input-range = <1000000 32000000>;
547 #atmel,pll-clk-output-range-cells = <4>;
548 atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
549 };
550
551 pllb: pllbck {
552 compatible = "atmel,at91rm9200-clk-pll";
553 #clock-cells = <0>;
554 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
555 clocks = <&main>;
556 reg = <1>;
557 atmel,clk-input-range = <1000000 32000000>;
558 #atmel,pll-clk-output-range-cells = <4>;
559 atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
560 };
561
562 mck: masterck {
563 compatible = "atmel,at91rm9200-clk-master";
564 #clock-cells = <0>;
565 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
566 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
567 atmel,clk-output-range = <0 94000000>;
568 atmel,clk-divisors = <1 2 4 3>;
569 };
570
571 usb: usbck {
572 compatible = "atmel,at91rm9200-clk-usb";
573 #clock-cells = <0>;
574 atmel,clk-divisors = <1 2 4 3>;
575 clocks = <&pllb>;
576 };
577
578 systemck {
579 compatible = "atmel,at91rm9200-clk-system";
580 #address-cells = <1>;
581 #size-cells = <0>;
582
583 uhpck: uhpck {
584 #clock-cells = <0>;
585 reg = <6>;
586 clocks = <&usb>;
587 };
588
589 udpck: udpck {
590 #clock-cells = <0>;
591 reg = <7>;
592 clocks = <&usb>;
593 };
594
595 hclk0: hclk0 {
596 #clock-cells = <0>;
597 reg = <16>;
598 clocks = <&mck>;
599 };
600
601 hclk1: hclk1 {
602 #clock-cells = <0>;
603 reg = <17>;
604 clocks = <&mck>;
605 };
606 };
607
608 periphck {
609 compatible = "atmel,at91rm9200-clk-peripheral";
610 #address-cells = <1>;
611 #size-cells = <0>;
612 clocks = <&mck>;
613
614 pioA_clk: pioA_clk {
615 #clock-cells = <0>;
616 reg = <2>;
617 };
618
619 pioB_clk: pioB_clk {
620 #clock-cells = <0>;
621 reg = <3>;
622 };
623
624 pioC_clk: pioC_clk {
625 #clock-cells = <0>;
626 reg = <4>;
627 };
628
629 usart0_clk: usart0_clk {
630 #clock-cells = <0>;
631 reg = <6>;
632 };
633
634 usart1_clk: usart1_clk {
635 #clock-cells = <0>;
636 reg = <7>;
637 };
638
639 usart2_clk: usart2_clk {
640 #clock-cells = <0>;
641 reg = <8>;
642 };
643
644 mci0_clk: mci0_clk {
645 #clock-cells = <0>;
646 reg = <9>;
647 };
648
649 udc_clk: udc_clk {
650 #clock-cells = <0>;
651 reg = <10>;
652 };
653
654 twi0_clk: twi0_clk {
655 reg = <11>;
656 #clock-cells = <0>;
657 };
658
659 spi0_clk: spi0_clk {
660 #clock-cells = <0>;
661 reg = <12>;
662 };
663
664 spi1_clk: spi1_clk {
665 #clock-cells = <0>;
666 reg = <13>;
667 };
668
669 tc0_clk: tc0_clk {
670 #clock-cells = <0>;
671 reg = <17>;
672 };
673
674 tc1_clk: tc1_clk {
675 #clock-cells = <0>;
676 reg = <18>;
677 };
678
679 tc2_clk: tc2_clk {
680 #clock-cells = <0>;
681 reg = <19>;
682 };
683
684 ohci_clk: ohci_clk {
685 #clock-cells = <0>;
686 reg = <20>;
687 };
688
689 lcd_clk: lcd_clk {
690 #clock-cells = <0>;
691 reg = <21>;
692 };
693 };
694 };
695
696 rstc@fffffd00 {
697 compatible = "atmel,at91sam9260-rstc";
698 reg = <0xfffffd00 0x10>;
699 };
700
701 shdwc@fffffd10 {
702 compatible = "atmel,at91sam9260-shdwc";
703 reg = <0xfffffd10 0x10>;
704 };
705
706 pit: timer@fffffd30 {
707 compatible = "atmel,at91sam9260-pit";
708 reg = <0xfffffd30 0xf>;
709 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
710 clocks = <&mck>;
711 };
712
713 watchdog@fffffd40 {
714 compatible = "atmel,at91sam9260-wdt";
715 reg = <0xfffffd40 0x10>;
716 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
717 status = "disabled";
718 };
719 };
720 };
721
722 i2c@0 {
723 compatible = "i2c-gpio";
724 pinctrl-names = "default";
725 pinctrl-0 = <&pinctrl_i2c_bitbang>;
726 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
727 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
728 i2c-gpio,sda-open-drain;
729 i2c-gpio,scl-open-drain;
730 i2c-gpio,delay-us = <2>; /* ~100 kHz */
731 #address-cells = <1>;
732 #size-cells = <0>;
733 status = "disabled";
734 };
735};
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
new file mode 100644
index 000000000000..2ce527e70c7a
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -0,0 +1,211 @@
1/*
2 * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
3 *
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8/dts-v1/;
9#include "at91sam9261.dtsi"
10
11/ {
12 model = "Atmel at91sam9261ek";
13 compatible = "atmel,at91sam9261ek", "atmel,at91sam9261", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
17 };
18
19 memory {
20 reg = <0x20000000 0x4000000>;
21 };
22
23 clocks {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 ranges;
27
28 main_clock: clock@0 {
29 compatible = "atmel,osc", "fixed-clock";
30 clock-frequency = <18432000>;
31 };
32 };
33
34 ahb {
35 usb0: ohci@00500000 {
36 status = "okay";
37 };
38
39 fb0: fb@0x00600000 {
40 display = <&display0>;
41 atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
42 status = "okay";
43
44 display0: display {
45 bits-per-pixel = <16>;
46 atmel,lcdcon-backlight;
47 atmel,dmacon = <0x1>;
48 atmel,lcdcon2 = <0x80008002>;
49 atmel,guard-time = <1>;
50 atmel,lcd-wiring-mode = "BRG";
51
52 display-timings {
53 native-mode = <&timing0>;
54 timing0: timing0 {
55 clock-frequency = <4965000>;
56 hactive = <240>;
57 vactive = <320>;
58 hback-porch = <1>;
59 hfront-porch = <33>;
60 vback-porch = <1>;
61 vfront-porch = <0>;
62 hsync-len = <5>;
63 vsync-len = <1>;
64 hsync-active = <1>;
65 vsync-active = <1>;
66 };
67 };
68 };
69 };
70
71 nand0: nand@40000000 {
72 nand-bus-width = <8>;
73 nand-ecc-mode = "soft";
74 nand-on-flash-bbt;
75 status = "okay";
76
77 at91bootstrap@0 {
78 label = "at91bootstrap";
79 reg = <0x0 0x40000>;
80 };
81
82 bootloader@40000 {
83 label = "bootloader";
84 reg = <0x40000 0x80000>;
85 };
86
87 bootloaderenv@c0000 {
88 label = "bootloader env";
89 reg = <0xc0000 0xc0000>;
90 };
91
92 dtb@180000 {
93 label = "device tree";
94 reg = <0x180000 0x80000>;
95 };
96
97 kernel@200000 {
98 label = "kernel";
99 reg = <0x200000 0x600000>;
100 };
101
102 rootfs@800000 {
103 label = "rootfs";
104 reg = <0x800000 0x0f800000>;
105 };
106 };
107
108 apb {
109 usb1: gadget@fffa4000 {
110 atmel,vbus-gpio = <&pioB 29 GPIO_ACTIVE_HIGH>;
111 status = "okay";
112 };
113
114 spi0: spi@fffc8000 {
115 cs-gpios = <&pioA 3 0>, <0>, <&pioA 28 0>, <0>;
116 status = "okay";
117
118 mtd_dataflash@0 {
119 compatible = "atmel,at45", "atmel,dataflash";
120 reg = <0>;
121 spi-max-frequency = <15000000>;
122 };
123
124 tsc2046@0 {
125 reg = <2>;
126 compatible = "ti,ads7843";
127 interrupts-extended = <&pioC 2 IRQ_TYPE_EDGE_BOTH>;
128 spi-max-frequency = <3000000>;
129 pendown-gpio = <&pioC 2 GPIO_ACTIVE_HIGH>;
130
131 ti,x-min = /bits/ 16 <150>;
132 ti,x-max = /bits/ 16 <3830>;
133 ti,y-min = /bits/ 16 <190>;
134 ti,y-max = /bits/ 16 <3830>;
135 ti,vref-delay-usecs = /bits/ 16 <450>;
136 ti,x-plate-ohms = /bits/ 16 <450>;
137 ti,y-plate-ohms = /bits/ 16 <250>;
138 ti,pressure-max = /bits/ 16 <15000>;
139 ti,debounce-rep = /bits/ 16 <0>;
140 ti,debounce-tol = /bits/ 16 <65535>;
141 ti,debounce-max = /bits/ 16 <1>;
142
143 linux,wakeup;
144 };
145 };
146
147 dbgu: serial@fffff200 {
148 status = "okay";
149 };
150
151 watchdog@fffffd40 {
152 status = "okay";
153 };
154
155 };
156 };
157
158 leds {
159 compatible = "gpio-leds";
160
161 ds8 {
162 label = "ds8";
163 gpios = <&pioA 13 GPIO_ACTIVE_LOW>;
164 linux,default-trigger = "none";
165 };
166
167 ds7 {
168 label = "ds7";
169 gpios = <&pioA 14 GPIO_ACTIVE_LOW>;
170 linux,default-trigger = "nand-disk";
171 };
172
173 ds1 {
174 label = "ds1";
175 gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
176 linux,default-trigger = "heartbeat";
177 };
178 };
179
180 gpio_keys {
181 compatible = "gpio-keys";
182
183 button_0 {
184 label = "button_0";
185 gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
186 linux,code = <256>;
187 gpio-key,wakeup;
188 };
189
190 button_1 {
191 label = "button_1";
192 gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
193 linux,code = <257>;
194 gpio-key,wakeup;
195 };
196
197 button_2 {
198 label = "button_2";
199 gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
200 linux,code = <258>;
201 gpio-key,wakeup;
202 };
203
204 button_3 {
205 label = "button_3";
206 gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
207 linux,code = <259>;
208 gpio-key,wakeup;
209 };
210 };
211};
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
new file mode 100644
index 000000000000..63e1784d272c
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -0,0 +1,802 @@
1/*
2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
3 *
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/clk/at91.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/gpio/gpio.h>
14
15/ {
16 model = "Atmel AT91SAM9RL family SoC";
17 compatible = "atmel,at91sam9rl", "atmel,at91sam9";
18 interrupt-parent = <&aic>;
19
20 aliases {
21 serial0 = &dbgu;
22 serial1 = &usart0;
23 serial2 = &usart1;
24 serial3 = &usart2;
25 serial4 = &usart3;
26 gpio0 = &pioA;
27 gpio1 = &pioB;
28 gpio2 = &pioC;
29 gpio3 = &pioD;
30 tcb0 = &tcb0;
31 i2c0 = &i2c0;
32 i2c1 = &i2c1;
33 ssc0 = &ssc0;
34 ssc1 = &ssc1;
35 };
36
37 cpus {
38 #address-cells = <0>;
39 #size-cells = <0>;
40
41 cpu {
42 compatible = "arm,arm926ej-s";
43 device_type = "cpu";
44 };
45 };
46
47 memory {
48 reg = <0x20000000 0x04000000>;
49 };
50
51 ahb {
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
55 ranges;
56
57 nand0: nand@40000000 {
58 compatible = "atmel,at91rm9200-nand";
59 #address-cells = <1>;
60 #size-cells = <1>;
61 reg = <0x40000000 0x10000000>,
62 <0xffffe800 0x200>;
63 atmel,nand-addr-offset = <21>;
64 atmel,nand-cmd-offset = <22>;
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_nand>;
67 gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
68 <&pioB 6 GPIO_ACTIVE_HIGH>,
69 <0>;
70 status = "disabled";
71 };
72
73 apb {
74 compatible = "simple-bus";
75 #address-cells = <1>;
76 #size-cells = <1>;
77 ranges;
78
79 tcb0: timer@fffa0000 {
80 compatible = "atmel,at91rm9200-tcb";
81 reg = <0xfffa0000 0x100>;
82 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
83 <17 IRQ_TYPE_LEVEL_HIGH 0>,
84 <18 IRQ_TYPE_LEVEL_HIGH 0>;
85 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
86 clock-names = "t0_clk", "t1_clk", "t2_clk";
87 };
88
89 mmc0: mmc@fffa4000 {
90 compatible = "atmel,hsmci";
91 reg = <0xfffa4000 0x600>;
92 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
93 #address-cells = <1>;
94 #size-cells = <0>;
95 pinctrl-names = "default";
96 clocks = <&mci0_clk>;
97 clock-names = "mci_clk";
98 status = "disabled";
99 };
100
101 i2c0: i2c@fffa8000 {
102 compatible = "atmel,at91sam9260-i2c";
103 reg = <0xfffa8000 0x100>;
104 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
105 #address-cells = <1>;
106 #size-cells = <0>;
107 clocks = <&twi0_clk>;
108 status = "disabled";
109 };
110
111 i2c1: i2c@fffac000 {
112 compatible = "atmel,at91sam9260-i2c";
113 reg = <0xfffac000 0x100>;
114 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117 status = "disabled";
118 };
119
120 usart0: serial@fffb0000 {
121 compatible = "atmel,at91sam9260-usart";
122 reg = <0xfffb0000 0x200>;
123 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
124 atmel,use-dma-rx;
125 atmel,use-dma-tx;
126 pinctrl-names = "default";
127 pinctrl-0 = <&pinctrl_usart0>;
128 clocks = <&usart0_clk>;
129 clock-names = "usart";
130 status = "disabled";
131 };
132
133 usart1: serial@fffb4000 {
134 compatible = "atmel,at91sam9260-usart";
135 reg = <0xfffb4000 0x200>;
136 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
137 atmel,use-dma-rx;
138 atmel,use-dma-tx;
139 pinctrl-names = "default";
140 pinctrl-0 = <&pinctrl_usart1>;
141 clocks = <&usart1_clk>;
142 clock-names = "usart";
143 status = "disabled";
144 };
145
146 usart2: serial@fffb8000 {
147 compatible = "atmel,at91sam9260-usart";
148 reg = <0xfffb8000 0x200>;
149 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
150 atmel,use-dma-rx;
151 atmel,use-dma-tx;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_usart2>;
154 clocks = <&usart2_clk>;
155 clock-names = "usart";
156 status = "disabled";
157 };
158
159 usart3: serial@fffbc000 {
160 compatible = "atmel,at91sam9260-usart";
161 reg = <0xfffbc000 0x200>;
162 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
163 atmel,use-dma-rx;
164 atmel,use-dma-tx;
165 pinctrl-names = "default";
166 pinctrl-0 = <&pinctrl_usart3>;
167 clocks = <&usart3_clk>;
168 clock-names = "usart";
169 status = "disabled";
170 };
171
172 ssc0: ssc@fffc0000 {
173 compatible = "atmel,at91rm9200-ssc";
174 reg = <0xfffc0000 0x4000>;
175 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
178 status = "disabled";
179 };
180
181 ssc1: ssc@fffc4000 {
182 compatible = "atmel,at91rm9200-ssc";
183 reg = <0xfffc4000 0x4000>;
184 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
185 pinctrl-names = "default";
186 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
187 status = "disabled";
188 };
189
190 spi0: spi@fffcc000 {
191 #address-cells = <1>;
192 #size-cells = <0>;
193 compatible = "atmel,at91rm9200-spi";
194 reg = <0xfffcc000 0x200>;
195 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_spi0>;
198 clocks = <&spi0_clk>;
199 clock-names = "spi_clk";
200 status = "disabled";
201 };
202
203 ramc0: ramc@ffffea00 {
204 compatible = "atmel,at91sam9260-sdramc";
205 reg = <0xffffea00 0x200>;
206 };
207
208 aic: interrupt-controller@fffff000 {
209 #interrupt-cells = <3>;
210 compatible = "atmel,at91rm9200-aic";
211 interrupt-controller;
212 reg = <0xfffff000 0x200>;
213 atmel,external-irqs = <31>;
214 };
215
216 dbgu: serial@fffff200 {
217 compatible = "atmel,at91sam9260-usart";
218 reg = <0xfffff200 0x200>;
219 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&pinctrl_dbgu>;
222 clocks = <&mck>;
223 clock-names = "usart";
224 status = "disabled";
225 };
226
227 pinctrl@fffff400 {
228 #address-cells = <1>;
229 #size-cells = <1>;
230 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
231 ranges = <0xfffff400 0xfffff400 0x800>;
232
233 atmel,mux-mask =
234 /* A B */
235 <0xffffffff 0xe05c6738>, /* pioA */
236 <0xffffffff 0x0000c780>, /* pioB */
237 <0xffffffff 0xe3ffff0e>, /* pioC */
238 <0x003fffff 0x0001ff3c>; /* pioD */
239
240 /* shared pinctrl settings */
241 dbgu {
242 pinctrl_dbgu: dbgu-0 {
243 atmel,pins =
244 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
245 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
246 };
247 };
248
249 i2c_gpio0 {
250 pinctrl_i2c_gpio0: i2c_gpio0-0 {
251 atmel,pins =
252 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
253 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
254 };
255 };
256
257 i2c_gpio1 {
258 pinctrl_i2c_gpio1: i2c_gpio1-0 {
259 atmel,pins =
260 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
261 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
262 };
263 };
264
265 mmc0 {
266 pinctrl_mmc0_clk: mmc0_clk-0 {
267 atmel,pins =
268 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
269 };
270
271 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
272 atmel,pins =
273 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
274 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
275 };
276
277 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
278 atmel,pins =
279 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
280 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
281 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
282 };
283 };
284
285 nand {
286 pinctrl_nand: nand-0 {
287 atmel,pins =
288 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
289 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
290 };
291
292 pinctrl_nand0_ale_cle: nand_ale_cle-0 {
293 atmel,pins =
294 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
295 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
296 };
297
298 pinctrl_nand0_oe_we: nand_oe_we-0 {
299 atmel,pins =
300 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
301 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
302 };
303
304 pinctrl_nand0_cs: nand_cs-0 {
305 atmel,pins =
306 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
307 };
308 };
309
310 ssc0 {
311 pinctrl_ssc0_tx: ssc0_tx-0 {
312 atmel,pins =
313 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
314 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
315 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
316 };
317
318 pinctrl_ssc0_rx: ssc0_rx-0 {
319 atmel,pins =
320 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
321 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
322 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
323 };
324 };
325
326 ssc1 {
327 pinctrl_ssc1_tx: ssc1_tx-0 {
328 atmel,pins =
329 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
330 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
331 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
332 };
333
334 pinctrl_ssc1_rx: ssc1_rx-0 {
335 atmel,pins =
336 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
337 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
338 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
339 };
340 };
341
342 spi0 {
343 pinctrl_spi0: spi0-0 {
344 atmel,pins =
345 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
346 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
347 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
348 };
349 };
350
351 tcb0 {
352 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
353 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
354 };
355
356 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
357 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
358 };
359
360 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
361 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
362 };
363
364 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
365 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
366 };
367
368 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
369 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
370 };
371
372 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
373 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
374 };
375
376 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
377 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
378 };
379
380 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
381 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
382 };
383
384 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
385 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
386 };
387 };
388
389 usart0 {
390 pinctrl_usart0: usart0-0 {
391 atmel,pins =
392 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
393 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
394 };
395
396 pinctrl_usart0_rts: usart0_rts-0 {
397 atmel,pins =
398 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
399 };
400
401 pinctrl_usart0_cts: usart0_cts-0 {
402 atmel,pins =
403 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
404 };
405
406 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
407 atmel,pins =
408 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
409 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
410 };
411
412 pinctrl_usart0_dcd: usart0_dcd-0 {
413 atmel,pins =
414 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
415 };
416
417 pinctrl_usart0_ri: usart0_ri-0 {
418 atmel,pins =
419 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
420 };
421
422 pinctrl_usart0_sck: usart0_sck-0 {
423 atmel,pins =
424 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
425 };
426 };
427
428 usart1 {
429 pinctrl_usart1: usart1-0 {
430 atmel,pins =
431 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
432 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
433 };
434
435 pinctrl_usart1_rts: usart1_rts-0 {
436 atmel,pins =
437 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
438 };
439
440 pinctrl_usart1_cts: usart1_cts-0 {
441 atmel,pins =
442 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
443 };
444
445 pinctrl_usart1_sck: usart1_sck-0 {
446 atmel,pins =
447 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
448 };
449 };
450
451 usart2 {
452 pinctrl_usart2: usart2-0 {
453 atmel,pins =
454 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
455 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
456 };
457
458 pinctrl_usart2_rts: usart2_rts-0 {
459 atmel,pins =
460 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
461 };
462
463 pinctrl_usart2_cts: usart2_cts-0 {
464 atmel,pins =
465 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
466 };
467
468 pinctrl_usart2_sck: usart2_sck-0 {
469 atmel,pins =
470 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
471 };
472 };
473
474 usart3 {
475 pinctrl_usart3: usart3-0 {
476 atmel,pins =
477 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
478 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
479 };
480
481 pinctrl_usart3_rts: usart3_rts-0 {
482 atmel,pins =
483 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
484 };
485
486 pinctrl_usart3_cts: usart3_cts-0 {
487 atmel,pins =
488 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
489 };
490
491 pinctrl_usart3_sck: usart3_sck-0 {
492 atmel,pins =
493 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
494 };
495 };
496
497 pioA: gpio@fffff400 {
498 compatible = "atmel,at91rm9200-gpio";
499 reg = <0xfffff400 0x200>;
500 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
501 #gpio-cells = <2>;
502 gpio-controller;
503 interrupt-controller;
504 #interrupt-cells = <2>;
505 clocks = <&pioA_clk>;
506 };
507
508 pioB: gpio@fffff600 {
509 compatible = "atmel,at91rm9200-gpio";
510 reg = <0xfffff600 0x200>;
511 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
512 #gpio-cells = <2>;
513 gpio-controller;
514 interrupt-controller;
515 #interrupt-cells = <2>;
516 clocks = <&pioB_clk>;
517 };
518
519 pioC: gpio@fffff800 {
520 compatible = "atmel,at91rm9200-gpio";
521 reg = <0xfffff800 0x200>;
522 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
523 #gpio-cells = <2>;
524 gpio-controller;
525 interrupt-controller;
526 #interrupt-cells = <2>;
527 clocks = <&pioC_clk>;
528 };
529
530 pioD: gpio@fffffa00 {
531 compatible = "atmel,at91rm9200-gpio";
532 reg = <0xfffffa00 0x200>;
533 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
534 #gpio-cells = <2>;
535 gpio-controller;
536 interrupt-controller;
537 #interrupt-cells = <2>;
538 clocks = <&pioD_clk>;
539 };
540 };
541
542 pmc: pmc@fffffc00 {
543 compatible = "atmel,at91sam9g45-pmc";
544 reg = <0xfffffc00 0x100>;
545 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
546 interrupt-controller;
547 #address-cells = <1>;
548 #size-cells = <0>;
549 #interrupt-cells = <1>;
550
551 clk32k: slck {
552 compatible = "fixed-clock";
553 #clock-cells = <0>;
554 clock-frequency = <32768>;
555 };
556
557 main: mainck {
558 compatible = "atmel,at91rm9200-clk-main";
559 #clock-cells = <0>;
560 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
561 clocks = <&clk32k>;
562 };
563
564 plla: pllack {
565 compatible = "atmel,at91rm9200-clk-pll";
566 #clock-cells = <0>;
567 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
568 clocks = <&main>;
569 reg = <0>;
570 atmel,clk-input-range = <1000000 32000000>;
571 #atmel,pll-clk-output-range-cells = <4>;
572 atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>;
573 };
574
575 utmi: utmick {
576 compatible = "atmel,at91sam9x5-clk-utmi";
577 #clock-cells = <0>;
578 interrupt-parent = <&pmc>;
579 interrupts = <AT91_PMC_LOCKU>;
580 clocks = <&main>;
581 };
582
583 mck: masterck {
584 compatible = "atmel,at91rm9200-clk-master";
585 #clock-cells = <0>;
586 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
587 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
588 atmel,clk-output-range = <0 94000000>;
589 atmel,clk-divisors = <1 2 4 3>;
590 };
591
592 prog: progck {
593 compatible = "atmel,at91rm9200-clk-programmable";
594 #address-cells = <1>;
595 #size-cells = <0>;
596 interrupt-parent = <&pmc>;
597 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
598
599 prog0: prog0 {
600 #clock-cells = <0>;
601 reg = <0>;
602 interrupts = <AT91_PMC_PCKRDY(0)>;
603 };
604
605 prog1: prog1 {
606 #clock-cells = <0>;
607 reg = <1>;
608 interrupts = <AT91_PMC_PCKRDY(1)>;
609 };
610 };
611
612 systemck {
613 compatible = "atmel,at91rm9200-clk-system";
614 #address-cells = <1>;
615 #size-cells = <0>;
616
617 pck0: pck0 {
618 #clock-cells = <0>;
619 reg = <8>;
620 clocks = <&prog0>;
621 };
622
623 pck1: pck1 {
624 #clock-cells = <0>;
625 reg = <9>;
626 clocks = <&prog1>;
627 };
628
629 };
630
631 periphck {
632 compatible = "atmel,at91rm9200-clk-peripheral";
633 #address-cells = <1>;
634 #size-cells = <0>;
635 clocks = <&mck>;
636
637 pioA_clk: pioA_clk {
638 #clock-cells = <0>;
639 reg = <2>;
640 };
641
642 pioB_clk: pioB_clk {
643 #clock-cells = <0>;
644 reg = <3>;
645 };
646
647 pioC_clk: pioC_clk {
648 #clock-cells = <0>;
649 reg = <4>;
650 };
651
652 pioD_clk: pioD_clk {
653 #clock-cells = <0>;
654 reg = <5>;
655 };
656
657 usart0_clk: usart0_clk {
658 #clock-cells = <0>;
659 reg = <6>;
660 };
661
662 usart1_clk: usart1_clk {
663 #clock-cells = <0>;
664 reg = <7>;
665 };
666
667 usart2_clk: usart2_clk {
668 #clock-cells = <0>;
669 reg = <8>;
670 };
671
672 usart3_clk: usart3_clk {
673 #clock-cells = <0>;
674 reg = <9>;
675 };
676
677 mci0_clk: mci0_clk {
678 #clock-cells = <0>;
679 reg = <10>;
680 };
681
682 twi0_clk: twi0_clk {
683 #clock-cells = <0>;
684 reg = <11>;
685 };
686
687 twi1_clk: twi1_clk {
688 #clock-cells = <0>;
689 reg = <12>;
690 };
691
692 spi0_clk: spi0_clk {
693 #clock-cells = <0>;
694 reg = <13>;
695 };
696
697 ssc0_clk: ssc0_clk {
698 #clock-cells = <0>;
699 reg = <14>;
700 };
701
702 ssc1_clk: ssc1_clk {
703 #clock-cells = <0>;
704 reg = <15>;
705 };
706
707 tc0_clk: tc0_clk {
708 #clock-cells = <0>;
709 reg = <16>;
710 };
711
712 tc1_clk: tc1_clk {
713 #clock-cells = <0>;
714 reg = <17>;
715 };
716
717 tc2_clk: tc2_clk {
718 #clock-cells = <0>;
719 reg = <18>;
720 };
721
722 pwm_clk: pwm_clk {
723 #clock-cells = <0>;
724 reg = <19>;
725 };
726
727 adc_clk: adc_clk {
728 #clock-cells = <0>;
729 reg = <20>;
730 };
731
732 dma0_clk: dma0_clk {
733 #clock-cells = <0>;
734 reg = <21>;
735 };
736
737 udphs_clk: udphs_clk {
738 #clock-cells = <0>;
739 reg = <22>;
740 };
741
742 lcd_clk: lcd_clk {
743 #clock-cells = <0>;
744 reg = <23>;
745 };
746 };
747 };
748
749 rstc@fffffd00 {
750 compatible = "atmel,at91sam9260-rstc";
751 reg = <0xfffffd00 0x10>;
752 };
753
754 shdwc@fffffd10 {
755 compatible = "atmel,at91sam9260-shdwc";
756 reg = <0xfffffd10 0x10>;
757 };
758
759 pit: timer@fffffd30 {
760 compatible = "atmel,at91sam9260-pit";
761 reg = <0xfffffd30 0xf>;
762 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
763 clocks = <&mck>;
764 };
765
766 watchdog@fffffd40 {
767 compatible = "atmel,at91sam9260-wdt";
768 reg = <0xfffffd40 0x10>;
769 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
770 status = "disabled";
771 };
772 };
773 };
774
775 i2c@0 {
776 compatible = "i2c-gpio";
777 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
778 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
779 i2c-gpio,sda-open-drain;
780 i2c-gpio,scl-open-drain;
781 i2c-gpio,delay-us = <2>; /* ~100 kHz */
782 #address-cells = <1>;
783 #size-cells = <0>;
784 pinctrl-names = "default";
785 pinctrl-0 = <&pinctrl_i2c_gpio0>;
786 status = "disabled";
787 };
788
789 i2c@1 {
790 compatible = "i2c-gpio";
791 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
792 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
793 i2c-gpio,sda-open-drain;
794 i2c-gpio,scl-open-drain;
795 i2c-gpio,delay-us = <2>; /* ~100 kHz */
796 #address-cells = <1>;
797 #size-cells = <0>;
798 pinctrl-names = "default";
799 pinctrl-0 = <&pinctrl_i2c_gpio1>;
800 status = "disabled";
801 };
802};
diff --git a/arch/arm/boot/dts/at91sam9rlek.dts b/arch/arm/boot/dts/at91sam9rlek.dts
new file mode 100644
index 000000000000..cddb37825fad
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9rlek.dts
@@ -0,0 +1,157 @@
1/*
2 * at91sam9rlek.dts - Device Tree file for Atmel at91sam9rl reference board
3 *
4 * Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
5 *
6 * Licensed under GPLv2 only
7 */
8/dts-v1/;
9#include "at91sam9rl.dtsi"
10
11/ {
12 model = "Atmel at91sam9rlek";
13 compatible = "atmel,at91sam9rlek", "atmel,at91sam9rl", "atmel,at91sam9";
14
15 chosen {
16 bootargs = "console=ttyS0,115200 rootfstype=ubifs root=ubi0:rootfs ubi.mtd=5 rw";
17 };
18
19 memory {
20 reg = <0x20000000 0x4000000>;
21 };
22
23 clocks {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 ranges;
27
28 main_clock: clock {
29 compatible = "atmel,osc", "fixed-clock";
30 clock-frequency = <12000000>;
31 };
32 };
33
34 ahb {
35 nand0: nand@40000000 {
36 nand-bus-width = <8>;
37 nand-ecc-mode = "soft";
38 nand-on-flash-bbt = <1>;
39 status = "okay";
40
41 at91bootstrap@0 {
42 label = "at91bootstrap";
43 reg = <0x0 0x40000>;
44 };
45
46 bootloader@40000 {
47 label = "bootloader";
48 reg = <0x40000 0x80000>;
49 };
50
51 bootloaderenv@c0000 {
52 label = "bootloader env";
53 reg = <0xc0000 0xc0000>;
54 };
55
56 dtb@180000 {
57 label = "device tree";
58 reg = <0x180000 0x80000>;
59 };
60
61 kernel@200000 {
62 label = "kernel";
63 reg = <0x200000 0x600000>;
64 };
65
66 rootfs@800000 {
67 label = "rootfs";
68 reg = <0x800000 0x0f800000>;
69 };
70 };
71
72 apb {
73 mmc0: mmc@fffa4000 {
74 pinctrl-0 = <
75 &pinctrl_board_mmc0
76 &pinctrl_mmc0_clk
77 &pinctrl_mmc0_slot0_cmd_dat0
78 &pinctrl_mmc0_slot0_dat1_3>;
79 status = "okay";
80 slot@0 {
81 reg = <0>;
82 bus-width = <4>;
83 cd-gpios = <&pioA 15 GPIO_ACTIVE_HIGH>;
84 };
85 };
86
87 usart0: serial@fffb0000 {
88 pinctrl-0 = <
89 &pinctrl_usart0
90 &pinctrl_usart0_rts
91 &pinctrl_usart0_cts>;
92 status = "okay";
93 };
94
95 dbgu: serial@fffff200 {
96 status = "okay";
97 };
98
99 pinctrl@fffff400 {
100 mmc0 {
101 pinctrl_board_mmc0: mmc0-board {
102 atmel,pins =
103 <AT91_PIOA 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
104 };
105 };
106 };
107
108 pmc: pmc@fffffc00 {
109 main: mainck {
110 clock-frequency = <12000000>;
111 };
112 };
113
114 watchdog@fffffd40 {
115 status = "okay";
116 };
117 };
118 };
119
120 leds {
121 compatible = "gpio-leds";
122
123 ds1 {
124 label = "ds1";
125 gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
126 };
127
128 ds2 {
129 label = "ds2";
130 gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
131 };
132
133 ds3 {
134 label = "ds3";
135 gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
136 linux,default-trigger = "heartbeat";
137 };
138 };
139
140 gpio_keys {
141 compatible = "gpio-keys";
142
143 right_click {
144 label = "right_click";
145 gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
146 linux,code = <273>;
147 gpio-key,wakeup;
148 };
149
150 left_click {
151 label = "left_click";
152 gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
153 linux,code = <272>;
154 gpio-key,wakeup;
155 };
156 };
157};
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 0b4e9b5210d8..300ded9acbe9 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -16,10 +16,12 @@ CONFIG_MODULE_UNLOAD=y
16CONFIG_ARCH_AT91=y 16CONFIG_ARCH_AT91=y
17CONFIG_SOC_AT91RM9200=y 17CONFIG_SOC_AT91RM9200=y
18CONFIG_SOC_AT91SAM9260=y 18CONFIG_SOC_AT91SAM9260=y
19CONFIG_SOC_AT91SAM9261=y
19CONFIG_SOC_AT91SAM9263=y 20CONFIG_SOC_AT91SAM9263=y
20CONFIG_SOC_AT91SAM9G45=y 21CONFIG_SOC_AT91SAM9G45=y
21CONFIG_SOC_AT91SAM9X5=y 22CONFIG_SOC_AT91SAM9X5=y
22CONFIG_SOC_AT91SAM9N12=y 23CONFIG_SOC_AT91SAM9N12=y
24CONFIG_SOC_AT91SAM9RL=y
23CONFIG_MACH_AT91RM9200_DT=y 25CONFIG_MACH_AT91RM9200_DT=y
24CONFIG_MACH_AT91SAM9_DT=y 26CONFIG_MACH_AT91SAM9_DT=y
25CONFIG_AT91_TIMER_HZ=128 27CONFIG_AT91_TIMER_HZ=128
@@ -119,6 +121,7 @@ CONFIG_INPUT_EVDEV=y
119CONFIG_KEYBOARD_GPIO=y 121CONFIG_KEYBOARD_GPIO=y
120# CONFIG_INPUT_MOUSE is not set 122# CONFIG_INPUT_MOUSE is not set
121CONFIG_INPUT_TOUCHSCREEN=y 123CONFIG_INPUT_TOUCHSCREEN=y
124CONFIG_TOUCHSCREEN_ADS7846=y
122# CONFIG_SERIO is not set 125# CONFIG_SERIO is not set
123CONFIG_LEGACY_PTY_COUNT=4 126CONFIG_LEGACY_PTY_COUNT=4
124CONFIG_SERIAL_ATMEL=y 127CONFIG_SERIAL_ATMEL=y
diff --git a/arch/arm/configs/at91sam9260_9g20_defconfig b/arch/arm/configs/at91sam9260_9g20_defconfig
index 2cd832918e9c..c4c160fc8791 100644
--- a/arch/arm/configs/at91sam9260_9g20_defconfig
+++ b/arch/arm/configs/at91sam9260_9g20_defconfig
@@ -3,6 +3,7 @@
3CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
4CONFIG_LOG_BUF_SHIFT=14 4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_BLK_DEV_INITRD=y 5CONFIG_BLK_DEV_INITRD=y
6CONFIG_EMBEDDED=y
6CONFIG_SLAB=y 7CONFIG_SLAB=y
7CONFIG_MODULES=y 8CONFIG_MODULES=y
8CONFIG_MODULE_UNLOAD=y 9CONFIG_MODULE_UNLOAD=y
@@ -30,15 +31,12 @@ CONFIG_MACH_AT91SAM9_DT=y
30CONFIG_AT91_SLOW_CLOCK=y 31CONFIG_AT91_SLOW_CLOCK=y
31# CONFIG_ARM_THUMB is not set 32# CONFIG_ARM_THUMB is not set
32CONFIG_AEABI=y 33CONFIG_AEABI=y
33CONFIG_LEDS=y
34CONFIG_LEDS_CPU=y
35CONFIG_ZBOOT_ROM_TEXT=0x0 34CONFIG_ZBOOT_ROM_TEXT=0x0
36CONFIG_ZBOOT_ROM_BSS=0x0 35CONFIG_ZBOOT_ROM_BSS=0x0
37CONFIG_ARM_APPENDED_DTB=y 36CONFIG_ARM_APPENDED_DTB=y
38CONFIG_ARM_ATAG_DTB_COMPAT=y 37CONFIG_ARM_ATAG_DTB_COMPAT=y
39CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw" 38CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
40CONFIG_AUTO_ZRELADDR=y 39CONFIG_AUTO_ZRELADDR=y
41CONFIG_FPE_NWFPE=y
42CONFIG_NET=y 40CONFIG_NET=y
43CONFIG_PACKET=y 41CONFIG_PACKET=y
44CONFIG_UNIX=y 42CONFIG_UNIX=y
@@ -57,15 +55,14 @@ CONFIG_DEVTMPFS_MOUNT=y
57CONFIG_MTD=y 55CONFIG_MTD=y
58CONFIG_MTD_CMDLINE_PARTS=y 56CONFIG_MTD_CMDLINE_PARTS=y
59CONFIG_MTD_OF_PARTS=y 57CONFIG_MTD_OF_PARTS=y
60CONFIG_MTD_CHAR=y
61CONFIG_MTD_BLOCK=y 58CONFIG_MTD_BLOCK=y
62CONFIG_MTD_DATAFLASH=y 59CONFIG_MTD_DATAFLASH=y
63CONFIG_MTD_NAND=y 60CONFIG_MTD_NAND=y
64CONFIG_MTD_NAND_ATMEL=y 61CONFIG_MTD_NAND_ATMEL=y
62CONFIG_MTD_UBI=y
65CONFIG_BLK_DEV_LOOP=y 63CONFIG_BLK_DEV_LOOP=y
66CONFIG_BLK_DEV_RAM=y 64CONFIG_BLK_DEV_RAM=y
67CONFIG_BLK_DEV_RAM_SIZE=8192 65CONFIG_BLK_DEV_RAM_SIZE=8192
68CONFIG_MISC_DEVICES=y
69CONFIG_EEPROM_AT25=y 66CONFIG_EEPROM_AT25=y
70CONFIG_SCSI=y 67CONFIG_SCSI=y
71CONFIG_BLK_DEV_SD=y 68CONFIG_BLK_DEV_SD=y
@@ -112,8 +109,6 @@ CONFIG_SND_PCM_OSS=y
112CONFIG_SND_SEQUENCER_OSS=y 109CONFIG_SND_SEQUENCER_OSS=y
113# CONFIG_SND_VERBOSE_PROCFS is not set 110# CONFIG_SND_VERBOSE_PROCFS is not set
114CONFIG_USB=y 111CONFIG_USB=y
115CONFIG_USB_DEVICEFS=y
116# CONFIG_USB_DEVICE_CLASS is not set
117CONFIG_USB_MON=y 112CONFIG_USB_MON=y
118CONFIG_USB_OHCI_HCD=y 113CONFIG_USB_OHCI_HCD=y
119CONFIG_USB_STORAGE=y 114CONFIG_USB_STORAGE=y
diff --git a/arch/arm/configs/at91sam9rl_defconfig b/arch/arm/configs/at91sam9rl_defconfig
index 7b6f131cecd6..85f846ae9ff2 100644
--- a/arch/arm/configs/at91sam9rl_defconfig
+++ b/arch/arm/configs/at91sam9rl_defconfig
@@ -1,8 +1,8 @@
1CONFIG_EXPERIMENTAL=y
2# CONFIG_LOCALVERSION_AUTO is not set 1# CONFIG_LOCALVERSION_AUTO is not set
3# CONFIG_SWAP is not set 2# CONFIG_SWAP is not set
4CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
5CONFIG_LOG_BUF_SHIFT=14 4CONFIG_LOG_BUF_SHIFT=14
5CONFIG_EMBEDDED=y
6CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
7CONFIG_SLAB=y 7CONFIG_SLAB=y
8CONFIG_MODULES=y 8CONFIG_MODULES=y
@@ -14,20 +14,23 @@ CONFIG_ARCH_AT91=y
14CONFIG_ARCH_AT91SAM9RL=y 14CONFIG_ARCH_AT91SAM9RL=y
15CONFIG_MACH_AT91SAM9RLEK=y 15CONFIG_MACH_AT91SAM9RLEK=y
16# CONFIG_ARM_THUMB is not set 16# CONFIG_ARM_THUMB is not set
17CONFIG_AEABI=y
17CONFIG_ZBOOT_ROM_TEXT=0x0 18CONFIG_ZBOOT_ROM_TEXT=0x0
18CONFIG_ZBOOT_ROM_BSS=0x0 19CONFIG_ZBOOT_ROM_BSS=0x0
19CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,17105363 root=/dev/ram0 rw" 20CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,17105363 root=/dev/ram0 rw"
20CONFIG_FPE_NWFPE=y 21CONFIG_AUTO_ZRELADDR=y
21CONFIG_NET=y 22CONFIG_NET=y
22CONFIG_UNIX=y 23CONFIG_UNIX=y
23CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 24CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
25CONFIG_DEVTMPFS=y
26CONFIG_DEVTMPFS_MOUNT=y
24CONFIG_MTD=y 27CONFIG_MTD=y
25CONFIG_MTD_CMDLINE_PARTS=y 28CONFIG_MTD_CMDLINE_PARTS=y
26CONFIG_MTD_CHAR=y
27CONFIG_MTD_BLOCK=y 29CONFIG_MTD_BLOCK=y
28CONFIG_MTD_DATAFLASH=y 30CONFIG_MTD_DATAFLASH=y
29CONFIG_MTD_NAND=y 31CONFIG_MTD_NAND=y
30CONFIG_MTD_NAND_ATMEL=y 32CONFIG_MTD_NAND_ATMEL=y
33CONFIG_MTD_UBI=y
31CONFIG_BLK_DEV_LOOP=y 34CONFIG_BLK_DEV_LOOP=y
32CONFIG_BLK_DEV_RAM=y 35CONFIG_BLK_DEV_RAM=y
33CONFIG_BLK_DEV_RAM_COUNT=4 36CONFIG_BLK_DEV_RAM_COUNT=4
@@ -66,6 +69,7 @@ CONFIG_EXT2_FS=y
66CONFIG_MSDOS_FS=y 69CONFIG_MSDOS_FS=y
67CONFIG_VFAT_FS=y 70CONFIG_VFAT_FS=y
68CONFIG_TMPFS=y 71CONFIG_TMPFS=y
72CONFIG_UBIFS_FS=y
69CONFIG_CRAMFS=y 73CONFIG_CRAMFS=y
70CONFIG_NLS_CODEPAGE_437=y 74CONFIG_NLS_CODEPAGE_437=y
71CONFIG_NLS_CODEPAGE_850=y 75CONFIG_NLS_CODEPAGE_850=y
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 4f0e800e7e71..ae6617e3ed0b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -119,7 +119,6 @@ config SOC_AT91SAM9261
119 select HAVE_AT91_DBGU0 119 select HAVE_AT91_DBGU0
120 select HAVE_FB_ATMEL 120 select HAVE_FB_ATMEL
121 select SOC_AT91SAM9 121 select SOC_AT91SAM9
122 select AT91_USE_OLD_CLK
123 select HAVE_AT91_USB_CLK 122 select HAVE_AT91_USB_CLK
124 help 123 help
125 Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. 124 Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
@@ -137,7 +136,6 @@ config SOC_AT91SAM9RL
137 select HAVE_AT91_DBGU0 136 select HAVE_AT91_DBGU0
138 select HAVE_FB_ATMEL 137 select HAVE_FB_ATMEL
139 select SOC_AT91SAM9 138 select SOC_AT91SAM9
140 select AT91_USE_OLD_CLK
141 select HAVE_AT91_UTMI 139 select HAVE_AT91_UTMI
142 140
143config SOC_AT91SAM9G45 141config SOC_AT91SAM9G45
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index 48b51f796d6a..fb164a5d04a9 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -26,10 +26,12 @@
26#include "at91_rstc.h" 26#include "at91_rstc.h"
27#include "soc.h" 27#include "soc.h"
28#include "generic.h" 28#include "generic.h"
29#include "clock.h"
30#include "sam9_smc.h" 29#include "sam9_smc.h"
31#include "pm.h" 30#include "pm.h"
32 31
32#if defined(CONFIG_OLD_CLK_AT91)
33#include "clock.h"
34
33/* -------------------------------------------------------------------- 35/* --------------------------------------------------------------------
34 * Clocks 36 * Clocks
35 * -------------------------------------------------------------------- */ 37 * -------------------------------------------------------------------- */
@@ -190,6 +192,23 @@ static struct clk_lookup periph_clocks_lookups[] = {
190 CLKDEV_CON_ID("pioA", &pioA_clk), 192 CLKDEV_CON_ID("pioA", &pioA_clk),
191 CLKDEV_CON_ID("pioB", &pioB_clk), 193 CLKDEV_CON_ID("pioB", &pioB_clk),
192 CLKDEV_CON_ID("pioC", &pioC_clk), 194 CLKDEV_CON_ID("pioC", &pioC_clk),
195 /* more lookup table for DT entries */
196 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
197 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
198 CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
199 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk),
200 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
201 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
202 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
203 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0),
204 CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1),
205 CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
206 CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
207 CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
208 CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi_clk),
209 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
210 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
211 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
193}; 212};
194 213
195static struct clk_lookup usart_clocks_lookups[] = { 214static struct clk_lookup usart_clocks_lookups[] = {
@@ -248,7 +267,9 @@ static void __init at91sam9261_register_clocks(void)
248 clk_register(&hck0); 267 clk_register(&hck0);
249 clk_register(&hck1); 268 clk_register(&hck1);
250} 269}
251 270#else
271#define at91sam9261_register_clocks NULL
272#endif
252/* -------------------------------------------------------------------- 273/* --------------------------------------------------------------------
253 * GPIO 274 * GPIO
254 * -------------------------------------------------------------------- */ 275 * -------------------------------------------------------------------- */
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c
index 486530c3973b..f30290572293 100644
--- a/arch/arm/mach-at91/at91sam9263.c
+++ b/arch/arm/mach-at91/at91sam9263.c
@@ -224,6 +224,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
224 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk), 224 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioCDE_clk),
225 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk), 225 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk),
226 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk), 226 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk),
227 CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
227}; 228};
228 229
229static struct clk_lookup usart_clocks_lookups[] = { 230static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c
index 8c11696f606e..5e6f498db0a8 100644
--- a/arch/arm/mach-at91/at91sam9g45.c
+++ b/arch/arm/mach-at91/at91sam9g45.c
@@ -285,6 +285,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
285 CLKDEV_CON_ID("pioE", &pioDE_clk), 285 CLKDEV_CON_ID("pioE", &pioDE_clk),
286 /* Fake adc clock */ 286 /* Fake adc clock */
287 CLKDEV_CON_ID("adc_clk", &tsc_clk), 287 CLKDEV_CON_ID("adc_clk", &tsc_clk),
288 CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk),
288}; 289};
289 290
290static struct clk_lookup usart_clocks_lookups[] = { 291static struct clk_lookup usart_clocks_lookups[] = {
diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c
index 4ef088c62eab..f2ea7b0a02da 100644
--- a/arch/arm/mach-at91/at91sam9n12.c
+++ b/arch/arm/mach-at91/at91sam9n12.c
@@ -182,6 +182,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
182 /* additional fake clock for macb_hclk */ 182 /* additional fake clock for macb_hclk */
183 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk), 183 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &uhp_clk),
184 CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk), 184 CLKDEV_CON_DEV_ID("ohci_clk", "500000.ohci", &uhp_clk),
185 CLKDEV_CON_DEV_ID(NULL, "f8034000.pwm", &pwm_clk),
185}; 186};
186 187
187/* 188/*
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c
index c0d5474706f8..57f12d86c0e6 100644
--- a/arch/arm/mach-at91/at91sam9rl.c
+++ b/arch/arm/mach-at91/at91sam9rl.c
@@ -26,13 +26,14 @@
26#include "at91_rstc.h" 26#include "at91_rstc.h"
27#include "soc.h" 27#include "soc.h"
28#include "generic.h" 28#include "generic.h"
29#include "clock.h"
30#include "sam9_smc.h" 29#include "sam9_smc.h"
31#include "pm.h" 30#include "pm.h"
32 31
33/* -------------------------------------------------------------------- 32/* --------------------------------------------------------------------
34 * Clocks 33 * Clocks
35 * -------------------------------------------------------------------- */ 34 * -------------------------------------------------------------------- */
35#if defined(CONFIG_OLD_CLK_AT91)
36#include "clock.h"
36 37
37/* 38/*
38 * The peripheral clocks. 39 * The peripheral clocks.
@@ -197,6 +198,24 @@ static struct clk_lookup periph_clocks_lookups[] = {
197 CLKDEV_CON_ID("pioB", &pioB_clk), 198 CLKDEV_CON_ID("pioB", &pioB_clk),
198 CLKDEV_CON_ID("pioC", &pioC_clk), 199 CLKDEV_CON_ID("pioC", &pioC_clk),
199 CLKDEV_CON_ID("pioD", &pioD_clk), 200 CLKDEV_CON_ID("pioD", &pioD_clk),
201 /* more lookup table for DT entries */
202 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
203 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk),
204 CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk),
205 CLKDEV_CON_DEV_ID("usart", "ffffb800.serial", &usart2_clk),
206 CLKDEV_CON_DEV_ID("usart", "ffffbc00.serial", &usart3_clk),
207 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk),
208 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk),
209 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk),
210 CLKDEV_CON_DEV_ID("mci_clk", "fffa4000.mmc", &mmc_clk),
211 CLKDEV_CON_DEV_ID(NULL, "fffa8000.i2c", &twi0_clk),
212 CLKDEV_CON_DEV_ID(NULL, "fffac000.i2c", &twi1_clk),
213 CLKDEV_CON_DEV_ID(NULL, "fffc8000.pwm", &pwm_clk),
214 CLKDEV_CON_DEV_ID(NULL, "ffffc800.pwm", &pwm_clk),
215 CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk),
216 CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk),
217 CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk),
218 CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk),
200}; 219};
201 220
202static struct clk_lookup usart_clocks_lookups[] = { 221static struct clk_lookup usart_clocks_lookups[] = {
@@ -239,6 +258,7 @@ static void __init at91sam9rl_register_clocks(void)
239 clk_register(&pck0); 258 clk_register(&pck0);
240 clk_register(&pck1); 259 clk_register(&pck1);
241} 260}
261#endif
242 262
243/* -------------------------------------------------------------------- 263/* --------------------------------------------------------------------
244 * GPIO 264 * GPIO
@@ -351,6 +371,8 @@ AT91_SOC_START(at91sam9rl)
351 .default_irq_priority = at91sam9rl_default_irq_priority, 371 .default_irq_priority = at91sam9rl_default_irq_priority,
352 .extern_irq = (1 << AT91SAM9RL_ID_IRQ0), 372 .extern_irq = (1 << AT91SAM9RL_ID_IRQ0),
353 .ioremap_registers = at91sam9rl_ioremap_registers, 373 .ioremap_registers = at91sam9rl_ioremap_registers,
374#if defined(CONFIG_OLD_CLK_AT91)
354 .register_clocks = at91sam9rl_register_clocks, 375 .register_clocks = at91sam9rl_register_clocks,
376#endif
355 .init = at91sam9rl_initialize, 377 .init = at91sam9rl_initialize,
356AT91_SOC_END 378AT91_SOC_END
diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c
index 3e8ec26e39dc..9ad781d5ee7c 100644
--- a/arch/arm/mach-at91/at91sam9x5.c
+++ b/arch/arm/mach-at91/at91sam9x5.c
@@ -253,6 +253,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
253 CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk), 253 CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk),
254 CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk), 254 CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk),
255 CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk), 255 CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk),
256 CLKDEV_CON_DEV_ID(NULL, "f8034000.pwm", &pwm_clk),
256}; 257};
257 258
258/* 259/*
diff --git a/arch/arm/mach-at91/board-dt-sam9.c b/arch/arm/mach-at91/board-dt-sam9.c
index 3dab868b02fa..575b0be66ca8 100644
--- a/arch/arm/mach-at91/board-dt-sam9.c
+++ b/arch/arm/mach-at91/board-dt-sam9.c
@@ -13,6 +13,7 @@
13#include <linux/gpio.h> 13#include <linux/gpio.h>
14#include <linux/of.h> 14#include <linux/of.h>
15#include <linux/of_irq.h> 15#include <linux/of_irq.h>
16#include <linux/clk-provider.h>
16 17
17#include <asm/setup.h> 18#include <asm/setup.h>
18#include <asm/irq.h> 19#include <asm/irq.h>
@@ -25,6 +26,14 @@
25#include "generic.h" 26#include "generic.h"
26 27
27 28
29static void __init sam9_dt_timer_init(void)
30{
31#if defined(CONFIG_COMMON_CLK)
32 of_clk_init(NULL);
33#endif
34 at91sam926x_pit_init();
35}
36
28static const struct of_device_id irq_of_match[] __initconst = { 37static const struct of_device_id irq_of_match[] __initconst = {
29 38
30 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init }, 39 { .compatible = "atmel,at91rm9200-aic", .data = at91_aic_of_init },
@@ -43,7 +52,7 @@ static const char *at91_dt_board_compat[] __initdata = {
43 52
44DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") 53DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)")
45 /* Maintainer: Atmel */ 54 /* Maintainer: Atmel */
46 .init_time = at91sam926x_pit_init, 55 .init_time = sam9_dt_timer_init,
47 .map_io = at91_map_io, 56 .map_io = at91_map_io,
48 .handle_irq = at91_aic_handle_irq, 57 .handle_irq = at91_aic_handle_irq,
49 .init_early = at91_dt_initialize, 58 .init_early = at91_dt_initialize,
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-27 06:01:19 -0500