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authorAuke Kok <auke-jan.h.kok@intel.com>2007-10-31 18:22:10 -0400
committerDavid S. Miller <davem@davemloft.net>2008-01-28 18:03:44 -0500
commit3957d63da0067ad6a7dc8261b7eeb824f9dc42b4 (patch)
tree6566a29315969cb531f204d3a5c4ebcb8a1fc311
parent040babf9d84e7010c457e9ce69e9eb1c27927c9e (diff)
ixgbe: Fix copper PHY initialization code
While cleaning up the internal API focussing on Fiber and CX4 code we found that I had broken the copper PHY initialization code. This patch restores the PHY-specific code. This is mostly uninteresting since no copper PHY boards are yet available. The changes have been tested against Fiber only as I do not even have copper PHY versions of 82598 macs. This change actually cleans up the API code a bit more and we lose some initialization code. A few PHY link detection helper lines of code have been snuck into this patch, as well as a read flush where it was suspected that this might cause issues. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
-rw-r--r--drivers/net/ixgbe/ixgbe.h8
-rw-r--r--drivers/net/ixgbe/ixgbe_82598.c156
-rw-r--r--drivers/net/ixgbe/ixgbe_common.c10
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c19
-rw-r--r--drivers/net/ixgbe/ixgbe_phy.h1
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h13
6 files changed, 71 insertions, 136 deletions
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index bc51432b8d26..a021a6e72641 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -234,14 +234,10 @@ enum ixbge_state_t {
234}; 234};
235 235
236enum ixgbe_boards { 236enum ixgbe_boards {
237 board_82598AF, 237 board_82598,
238 board_82598EB,
239 board_82598AT,
240}; 238};
241 239
242extern struct ixgbe_info ixgbe_82598AF_info; 240extern struct ixgbe_info ixgbe_82598_info;
243extern struct ixgbe_info ixgbe_82598EB_info;
244extern struct ixgbe_info ixgbe_82598AT_info;
245 241
246extern char ixgbe_driver_name[]; 242extern char ixgbe_driver_name[];
247extern const char ixgbe_driver_version[]; 243extern const char ixgbe_driver_version[];
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index 4d64673164ca..6321b059ce13 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -50,8 +50,6 @@ static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
50 bool autoneg, 50 bool autoneg,
51 bool autoneg_wait_to_complete); 51 bool autoneg_wait_to_complete);
52static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw); 52static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw);
53static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed,
54 bool *link_up);
55static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed, 53static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
56 bool autoneg, 54 bool autoneg,
57 bool autoneg_wait_to_complete); 55 bool autoneg_wait_to_complete);
@@ -64,6 +62,28 @@ static s32 ixgbe_get_invariants_82598(struct ixgbe_hw *hw)
64 hw->mac.num_tx_queues = IXGBE_82598_MAX_RX_QUEUES; 62 hw->mac.num_tx_queues = IXGBE_82598_MAX_RX_QUEUES;
65 hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES; 63 hw->mac.num_rx_addrs = IXGBE_82598_RAR_ENTRIES;
66 64
65 /* PHY ops are filled in by default properly for Fiber only */
66 if (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {
67 hw->mac.ops.setup_link = &ixgbe_setup_copper_link_82598;
68 hw->mac.ops.setup_link_speed = &ixgbe_setup_copper_link_speed_82598;
69 hw->mac.ops.get_link_settings =
70 &ixgbe_get_copper_link_settings_82598;
71
72 /* Call PHY identify routine to get the phy type */
73 ixgbe_identify_phy(hw);
74
75 switch (hw->phy.type) {
76 case ixgbe_phy_tn:
77 hw->phy.ops.setup_link = &ixgbe_setup_tnx_phy_link;
78 hw->phy.ops.check_link = &ixgbe_check_tnx_phy_link;
79 hw->phy.ops.setup_link_speed =
80 &ixgbe_setup_tnx_phy_link_speed;
81 break;
82 default:
83 break;
84 }
85 }
86
67 return 0; 87 return 0;
68} 88}
69 89
@@ -206,6 +226,7 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw)
206 autoc_reg |= hw->mac.link_mode_select; 226 autoc_reg |= hw->mac.link_mode_select;
207 227
208 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg); 228 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);
229 IXGBE_WRITE_FLUSH(hw);
209 msleep(50); 230 msleep(50);
210 } 231 }
211 232
@@ -314,7 +335,7 @@ static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
314 * ixgbe_hw This will write the AUTOC register based on the new 335 * ixgbe_hw This will write the AUTOC register based on the new
315 * stored values 336 * stored values
316 */ 337 */
317 hw->phy.ops.setup(hw); 338 hw->mac.ops.setup_link(hw);
318 } 339 }
319 340
320 return status; 341 return status;
@@ -332,72 +353,18 @@ static s32 ixgbe_setup_mac_link_speed_82598(struct ixgbe_hw *hw,
332 **/ 353 **/
333static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw) 354static s32 ixgbe_setup_copper_link_82598(struct ixgbe_hw *hw)
334{ 355{
335 s32 status; 356 s32 status = 0;
336 u32 speed = 0;
337 bool link_up = false;
338
339 /* Set up MAC */
340 hw->phy.ops.setup(hw);
341 357
342 /* Restart autonegotiation on PHY */ 358 /* Restart autonegotiation on PHY */
343 status = hw->phy.ops.setup(hw); 359 if (hw->phy.ops.setup_link)
344 360 status = hw->phy.ops.setup_link(hw);
345 /* Synchronize MAC to PHY speed */
346 if (status == 0)
347 status = hw->phy.ops.check(hw, &speed, &link_up);
348
349 return status;
350}
351 361
352/** 362 /* Set MAC to KX/KX4 autoneg, which defaultis to Parallel detection */
353 * ixgbe_check_copper_link_82598 - Syncs MAC & PHY link settings 363 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
354 * @hw: pointer to hardware structure 364 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
355 * @speed: pointer to link speed
356 * @link_up: true if link is up, false otherwise
357 *
358 * Reads the mac link, phy link, and synchronizes the MAC to PHY.
359 **/
360static s32 ixgbe_check_copper_link_82598(struct ixgbe_hw *hw, u32 *speed,
361 bool *link_up)
362{
363 s32 status;
364 u32 phy_speed = 0;
365 bool phy_link = false;
366 365
367 /* This is the speed and link the MAC is set at */ 366 /* Set up MAC */
368 hw->phy.ops.check(hw, speed, link_up); 367 hw->mac.ops.setup_link(hw);
369
370 /*
371 * Check current speed and link status of the PHY register.
372 * This is a vendor specific register and may have to
373 * be changed for other copper PHYs.
374 */
375 status = hw->phy.ops.check(hw, &phy_speed, &phy_link);
376
377 if ((status == 0) && (phy_link)) {
378 /*
379 * Check current link status of the MACs link's register
380 * matches that of the speed in the PHY register
381 */
382 if (*speed != phy_speed) {
383 /*
384 * The copper PHY requires 82598 attach type to be XAUI
385 * for 10G and BX for 1G
386 */
387 hw->mac.link_attach_type =
388 (IXGBE_AUTOC_10G_XAUI | IXGBE_AUTOC_1G_BX);
389
390 /* Synchronize the MAC speed to the PHY speed */
391 status = hw->phy.ops.setup_speed(hw, phy_speed, false,
392 false);
393 if (status == 0)
394 hw->phy.ops.check(hw, speed, link_up);
395 else
396 status = IXGBE_ERR_LINK_SETUP;
397 }
398 } else {
399 *link_up = phy_link;
400 }
401 368
402 return status; 369 return status;
403} 370}
@@ -415,16 +382,19 @@ static s32 ixgbe_setup_copper_link_speed_82598(struct ixgbe_hw *hw, u32 speed,
415 bool autoneg, 382 bool autoneg,
416 bool autoneg_wait_to_complete) 383 bool autoneg_wait_to_complete)
417{ 384{
418 s32 status; 385 s32 status = 0;
419 bool link_up = 0;
420 386
421 /* Setup the PHY according to input speed */ 387 /* Setup the PHY according to input speed */
422 status = hw->phy.ops.setup_speed(hw, speed, autoneg, 388 if (hw->phy.ops.setup_link_speed)
423 autoneg_wait_to_complete); 389 status = hw->phy.ops.setup_link_speed(hw, speed, autoneg,
390 autoneg_wait_to_complete);
391
392 /* Set MAC to KX/KX4 autoneg, which defaults to Parallel detection */
393 hw->mac.link_attach_type = (IXGBE_AUTOC_10G_KX4 | IXGBE_AUTOC_1G_KX);
394 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_KX4_AN;
424 395
425 /* Synchronize MAC to PHY speed */ 396 /* Set up MAC */
426 if (status == 0) 397 hw->mac.ops.setup_link(hw);
427 status = hw->phy.ops.check(hw, &speed, &link_up);
428 398
429 return status; 399 return status;
430} 400}
@@ -542,47 +512,15 @@ static s32 ixgbe_reset_hw_82598(struct ixgbe_hw *hw)
542static struct ixgbe_mac_operations mac_ops_82598 = { 512static struct ixgbe_mac_operations mac_ops_82598 = {
543 .reset = &ixgbe_reset_hw_82598, 513 .reset = &ixgbe_reset_hw_82598,
544 .get_media_type = &ixgbe_get_media_type_82598, 514 .get_media_type = &ixgbe_get_media_type_82598,
515 .setup_link = &ixgbe_setup_mac_link_82598,
516 .check_link = &ixgbe_check_mac_link_82598,
517 .setup_link_speed = &ixgbe_setup_mac_link_speed_82598,
518 .get_link_settings = &ixgbe_get_link_settings_82598,
545}; 519};
546 520
547static struct ixgbe_phy_operations phy_ops_82598EB = { 521struct ixgbe_info ixgbe_82598_info = {
548 .setup = &ixgbe_setup_copper_link_82598,
549 .check = &ixgbe_check_copper_link_82598,
550 .setup_speed = &ixgbe_setup_copper_link_speed_82598,
551 .get_settings = &ixgbe_get_copper_link_settings_82598,
552};
553
554struct ixgbe_info ixgbe_82598EB_info = {
555 .mac = ixgbe_mac_82598EB,
556 .get_invariants = &ixgbe_get_invariants_82598,
557 .mac_ops = &mac_ops_82598,
558 .phy_ops = &phy_ops_82598EB,
559};
560
561static struct ixgbe_phy_operations phy_ops_82598AT = {
562 .setup = &ixgbe_setup_tnx_phy_link,
563 .check = &ixgbe_check_tnx_phy_link,
564 .setup_speed = &ixgbe_setup_tnx_phy_link_speed,
565 .get_settings = &ixgbe_get_copper_link_settings_82598,
566};
567
568struct ixgbe_info ixgbe_82598AT_info = {
569 .mac = ixgbe_mac_82598EB,
570 .get_invariants = &ixgbe_get_invariants_82598,
571 .mac_ops = &mac_ops_82598,
572 .phy_ops = &phy_ops_82598AT,
573};
574
575static struct ixgbe_phy_operations phy_ops_82598AF = {
576 .setup = &ixgbe_setup_mac_link_82598,
577 .check = &ixgbe_check_mac_link_82598,
578 .setup_speed = &ixgbe_setup_mac_link_speed_82598,
579 .get_settings = &ixgbe_get_link_settings_82598,
580};
581
582struct ixgbe_info ixgbe_82598AF_info = {
583 .mac = ixgbe_mac_82598EB, 522 .mac = ixgbe_mac_82598EB,
584 .get_invariants = &ixgbe_get_invariants_82598, 523 .get_invariants = &ixgbe_get_invariants_82598,
585 .mac_ops = &mac_ops_82598, 524 .mac_ops = &mac_ops_82598,
586 .phy_ops = &phy_ops_82598AF,
587}; 525};
588 526
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c
index 512e3b22ed08..9c10c0584edf 100644
--- a/drivers/net/ixgbe/ixgbe_common.c
+++ b/drivers/net/ixgbe/ixgbe_common.c
@@ -74,7 +74,7 @@ s32 ixgbe_start_hw(struct ixgbe_hw *hw)
74 ixgbe_clear_vfta(hw); 74 ixgbe_clear_vfta(hw);
75 75
76 /* Set up link */ 76 /* Set up link */
77 hw->phy.ops.setup(hw); 77 hw->mac.ops.setup_link(hw);
78 78
79 /* Clear statistics registers */ 79 /* Clear statistics registers */
80 ixgbe_clear_hw_cntrs(hw); 80 ixgbe_clear_hw_cntrs(hw);
@@ -83,6 +83,7 @@ s32 ixgbe_start_hw(struct ixgbe_hw *hw)
83 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 83 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
84 ctrl_ext |= IXGBE_CTRL_EXT_NS_DIS; 84 ctrl_ext |= IXGBE_CTRL_EXT_NS_DIS;
85 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext); 85 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
86 IXGBE_WRITE_FLUSH(hw);
86 87
87 /* Clear adapter stopped flag */ 88 /* Clear adapter stopped flag */
88 hw->adapter_stopped = false; 89 hw->adapter_stopped = false;
@@ -297,6 +298,7 @@ s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
297 led_reg &= ~IXGBE_LED_MODE_MASK(index); 298 led_reg &= ~IXGBE_LED_MODE_MASK(index);
298 led_reg |= IXGBE_LED_ON << IXGBE_LED_MODE_SHIFT(index); 299 led_reg |= IXGBE_LED_ON << IXGBE_LED_MODE_SHIFT(index);
299 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); 300 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
301 IXGBE_WRITE_FLUSH(hw);
300 302
301 return 0; 303 return 0;
302} 304}
@@ -314,6 +316,7 @@ s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
314 led_reg &= ~IXGBE_LED_MODE_MASK(index); 316 led_reg &= ~IXGBE_LED_MODE_MASK(index);
315 led_reg |= IXGBE_LED_OFF << IXGBE_LED_MODE_SHIFT(index); 317 led_reg |= IXGBE_LED_OFF << IXGBE_LED_MODE_SHIFT(index);
316 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg); 318 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
319 IXGBE_WRITE_FLUSH(hw);
317 320
318 return 0; 321 return 0;
319} 322}
@@ -496,6 +499,7 @@ static void ixgbe_release_eeprom_semaphore(struct ixgbe_hw *hw)
496 /* Release both semaphores by writing 0 to the bits SWESMBI and SMBI */ 499 /* Release both semaphores by writing 0 to the bits SWESMBI and SMBI */
497 swsm &= ~(IXGBE_SWSM_SWESMBI | IXGBE_SWSM_SMBI); 500 swsm &= ~(IXGBE_SWSM_SWESMBI | IXGBE_SWSM_SMBI);
498 IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm); 501 IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm);
502 IXGBE_WRITE_FLUSH(hw);
499} 503}
500 504
501/** 505/**
@@ -1132,7 +1136,7 @@ void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask)
1132} 1136}
1133 1137
1134/** 1138/**
1135 * ixgbe_read_analog_reg8- Reads 8 bit 82598 Atlas analog register 1139 * ixgbe_read_analog_reg8 - Reads 8 bit Atlas analog register
1136 * @hw: pointer to hardware structure 1140 * @hw: pointer to hardware structure
1137 * @reg: analog register to read 1141 * @reg: analog register to read
1138 * @val: read value 1142 * @val: read value
@@ -1154,7 +1158,7 @@ s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1154} 1158}
1155 1159
1156/** 1160/**
1157 * ixgbe_write_analog_reg8- Writes 8 bit Atlas analog register 1161 * ixgbe_write_analog_reg8 - Writes 8 bit Atlas analog register
1158 * @hw: pointer to hardware structure 1162 * @hw: pointer to hardware structure
1159 * @reg: atlas register to write 1163 * @reg: atlas register to write
1160 * @val: value to write 1164 * @val: value to write
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 88341bfb5634..28c0fac1feed 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -54,9 +54,7 @@ static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation."; 54 "Copyright (c) 1999-2007 Intel Corporation.";
55 55
56static const struct ixgbe_info *ixgbe_info_tbl[] = { 56static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598AF] = &ixgbe_82598AF_info, 57 [board_82598] = &ixgbe_82598_info,
58 [board_82598EB] = &ixgbe_82598EB_info,
59 [board_82598AT] = &ixgbe_82598AT_info,
60}; 58};
61 59
62/* ixgbe_pci_tbl - PCI Device ID Table 60/* ixgbe_pci_tbl - PCI Device ID Table
@@ -69,13 +67,13 @@ static const struct ixgbe_info *ixgbe_info_tbl[] = {
69 */ 67 */
70static struct pci_device_id ixgbe_pci_tbl[] = { 68static struct pci_device_id ixgbe_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), 69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
72 board_82598AF }, 70 board_82598 },
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), 71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
74 board_82598AF }, 72 board_82598 },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT), 73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
76 board_82598AT }, 74 board_82598 },
77 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), 75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
78 board_82598EB }, 76 board_82598 },
79 77
80 /* required last entry */ 78 /* required last entry */
81 {0, } 79 {0, }
@@ -1570,8 +1568,8 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1570 dev_err(&pdev->dev, "HW Init failed\n"); 1568 dev_err(&pdev->dev, "HW Init failed\n");
1571 return -EIO; 1569 return -EIO;
1572 } 1570 }
1573 if (hw->phy.ops.setup_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true, 1571 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1574 false)) { 1572 false)) {
1575 dev_err(&pdev->dev, "Link Speed setup failed\n"); 1573 dev_err(&pdev->dev, "Link Speed setup failed\n");
1576 return -EIO; 1574 return -EIO;
1577 } 1575 }
@@ -2038,7 +2036,7 @@ static void ixgbe_watchdog(unsigned long data)
2038 bool link_up; 2036 bool link_up;
2039 u32 link_speed = 0; 2037 u32 link_speed = 0;
2040 2038
2041 adapter->hw.phy.ops.check(&adapter->hw, &(link_speed), &link_up); 2039 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
2042 2040
2043 if (link_up) { 2041 if (link_up) {
2044 if (!netif_carrier_ok(netdev)) { 2042 if (!netif_carrier_ok(netdev)) {
@@ -2606,7 +2604,6 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
2606 2604
2607 /* Setup hw api */ 2605 /* Setup hw api */
2608 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops)); 2606 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
2609 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
2610 2607
2611 err = ii->get_invariants(hw); 2608 err = ii->get_invariants(hw);
2612 if (err) 2609 if (err)
diff --git a/drivers/net/ixgbe/ixgbe_phy.h b/drivers/net/ixgbe/ixgbe_phy.h
index 199e8f670f3a..aa3ea72e678e 100644
--- a/drivers/net/ixgbe/ixgbe_phy.h
+++ b/drivers/net/ixgbe/ixgbe_phy.h
@@ -31,7 +31,6 @@
31 31
32#include "ixgbe_type.h" 32#include "ixgbe_type.h"
33 33
34s32 ixgbe_init_shared_code_phy(struct ixgbe_hw *hw);
35s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw); 34s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
36s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, u32 *speed, bool *link_up); 35s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, u32 *speed, bool *link_up);
37s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, u32 speed, bool autoneg, 36s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, u32 speed, bool autoneg,
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index fdcde16a2a99..e60787a66e58 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -1244,13 +1244,16 @@ struct ixgbe_hw;
1244struct ixgbe_mac_operations { 1244struct ixgbe_mac_operations {
1245 s32 (*reset)(struct ixgbe_hw *); 1245 s32 (*reset)(struct ixgbe_hw *);
1246 enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *); 1246 enum ixgbe_media_type (*get_media_type)(struct ixgbe_hw *);
1247 s32 (*setup_link)(struct ixgbe_hw *);
1248 s32 (*check_link)(struct ixgbe_hw *, u32 *, bool *);
1249 s32 (*setup_link_speed)(struct ixgbe_hw *, u32, bool, bool);
1250 s32 (*get_link_settings)(struct ixgbe_hw *, u32 *, bool *);
1247}; 1251};
1248 1252
1249struct ixgbe_phy_operations { 1253struct ixgbe_phy_operations {
1250 s32 (*setup)(struct ixgbe_hw *); 1254 s32 (*setup_link)(struct ixgbe_hw *);
1251 s32 (*check)(struct ixgbe_hw *, u32 *, bool *); 1255 s32 (*check_link)(struct ixgbe_hw *, u32 *, bool *);
1252 s32 (*setup_speed)(struct ixgbe_hw *, u32, bool, bool); 1256 s32 (*setup_link_speed)(struct ixgbe_hw *, u32, bool, bool);
1253 s32 (*get_settings)(struct ixgbe_hw *, u32 *, bool *);
1254}; 1257};
1255 1258
1256struct ixgbe_mac_info { 1259struct ixgbe_mac_info {
@@ -1267,7 +1270,6 @@ struct ixgbe_mac_info {
1267 bool link_settings_loaded; 1270 bool link_settings_loaded;
1268}; 1271};
1269 1272
1270
1271struct ixgbe_eeprom_info { 1273struct ixgbe_eeprom_info {
1272 enum ixgbe_eeprom_type type; 1274 enum ixgbe_eeprom_type type;
1273 u16 word_size; 1275 u16 word_size;
@@ -1290,7 +1292,6 @@ struct ixgbe_info {
1290 enum ixgbe_mac_type mac; 1292 enum ixgbe_mac_type mac;
1291 s32 (*get_invariants)(struct ixgbe_hw *); 1293 s32 (*get_invariants)(struct ixgbe_hw *);
1292 struct ixgbe_mac_operations *mac_ops; 1294 struct ixgbe_mac_operations *mac_ops;
1293 struct ixgbe_phy_operations *phy_ops;
1294}; 1295};
1295 1296
1296struct ixgbe_hw { 1297struct ixgbe_hw {