diff options
| author | Will Deacon <will.deacon@arm.com> | 2011-07-01 09:36:19 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-06 15:48:08 -0400 |
| commit | 38a8914f9ac2379293944f613e6ca24b61373de8 (patch) | |
| tree | 2e414d49cb202c610899b8871626fb9eda580452 | |
| parent | 186dcaa448c0a7a99933efac2af225fc4fe82c53 (diff) | |
ARM: 6987/1: l2x0: fix disabling function to avoid deadlock
The l2x0_disable function attempts to writel with the l2x0_lock held.
This results in deadlock when the writel contains an outer_sync call
for the platform since the l2x0_lock is already held by the disable
function. A further problem is that disabling the L2 without flushing it
first can lead to the spin_lock operation becoming visible after the
spin_unlock, causing any subsequent L2 maintenance to deadlock.
This patch replaces the writel with a call to writel_relaxed in the
disabling code and adds a flush before disabling in the control
register, preventing livelock from occurring.
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mm/cache-l2x0.c | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index ef59099a5463..44c086710d2b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
| @@ -120,17 +120,22 @@ static void l2x0_cache_sync(void) | |||
| 120 | spin_unlock_irqrestore(&l2x0_lock, flags); | 120 | spin_unlock_irqrestore(&l2x0_lock, flags); |
| 121 | } | 121 | } |
| 122 | 122 | ||
| 123 | static void l2x0_flush_all(void) | 123 | static void __l2x0_flush_all(void) |
| 124 | { | 124 | { |
| 125 | unsigned long flags; | ||
| 126 | |||
| 127 | /* clean all ways */ | ||
| 128 | spin_lock_irqsave(&l2x0_lock, flags); | ||
| 129 | debug_writel(0x03); | 125 | debug_writel(0x03); |
| 130 | writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY); | 126 | writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_CLEAN_INV_WAY); |
| 131 | cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask); | 127 | cache_wait_way(l2x0_base + L2X0_CLEAN_INV_WAY, l2x0_way_mask); |
| 132 | cache_sync(); | 128 | cache_sync(); |
| 133 | debug_writel(0x00); | 129 | debug_writel(0x00); |
| 130 | } | ||
| 131 | |||
| 132 | static void l2x0_flush_all(void) | ||
| 133 | { | ||
| 134 | unsigned long flags; | ||
| 135 | |||
| 136 | /* clean all ways */ | ||
| 137 | spin_lock_irqsave(&l2x0_lock, flags); | ||
| 138 | __l2x0_flush_all(); | ||
| 134 | spin_unlock_irqrestore(&l2x0_lock, flags); | 139 | spin_unlock_irqrestore(&l2x0_lock, flags); |
| 135 | } | 140 | } |
| 136 | 141 | ||
| @@ -266,7 +271,9 @@ static void l2x0_disable(void) | |||
| 266 | unsigned long flags; | 271 | unsigned long flags; |
| 267 | 272 | ||
| 268 | spin_lock_irqsave(&l2x0_lock, flags); | 273 | spin_lock_irqsave(&l2x0_lock, flags); |
| 269 | writel(0, l2x0_base + L2X0_CTRL); | 274 | __l2x0_flush_all(); |
| 275 | writel_relaxed(0, l2x0_base + L2X0_CTRL); | ||
| 276 | dsb(); | ||
| 270 | spin_unlock_irqrestore(&l2x0_lock, flags); | 277 | spin_unlock_irqrestore(&l2x0_lock, flags); |
| 271 | } | 278 | } |
| 272 | 279 | ||
