diff options
| author | Daniel Kurtz <djkurtz@chromium.org> | 2012-07-24 08:13:58 -0400 |
|---|---|---|
| committer | Jean Delvare <khali@endymion.delvare> | 2012-07-24 08:13:58 -0400 |
| commit | 37af871112e1dec1e39dfac782f0be5926be1c88 (patch) | |
| tree | ceea12fef1f8a412509ae903cacb8d30b248ed9f | |
| parent | edbeea63839cf0ea169c3e0737d49a96b2ca8388 (diff) | |
i2c-i801: Drop ENABLE_INT9
Later patches enable interrupts. This preliminary patch removes the older
unsupported ENABLE_INT9 flag.
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
| -rw-r--r-- | drivers/i2c/busses/i2c-i801.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 016fa22f1351..569a282e3347 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
| @@ -104,7 +104,6 @@ | |||
| 104 | 104 | ||
| 105 | /* Other settings */ | 105 | /* Other settings */ |
| 106 | #define MAX_RETRIES 400 | 106 | #define MAX_RETRIES 400 |
| 107 | #define ENABLE_INT9 0 /* set to 0x01 to enable - untested */ | ||
| 108 | 107 | ||
| 109 | /* I801 command constants */ | 108 | /* I801 command constants */ |
| 110 | #define I801_QUICK 0x00 | 109 | #define I801_QUICK 0x00 |
| @@ -271,7 +270,7 @@ static int i801_transaction(struct i801_priv *priv, int xact) | |||
| 271 | return result; | 270 | return result; |
| 272 | 271 | ||
| 273 | /* the current contents of SMBHSTCNT can be overwritten, since PEC, | 272 | /* the current contents of SMBHSTCNT can be overwritten, since PEC, |
| 274 | * INTREN, SMBSCMD are passed in xact */ | 273 | * SMBSCMD are passed in xact */ |
| 275 | outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv)); | 274 | outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv)); |
| 276 | 275 | ||
| 277 | /* We will always wait for a fraction of a second! */ | 276 | /* We will always wait for a fraction of a second! */ |
| @@ -323,7 +322,7 @@ static int i801_block_transaction_by_block(struct i801_priv *priv, | |||
| 323 | outb_p(data->block[i+1], SMBBLKDAT(priv)); | 322 | outb_p(data->block[i+1], SMBBLKDAT(priv)); |
| 324 | } | 323 | } |
| 325 | 324 | ||
| 326 | status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 | | 325 | status = i801_transaction(priv, I801_BLOCK_DATA | |
| 327 | (hwpec ? SMBHSTCNT_PEC_EN : 0)); | 326 | (hwpec ? SMBHSTCNT_PEC_EN : 0)); |
| 328 | if (status) | 327 | if (status) |
| 329 | return status; | 328 | return status; |
| @@ -376,7 +375,7 @@ static int i801_block_transaction_byte_by_byte(struct i801_priv *priv, | |||
| 376 | for (i = 1; i <= len; i++) { | 375 | for (i = 1; i <= len; i++) { |
| 377 | if (i == len && read_write == I2C_SMBUS_READ) | 376 | if (i == len && read_write == I2C_SMBUS_READ) |
| 378 | smbcmd |= SMBHSTCNT_LAST_BYTE; | 377 | smbcmd |= SMBHSTCNT_LAST_BYTE; |
| 379 | outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv)); | 378 | outb_p(smbcmd, SMBHSTCNT(priv)); |
| 380 | 379 | ||
| 381 | if (i == 1) | 380 | if (i == 1) |
| 382 | outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START, | 381 | outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START, |
| @@ -567,7 +566,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, | |||
| 567 | ret = i801_block_transaction(priv, data, read_write, size, | 566 | ret = i801_block_transaction(priv, data, read_write, size, |
| 568 | hwpec); | 567 | hwpec); |
| 569 | else | 568 | else |
| 570 | ret = i801_transaction(priv, xact | ENABLE_INT9); | 569 | ret = i801_transaction(priv, xact); |
| 571 | 570 | ||
| 572 | /* Some BIOSes don't like it when PEC is enabled at reboot or resume | 571 | /* Some BIOSes don't like it when PEC is enabled at reboot or resume |
| 573 | time, so we forcibly disable it after every transaction. Turn off | 572 | time, so we forcibly disable it after every transaction. Turn off |
