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authorMarcin Koƛcielnicki <koriakin@0x04.net>2010-02-25 13:53:37 -0500
committerBen Skeggs <bskeggs@redhat.com>2010-03-10 01:06:40 -0500
commit37000d275721e25af6b49fbb2dbcd04022091276 (patch)
tree3d223727eadd046dfa85a9065770fa6d293dfe69
parent3bfc7d22d0400e85a93e835d4398dcbe0af68b0b (diff)
drm/nv50: Remove redundant/incorrect ctxvals initialisation.
11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised earlier anyway by both our ctxprog generator and blob ctxvals. It's actually incorrect with the generator, since we use different layout on pre-NVA0. Signed-off-by: Marcin Koƛcielnicki <koriakin@0x04.net> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 857a09671a39..08d87b749a52 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -229,10 +229,6 @@ nv50_graph_create_context(struct nouveau_channel *chan)
229 nouveau_grctx_vals_load(dev, ctx); 229 nouveau_grctx_vals_load(dev, ctx);
230 } 230 }
231 nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12); 231 nv_wo32(dev, ctx, 0x00000/4, chan->ramin->instance >> 12);
232 if ((dev_priv->chipset & 0xf0) == 0xa0)
233 nv_wo32(dev, ctx, 0x00004/4, 0x00000000);
234 else
235 nv_wo32(dev, ctx, 0x0011c/4, 0x00000000);
236 dev_priv->engine.instmem.finish_access(dev); 232 dev_priv->engine.instmem.finish_access(dev);
237 233
238 return 0; 234 return 0;