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authorDan Williams <dan.j.williams@intel.com>2007-02-13 11:13:34 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-17 10:05:40 -0500
commit3668b45d46f777b0773ef5ff49531c1144efb6dd (patch)
treed9bb1a1ce8d0cce8bff99578fc0ba4bf8cdedd75
parent4434c5c7fd61c6713de882a2272b66f32fe7cac3 (diff)
[ARM] 4187/1: iop: unify time implementation across iop32x, iop33x, and iop13xx
* architecture specific details are handled in asm/arch/time.h * ARCH_IOP13XX now selects PLAT_IOP * as suggested by Lennert use ifdef CONFIG_XSCALE to skip the cp_wait on XSC3 Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-iop13xx/Makefile1
-rw-r--r--arch/arm/mach-iop13xx/iq81340mc.c5
-rw-r--r--arch/arm/mach-iop13xx/iq81340sc.c5
-rw-r--r--arch/arm/mach-iop13xx/time.c92
-rw-r--r--arch/arm/mach-iop32x/glantank.c5
-rw-r--r--arch/arm/mach-iop32x/iq31244.c8
-rw-r--r--arch/arm/mach-iop32x/iq80321.c5
-rw-r--r--arch/arm/mach-iop32x/n2100.c5
-rw-r--r--arch/arm/mach-iop33x/iq80331.c7
-rw-r--r--arch/arm/mach-iop33x/iq80332.c7
-rw-r--r--arch/arm/plat-iop/Makefile1
-rw-r--r--arch/arm/plat-iop/time.c60
-rw-r--r--include/asm-arm/arch-iop13xx/iop13xx.h12
-rw-r--r--include/asm-arm/arch-iop13xx/time.h51
-rw-r--r--include/asm-arm/arch-iop32x/time.h4
-rw-r--r--include/asm-arm/arch-iop33x/time.h4
-rw-r--r--include/asm-arm/hardware/iop3xx.h55
17 files changed, 166 insertions, 161 deletions
diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile
index c3d6c08f2d4c..4185e0586c33 100644
--- a/arch/arm/mach-iop13xx/Makefile
+++ b/arch/arm/mach-iop13xx/Makefile
@@ -5,7 +5,6 @@ obj- :=
5 5
6obj-$(CONFIG_ARCH_IOP13XX) += setup.o 6obj-$(CONFIG_ARCH_IOP13XX) += setup.o
7obj-$(CONFIG_ARCH_IOP13XX) += irq.o 7obj-$(CONFIG_ARCH_IOP13XX) += irq.o
8obj-$(CONFIG_ARCH_IOP13XX) += time.o
9obj-$(CONFIG_ARCH_IOP13XX) += pci.o 8obj-$(CONFIG_ARCH_IOP13XX) += pci.o
10obj-$(CONFIG_ARCH_IOP13XX) += io.o 9obj-$(CONFIG_ARCH_IOP13XX) += io.o
11obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o 10obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c
index 2a1bbfe9896f..a519d707571c 100644
--- a/arch/arm/mach-iop13xx/iq81340mc.c
+++ b/arch/arm/mach-iop13xx/iq81340mc.c
@@ -25,6 +25,7 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/arch/pci.h> 26#include <asm/arch/pci.h>
27#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <asm/arch/time.h>
28 29
29extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */ 30extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */
30 31
@@ -78,12 +79,12 @@ static void __init iq81340mc_init(void)
78 79
79static void __init iq81340mc_timer_init(void) 80static void __init iq81340mc_timer_init(void)
80{ 81{
81 iop13xx_init_time(400000000); 82 iop_init_time(400000000);
82} 83}
83 84
84static struct sys_timer iq81340mc_timer = { 85static struct sys_timer iq81340mc_timer = {
85 .init = iq81340mc_timer_init, 86 .init = iq81340mc_timer_init,
86 .offset = iop13xx_gettimeoffset, 87 .offset = iop_gettimeoffset,
87}; 88};
88 89
89MACHINE_START(IQ81340MC, "Intel IQ81340MC") 90MACHINE_START(IQ81340MC, "Intel IQ81340MC")
diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c
index 5ad2b62c9bfd..0e71fbcabe00 100644
--- a/arch/arm/mach-iop13xx/iq81340sc.c
+++ b/arch/arm/mach-iop13xx/iq81340sc.c
@@ -25,6 +25,7 @@
25#include <asm/mach/arch.h> 25#include <asm/mach/arch.h>
26#include <asm/arch/pci.h> 26#include <asm/arch/pci.h>
27#include <asm/mach/time.h> 27#include <asm/mach/time.h>
28#include <asm/arch/time.h>
28 29
29extern int init_atu; 30extern int init_atu;
30 31
@@ -80,12 +81,12 @@ static void __init iq81340sc_init(void)
80 81
81static void __init iq81340sc_timer_init(void) 82static void __init iq81340sc_timer_init(void)
82{ 83{
83 iop13xx_init_time(400000000); 84 iop_init_time(400000000);
84} 85}
85 86
86static struct sys_timer iq81340sc_timer = { 87static struct sys_timer iq81340sc_timer = {
87 .init = iq81340sc_timer_init, 88 .init = iq81340sc_timer_init,
88 .offset = iop13xx_gettimeoffset, 89 .offset = iop_gettimeoffset,
89}; 90};
90 91
91MACHINE_START(IQ81340SC, "Intel IQ81340SC") 92MACHINE_START(IQ81340SC, "Intel IQ81340SC")
diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c
deleted file mode 100644
index fc9d9d9a8429..000000000000
--- a/arch/arm/mach-iop13xx/time.c
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * arch/arm/mach-iop13xx/time.c
3 *
4 * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation)
5 *
6 * Author: Deepak Saxena <dsaxena@mvista.com>
7 *
8 * Copyright 2002-2003 MontaVista Software Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/time.h>
19#include <linux/init.h>
20#include <linux/timex.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/uaccess.h>
24#include <asm/mach/irq.h>
25#include <asm/mach/time.h>
26
27static unsigned long ticks_per_jiffy;
28static unsigned long ticks_per_usec;
29static unsigned long next_jiffy_time;
30
31static inline u32 read_tcr1(void)
32{
33 u32 val;
34 asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
35 return val;
36}
37
38unsigned long iop13xx_gettimeoffset(void)
39{
40 unsigned long offset;
41
42 offset = next_jiffy_time - read_tcr1();
43
44 return offset / ticks_per_usec;
45}
46
47static irqreturn_t
48iop13xx_timer_interrupt(int irq, void *dev_id)
49{
50 write_seqlock(&xtime_lock);
51
52 asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1));
53
54 while ((signed long)(next_jiffy_time - read_tcr1())
55 >= ticks_per_jiffy) {
56 timer_tick();
57 next_jiffy_time -= ticks_per_jiffy;
58 }
59
60 write_sequnlock(&xtime_lock);
61
62 return IRQ_HANDLED;
63}
64
65static struct irqaction iop13xx_timer_irq = {
66 .name = "IOP13XX Timer Tick",
67 .handler = iop13xx_timer_interrupt,
68 .flags = IRQF_DISABLED | IRQF_TIMER,
69};
70
71void __init iop13xx_init_time(unsigned long tick_rate)
72{
73 u32 timer_ctl;
74
75 ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
76 ticks_per_usec = tick_rate / 1000000;
77 next_jiffy_time = 0xffffffff;
78
79 timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED |
80 IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1;
81
82 /*
83 * We use timer 0 for our timer interrupt, and timer 1 as
84 * monotonic counter for tracking missed jiffies.
85 */
86 asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1));
87 asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl));
88 asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff));
89 asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl));
90
91 setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq);
92}
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c
index b9b765057dbe..45f4f13ae11b 100644
--- a/arch/arm/mach-iop32x/glantank.c
+++ b/arch/arm/mach-iop32x/glantank.c
@@ -31,6 +31,7 @@
31#include <asm/mach/time.h> 31#include <asm/mach/time.h>
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33#include <asm/page.h> 33#include <asm/page.h>
34#include <asm/arch/time.h>
34 35
35/* 36/*
36 * GLAN Tank timer tick configuration. 37 * GLAN Tank timer tick configuration.
@@ -38,12 +39,12 @@
38static void __init glantank_timer_init(void) 39static void __init glantank_timer_init(void)
39{ 40{
40 /* 33.333 MHz crystal. */ 41 /* 33.333 MHz crystal. */
41 iop3xx_init_time(200000000); 42 iop_init_time(200000000);
42} 43}
43 44
44static struct sys_timer glantank_timer = { 45static struct sys_timer glantank_timer = {
45 .init = glantank_timer_init, 46 .init = glantank_timer_init,
46 .offset = iop3xx_gettimeoffset, 47 .offset = iop_gettimeoffset,
47}; 48};
48 49
49 50
diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c
index be4aedfa0de6..571ac35bc2c7 100644
--- a/arch/arm/mach-iop32x/iq31244.c
+++ b/arch/arm/mach-iop32x/iq31244.c
@@ -36,7 +36,7 @@
36#include <asm/mach-types.h> 36#include <asm/mach-types.h>
37#include <asm/page.h> 37#include <asm/page.h>
38#include <asm/pgtable.h> 38#include <asm/pgtable.h>
39 39#include <asm/arch/time.h>
40 40
41/* 41/*
42 * The EP80219 and IQ31244 use the same machine ID. To find out 42 * The EP80219 and IQ31244 use the same machine ID. To find out
@@ -56,16 +56,16 @@ static void __init iq31244_timer_init(void)
56{ 56{
57 if (is_80219()) { 57 if (is_80219()) {
58 /* 33.333 MHz crystal. */ 58 /* 33.333 MHz crystal. */
59 iop3xx_init_time(200000000); 59 iop_init_time(200000000);
60 } else { 60 } else {
61 /* 33.000 MHz crystal. */ 61 /* 33.000 MHz crystal. */
62 iop3xx_init_time(198000000); 62 iop_init_time(198000000);
63 } 63 }
64} 64}
65 65
66static struct sys_timer iq31244_timer = { 66static struct sys_timer iq31244_timer = {
67 .init = iq31244_timer_init, 67 .init = iq31244_timer_init,
68 .offset = iop3xx_gettimeoffset, 68 .offset = iop_gettimeoffset,
69}; 69};
70 70
71 71
diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c
index 1f37b5501888..361c70c0f64c 100644
--- a/arch/arm/mach-iop32x/iq80321.c
+++ b/arch/arm/mach-iop32x/iq80321.c
@@ -33,6 +33,7 @@
33#include <asm/mach-types.h> 33#include <asm/mach-types.h>
34#include <asm/page.h> 34#include <asm/page.h>
35#include <asm/pgtable.h> 35#include <asm/pgtable.h>
36#include <asm/arch/time.h>
36 37
37/* 38/*
38 * IQ80321 timer tick configuration. 39 * IQ80321 timer tick configuration.
@@ -40,12 +41,12 @@
40static void __init iq80321_timer_init(void) 41static void __init iq80321_timer_init(void)
41{ 42{
42 /* 33.333 MHz crystal. */ 43 /* 33.333 MHz crystal. */
43 iop3xx_init_time(200000000); 44 iop_init_time(200000000);
44} 45}
45 46
46static struct sys_timer iq80321_timer = { 47static struct sys_timer iq80321_timer = {
47 .init = iq80321_timer_init, 48 .init = iq80321_timer_init,
48 .offset = iop3xx_gettimeoffset, 49 .offset = iop_gettimeoffset,
49}; 50};
50 51
51 52
diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c
index 2499a7707e3c..92fa0c55443e 100644
--- a/arch/arm/mach-iop32x/n2100.c
+++ b/arch/arm/mach-iop32x/n2100.c
@@ -37,6 +37,7 @@
37#include <asm/mach-types.h> 37#include <asm/mach-types.h>
38#include <asm/page.h> 38#include <asm/page.h>
39#include <asm/pgtable.h> 39#include <asm/pgtable.h>
40#include <asm/arch/time.h>
40 41
41/* 42/*
42 * N2100 timer tick configuration. 43 * N2100 timer tick configuration.
@@ -44,12 +45,12 @@
44static void __init n2100_timer_init(void) 45static void __init n2100_timer_init(void)
45{ 46{
46 /* 33.000 MHz crystal. */ 47 /* 33.000 MHz crystal. */
47 iop3xx_init_time(198000000); 48 iop_init_time(198000000);
48} 49}
49 50
50static struct sys_timer n2100_timer = { 51static struct sys_timer n2100_timer = {
51 .init = n2100_timer_init, 52 .init = n2100_timer_init,
52 .offset = iop3xx_gettimeoffset, 53 .offset = iop_gettimeoffset,
53}; 54};
54 55
55 56
diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c
index 97a7b7488264..1a9e36138d80 100644
--- a/arch/arm/mach-iop33x/iq80331.c
+++ b/arch/arm/mach-iop33x/iq80331.c
@@ -32,6 +32,7 @@
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33#include <asm/page.h> 33#include <asm/page.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <asm/arch/time.h>
35 36
36/* 37/*
37 * IQ80331 timer tick configuration. 38 * IQ80331 timer tick configuration.
@@ -40,14 +41,14 @@ static void __init iq80331_timer_init(void)
40{ 41{
41 /* D-Step parts run at a higher internal bus frequency */ 42 /* D-Step parts run at a higher internal bus frequency */
42 if (*IOP3XX_ATURID >= 0xa) 43 if (*IOP3XX_ATURID >= 0xa)
43 iop3xx_init_time(333000000); 44 iop_init_time(333000000);
44 else 45 else
45 iop3xx_init_time(266000000); 46 iop_init_time(266000000);
46} 47}
47 48
48static struct sys_timer iq80331_timer = { 49static struct sys_timer iq80331_timer = {
49 .init = iq80331_timer_init, 50 .init = iq80331_timer_init,
50 .offset = iop3xx_gettimeoffset, 51 .offset = iop_gettimeoffset,
51}; 52};
52 53
53 54
diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c
index 9887bfc1c078..96d6f0f3cd21 100644
--- a/arch/arm/mach-iop33x/iq80332.c
+++ b/arch/arm/mach-iop33x/iq80332.c
@@ -32,6 +32,7 @@
32#include <asm/mach-types.h> 32#include <asm/mach-types.h>
33#include <asm/page.h> 33#include <asm/page.h>
34#include <asm/pgtable.h> 34#include <asm/pgtable.h>
35#include <asm/arch/time.h>
35 36
36/* 37/*
37 * IQ80332 timer tick configuration. 38 * IQ80332 timer tick configuration.
@@ -40,14 +41,14 @@ static void __init iq80332_timer_init(void)
40{ 41{
41 /* D-Step parts and the iop333 run at a higher internal bus frequency */ 42 /* D-Step parts and the iop333 run at a higher internal bus frequency */
42 if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374) 43 if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374)
43 iop3xx_init_time(333000000); 44 iop_init_time(333000000);
44 else 45 else
45 iop3xx_init_time(266000000); 46 iop_init_time(266000000);
46} 47}
47 48
48static struct sys_timer iq80332_timer = { 49static struct sys_timer iq80332_timer = {
49 .init = iq80332_timer_init, 50 .init = iq80332_timer_init,
50 .offset = iop3xx_gettimeoffset, 51 .offset = iop_gettimeoffset,
51}; 52};
52 53
53 54
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile
index 3250d732a171..4d2b1da3cd82 100644
--- a/arch/arm/plat-iop/Makefile
+++ b/arch/arm/plat-iop/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += cp6.o
24 24
25# IOP13XX 25# IOP13XX
26obj-$(CONFIG_ARCH_IOP13XX) += cp6.o 26obj-$(CONFIG_ARCH_IOP13XX) += cp6.o
27obj-$(CONFIG_ARCH_IOP13XX) += time.o
27 28
28obj-m := 29obj-m :=
29obj-n := 30obj-n :=
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c
index 0d53b813cbb4..16300adfb4de 100644
--- a/arch/arm/plat-iop/time.c
+++ b/arch/arm/plat-iop/time.c
@@ -24,37 +24,45 @@
24#include <asm/uaccess.h> 24#include <asm/uaccess.h>
25#include <asm/mach/irq.h> 25#include <asm/mach/irq.h>
26#include <asm/mach/time.h> 26#include <asm/mach/time.h>
27 27#include <asm/arch/time.h>
28#ifdef CONFIG_ARCH_IOP32X
29#define IRQ_IOP3XX_TIMER0 IRQ_IOP32X_TIMER0
30#else
31#ifdef CONFIG_ARCH_IOP33X
32#define IRQ_IOP3XX_TIMER0 IRQ_IOP33X_TIMER0
33#endif
34#endif
35 28
36static unsigned long ticks_per_jiffy; 29static unsigned long ticks_per_jiffy;
37static unsigned long ticks_per_usec; 30static unsigned long ticks_per_usec;
38static unsigned long next_jiffy_time; 31static unsigned long next_jiffy_time;
39 32
40unsigned long iop3xx_gettimeoffset(void) 33unsigned long iop_gettimeoffset(void)
41{ 34{
42 unsigned long offset; 35 unsigned long offset, temp1, temp2;
36
37 /* enable cp6, if necessary, to avoid taking the overhead of an
38 * undefined instruction trap
39 */
40 asm volatile (
41 "mrc p15, 0, %0, c15, c1, 0\n\t"
42 "ands %1, %0, #(1 << 6)\n\t"
43 "orreq %0, %0, #(1 << 6)\n\t"
44 "mcreq p15, 0, %0, c15, c1, 0\n\t"
45#ifdef CONFIG_XSCALE
46 "mrceq p15, 0, %0, c15, c1, 0\n\t"
47 "moveq %0, %0\n\t"
48 "subeq pc, pc, #4\n\t"
49#endif
50 : "=r"(temp1), "=r"(temp2) : : "cc");
43 51
44 offset = next_jiffy_time - *IOP3XX_TU_TCR1; 52 offset = next_jiffy_time - read_tcr1();
45 53
46 return offset / ticks_per_usec; 54 return offset / ticks_per_usec;
47} 55}
48 56
49static irqreturn_t 57static irqreturn_t
50iop3xx_timer_interrupt(int irq, void *dev_id) 58iop_timer_interrupt(int irq, void *dev_id)
51{ 59{
52 write_seqlock(&xtime_lock); 60 write_seqlock(&xtime_lock);
53 61
54 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1)); 62 write_tisr(1);
55 63
56 while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) 64 while ((signed long)(next_jiffy_time - read_tcr1())
57 >= ticks_per_jiffy) { 65 >= ticks_per_jiffy) {
58 timer_tick(); 66 timer_tick();
59 next_jiffy_time -= ticks_per_jiffy; 67 next_jiffy_time -= ticks_per_jiffy;
60 } 68 }
@@ -64,13 +72,13 @@ iop3xx_timer_interrupt(int irq, void *dev_id)
64 return IRQ_HANDLED; 72 return IRQ_HANDLED;
65} 73}
66 74
67static struct irqaction iop3xx_timer_irq = { 75static struct irqaction iop_timer_irq = {
68 .name = "IOP3XX Timer Tick", 76 .name = "IOP Timer Tick",
69 .handler = iop3xx_timer_interrupt, 77 .handler = iop_timer_interrupt,
70 .flags = IRQF_DISABLED | IRQF_TIMER, 78 .flags = IRQF_DISABLED | IRQF_TIMER,
71}; 79};
72 80
73void __init iop3xx_init_time(unsigned long tick_rate) 81void __init iop_init_time(unsigned long tick_rate)
74{ 82{
75 u32 timer_ctl; 83 u32 timer_ctl;
76 84
@@ -78,17 +86,17 @@ void __init iop3xx_init_time(unsigned long tick_rate)
78 ticks_per_usec = tick_rate / 1000000; 86 ticks_per_usec = tick_rate / 1000000;
79 next_jiffy_time = 0xffffffff; 87 next_jiffy_time = 0xffffffff;
80 88
81 timer_ctl = IOP3XX_TMR_EN | IOP3XX_TMR_PRIVILEGED | 89 timer_ctl = IOP_TMR_EN | IOP_TMR_PRIVILEGED |
82 IOP3XX_TMR_RELOAD | IOP3XX_TMR_RATIO_1_1; 90 IOP_TMR_RELOAD | IOP_TMR_RATIO_1_1;
83 91
84 /* 92 /*
85 * We use timer 0 for our timer interrupt, and timer 1 as 93 * We use timer 0 for our timer interrupt, and timer 1 as
86 * monotonic counter for tracking missed jiffies. 94 * monotonic counter for tracking missed jiffies.
87 */ 95 */
88 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1)); 96 write_trr0(ticks_per_jiffy - 1);
89 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); 97 write_tmr0(timer_ctl);
90 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff)); 98 write_trr1(0xffffffff);
91 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl)); 99 write_tmr1(timer_ctl);
92 100
93 setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq); 101 setup_irq(IRQ_IOP_TIMER0, &iop_timer_irq);
94} 102}
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index e7430593d6fb..d26b755a9879 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -9,8 +9,6 @@ void iop13xx_init_irq(void);
9void iop13xx_map_io(void); 9void iop13xx_map_io(void);
10void iop13xx_platform_init(void); 10void iop13xx_platform_init(void);
11void iop13xx_init_irq(void); 11void iop13xx_init_irq(void);
12void iop13xx_init_time(unsigned long tickrate);
13unsigned long iop13xx_gettimeoffset(void);
14 12
15/* CPUID CP6 R0 Page 0 */ 13/* CPUID CP6 R0 Page 0 */
16static inline int iop13xx_cpu_id(void) 14static inline int iop13xx_cpu_id(void)
@@ -453,14 +451,4 @@ static inline int iop13xx_cpu_id(void)
453#define IOP13XX_PBI_BAR1 IOP13XX_PBI_OFFSET(0x10) 451#define IOP13XX_PBI_BAR1 IOP13XX_PBI_OFFSET(0x10)
454#define IOP13XX_PBI_LR1 IOP13XX_PBI_OFFSET(0x14) 452#define IOP13XX_PBI_LR1 IOP13XX_PBI_OFFSET(0x14)
455 453
456#define IOP13XX_TMR_TC 0x01
457#define IOP13XX_TMR_EN 0x02
458#define IOP13XX_TMR_RELOAD 0x04
459#define IOP13XX_TMR_PRIVILEGED 0x08
460
461#define IOP13XX_TMR_RATIO_1_1 0x00
462#define IOP13XX_TMR_RATIO_4_1 0x10
463#define IOP13XX_TMR_RATIO_8_1 0x20
464#define IOP13XX_TMR_RATIO_16_1 0x30
465
466#endif /* _IOP13XX_HW_H_ */ 454#endif /* _IOP13XX_HW_H_ */
diff --git a/include/asm-arm/arch-iop13xx/time.h b/include/asm-arm/arch-iop13xx/time.h
new file mode 100644
index 000000000000..77a837a02dec
--- /dev/null
+++ b/include/asm-arm/arch-iop13xx/time.h
@@ -0,0 +1,51 @@
1#ifndef _IOP13XX_TIME_H_
2#define _IOP13XX_TIME_H_
3#define IRQ_IOP_TIMER0 IRQ_IOP13XX_TIMER0
4
5#define IOP_TMR_EN 0x02
6#define IOP_TMR_RELOAD 0x04
7#define IOP_TMR_PRIVILEGED 0x08
8#define IOP_TMR_RATIO_1_1 0x00
9
10void iop_init_time(unsigned long tickrate);
11unsigned long iop_gettimeoffset(void);
12
13static inline void write_tmr0(u32 val)
14{
15 asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val));
16}
17
18static inline void write_tmr1(u32 val)
19{
20 asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (val));
21}
22
23static inline u32 read_tcr0(void)
24{
25 u32 val;
26 asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val));
27 return val;
28}
29
30static inline u32 read_tcr1(void)
31{
32 u32 val;
33 asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
34 return val;
35}
36
37static inline void write_trr0(u32 val)
38{
39 asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val));
40}
41
42static inline void write_trr1(u32 val)
43{
44 asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val));
45}
46
47static inline void write_tisr(u32 val)
48{
49 asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (val));
50}
51#endif
diff --git a/include/asm-arm/arch-iop32x/time.h b/include/asm-arm/arch-iop32x/time.h
new file mode 100644
index 000000000000..0f28c9949623
--- /dev/null
+++ b/include/asm-arm/arch-iop32x/time.h
@@ -0,0 +1,4 @@
1#ifndef _IOP32X_TIME_H_
2#define _IOP32X_TIME_H_
3#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0
4#endif
diff --git a/include/asm-arm/arch-iop33x/time.h b/include/asm-arm/arch-iop33x/time.h
new file mode 100644
index 000000000000..4ac4d7664f85
--- /dev/null
+++ b/include/asm-arm/arch-iop33x/time.h
@@ -0,0 +1,4 @@
1#ifndef _IOP33X_TIME_H_
2#define _IOP33X_TIME_H_
3#define IRQ_IOP_TIMER0 IRQ_IOP33X_TIMER0
4#endif
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h
index 47fcbf6f52d3..15141a9caca8 100644
--- a/include/asm-arm/hardware/iop3xx.h
+++ b/include/asm-arm/hardware/iop3xx.h
@@ -188,14 +188,10 @@ extern void gpio_line_set(int line, int value);
188#define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014) 188#define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014)
189#define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018) 189#define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018)
190#define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c) 190#define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c)
191#define IOP3XX_TMR_TC 0x01 191#define IOP_TMR_EN 0x02
192#define IOP3XX_TMR_EN 0x02 192#define IOP_TMR_RELOAD 0x04
193#define IOP3XX_TMR_RELOAD 0x04 193#define IOP_TMR_PRIVILEGED 0x08
194#define IOP3XX_TMR_PRIVILEGED 0x09 194#define IOP_TMR_RATIO_1_1 0x00
195#define IOP3XX_TMR_RATIO_1_1 0x00
196#define IOP3XX_TMR_RATIO_4_1 0x10
197#define IOP3XX_TMR_RATIO_8_1 0x20
198#define IOP3XX_TMR_RATIO_16_1 0x30
199 195
200/* Application accelerator unit */ 196/* Application accelerator unit */
201#define IOP3XX_AAU_ACR (volatile u32 *)IOP3XX_REG_ADDR(0x0800) 197#define IOP3XX_AAU_ACR (volatile u32 *)IOP3XX_REG_ADDR(0x0800)
@@ -276,9 +272,48 @@ extern void gpio_line_set(int line, int value);
276 272
277#ifndef __ASSEMBLY__ 273#ifndef __ASSEMBLY__
278void iop3xx_map_io(void); 274void iop3xx_map_io(void);
279void iop3xx_init_time(unsigned long);
280unsigned long iop3xx_gettimeoffset(void);
281void iop_init_cp6_handler(void); 275void iop_init_cp6_handler(void);
276void iop_init_time(unsigned long tickrate);
277unsigned long iop_gettimeoffset(void);
278
279static inline void write_tmr0(u32 val)
280{
281 asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val));
282}
283
284static inline void write_tmr1(u32 val)
285{
286 asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val));
287}
288
289static inline u32 read_tcr0(void)
290{
291 u32 val;
292 asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val));
293 return val;
294}
295
296static inline u32 read_tcr1(void)
297{
298 u32 val;
299 asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val));
300 return val;
301}
302
303static inline void write_trr0(u32 val)
304{
305 asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val));
306}
307
308static inline void write_trr1(u32 val)
309{
310 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val));
311}
312
313static inline void write_tisr(u32 val)
314{
315 asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val));
316}
282 317
283extern struct platform_device iop3xx_i2c0_device; 318extern struct platform_device iop3xx_i2c0_device;
284extern struct platform_device iop3xx_i2c1_device; 319extern struct platform_device iop3xx_i2c1_device;