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authorSujith Manoharan <c_manoha@qca.qualcomm.com>2013-11-15 02:35:18 -0500
committerJohn W. Linville <linville@tuxdriver.com>2013-12-02 14:24:58 -0500
commit34d9b6893405c5afaf9d906062feae15ccfbcb28 (patch)
treef292ac4faf1a203278459078842fa67b5d933bed
parentc20a2c5912755e8cb6c643fa0aa87e93e1b2c893 (diff)
ath9k: Fix Carrier Leak calibration for SoC chips
CL calibration is applicable for all chips and the enable/disable knob comes via the INI file. For PCOEM chips, the calibration data is reused when Fast Channel Change is used. Caldata reuse is not enabled for SoC chips, so remove the CL post processing code. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_calib.c27
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_phy.c9
2 files changed, 7 insertions, 29 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index 347b002938ed..58eacf12db83 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -1236,20 +1236,13 @@ static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
1236 bool txiqcal_done = false; 1236 bool txiqcal_done = false;
1237 bool is_reusable = true, status = true; 1237 bool is_reusable = true, status = true;
1238 bool run_agc_cal = false, sep_iq_cal = false; 1238 bool run_agc_cal = false, sep_iq_cal = false;
1239 u32 rx_delay = 0;
1240 1239
1241 /* Use chip chainmask only for calibration */ 1240 /* Use chip chainmask only for calibration */
1242 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask); 1241 ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
1243 1242
1244 if (ah->enabled_cals & TX_CL_CAL) { 1243 if (ah->enabled_cals & TX_CL_CAL) {
1245 if (caldata && test_bit(TXCLCAL_DONE, &caldata->cal_flags)) 1244 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
1246 REG_CLR_BIT(ah, AR_PHY_CL_CAL_CTL, 1245 run_agc_cal = true;
1247 AR_PHY_CL_CAL_ENABLE);
1248 else {
1249 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL,
1250 AR_PHY_CL_CAL_ENABLE);
1251 run_agc_cal = true;
1252 }
1253 } 1246 }
1254 1247
1255 if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) 1248 if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))
@@ -1285,15 +1278,6 @@ skip_tx_iqcal:
1285 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN); 1278 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
1286 } 1279 }
1287 1280
1288 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
1289 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY);
1290 /* Disable BB_active */
1291 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
1292 udelay(5);
1293 REG_WRITE(ah, AR_PHY_RX_DELAY, AR_PHY_RX_DELAY_DELAY);
1294 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
1295 }
1296
1297 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) { 1281 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
1298 /* Calibrate the AGC */ 1282 /* Calibrate the AGC */
1299 REG_WRITE(ah, AR_PHY_AGC_CONTROL, 1283 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
@@ -1306,11 +1290,6 @@ skip_tx_iqcal:
1306 0, AH_WAIT_TIMEOUT); 1290 0, AH_WAIT_TIMEOUT);
1307 } 1291 }
1308 1292
1309 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
1310 REG_WRITE(ah, AR_PHY_RX_DELAY, rx_delay);
1311 udelay(5);
1312 }
1313
1314 if (!status) { 1293 if (!status) {
1315 ath_dbg(common, CALIBRATE, 1294 ath_dbg(common, CALIBRATE,
1316 "offset calibration failed to complete in %d ms; noisy environment?\n", 1295 "offset calibration failed to complete in %d ms; noisy environment?\n",
@@ -1323,8 +1302,6 @@ skip_tx_iqcal:
1323 else if (caldata && test_bit(TXIQCAL_DONE, &caldata->cal_flags)) 1302 else if (caldata && test_bit(TXIQCAL_DONE, &caldata->cal_flags))
1324 ar9003_hw_tx_iq_cal_reload(ah); 1303 ar9003_hw_tx_iq_cal_reload(ah);
1325 1304
1326 ar9003_hw_cl_cal_post_proc(ah, is_reusable);
1327
1328 /* Revert chainmask to runtime parameters */ 1305 /* Revert chainmask to runtime parameters */
1329 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); 1306 ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
1330 1307
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index d39b79f5e841..39b71b3d6919 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -641,11 +641,12 @@ static void ar9003_hw_override_ini(struct ath_hw *ah)
641 else 641 else
642 ah->enabled_cals &= ~TX_IQ_CAL; 642 ah->enabled_cals &= ~TX_IQ_CAL;
643 643
644 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
645 ah->enabled_cals |= TX_CL_CAL;
646 else
647 ah->enabled_cals &= ~TX_CL_CAL;
648 } 644 }
645
646 if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
647 ah->enabled_cals |= TX_CL_CAL;
648 else
649 ah->enabled_cals &= ~TX_CL_CAL;
649} 650}
650 651
651static void ar9003_hw_prog_ini(struct ath_hw *ah, 652static void ar9003_hw_prog_ini(struct ath_hw *ah,