drm/i915/chv: Add basic PM interrupt support for CHV

Enabled PM interrupt programming for CHV. Re-using gen8 code and extending same for CHV.

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 5 insertions, 1 deletions

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 30fd63708b1a..188fe04c4f8d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1407,7 +1407,7 @@ static void gen6_pm_rps_work(struct work_struct *work)
         spin_lock_irq(&dev_priv->irq_lock);
         pm_iir = dev_priv->rps.pm_iir;
         dev_priv->rps.pm_iir = 0;
-        if (IS_BROADWELL(dev_priv->dev))
+        if (IS_BROADWELL(dev_priv->dev) || IS_CHERRYVIEW(dev_priv->dev))
                 bdw_enable_pm_irq(dev_priv, dev_priv->pm_rps_events);
         else {
                 /* Make sure not to corrupt PMIMR state used by ringbuffer */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1ec777a3914a..58a03f863379 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3392,6 +3392,8 @@ static void cherryview_disable_rps(struct drm_device *dev)
         struct drm_i915_private *dev_priv = dev->dev_private;
 
         I915_WRITE(GEN6_RC_CONTROL, 0);
+
+        gen8_disable_rps_interrupts(dev);
 }
 
 static void valleyview_disable_rps(struct drm_device *dev)
@@ -4109,6 +4111,8 @@ static void cherryview_enable_rps(struct drm_device *dev)
 
         valleyview_set_rps(dev_priv->dev, dev_priv->rps.efficient_freq);
 
+        gen8_enable_rps_interrupts(dev);
+
         gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
 }