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authorShawn Guo <shawn.guo@freescale.com>2011-01-19 16:50:39 -0500
committerSascha Hauer <s.hauer@pengutronix.de>2011-01-31 06:42:23 -0500
commit341b9419a8c0a4cdb75773c576870f1eb655516d (patch)
treecfa8912c361d8cf24a67a8bc560523537769695f
parent1e9cebb42de57f1243261939c77ab5b0f9bcf311 (diff)
dmaengine: imx-sdma: fix up param for the last BD in sdma_prep_slave_sg()
As per the reference manual, bit "L" should be set while bit "C" should be cleared for the last buffer descriptor in the non-cyclic chain, so that sdma can stop trying to find the next BD and end the transfer. In case of sdma_prep_slave_sg(), BD_LAST needs to be set and BD_CONT be cleared for the last BD. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--drivers/dma/imx-sdma.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index cf93d1737f1e..4535f98b3553 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -931,8 +931,11 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
931 931
932 param = BD_DONE | BD_EXTD | BD_CONT; 932 param = BD_DONE | BD_EXTD | BD_CONT;
933 933
934 if (i + 1 == sg_len) 934 if (i + 1 == sg_len) {
935 param |= BD_INTR; 935 param |= BD_INTR;
936 param |= BD_LAST;
937 param &= ~BD_CONT;
938 }
936 939
937 dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%08x %s%s\n", 940 dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%08x %s%s\n",
938 i, count, sg->dma_address, 941 i, count, sg->dma_address,