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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-08-02 10:24:01 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-21 06:20:01 -0400
commit333e9fe94d00ce8c334d91099449b9948bf76b92 (patch)
treec60f9ec1ba5efc88bae754315b1c8ecc2c262b13
parentb8aea0c8003927f13e257c7ff370b6b73dbe2a5a (diff)
drm/i915: add relative ring register macros
Documentation explicitly mentions that the ring registers are designed to have the same offsets relative to a base registers. Use this to fight the code beaurocratic in intel_ringbuffer.c. No code changes in this patch, just the new definitions. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h8
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c3
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h1
3 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8b8ac60cc839..77c9191f3fd6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -288,6 +288,14 @@
288#define PRB0_HEAD 0x02034 288#define PRB0_HEAD 0x02034
289#define PRB0_START 0x02038 289#define PRB0_START 0x02038
290#define PRB0_CTL 0x0203c 290#define PRB0_CTL 0x0203c
291#define RENDER_RING_BASE 0x02000
292#define BSD_RING_BASE 0x04000
293#define GEN6_BSD_RING_BASE 0x12000
294#define RING_TAIL(base) (base)+0x30
295#define RING_HEAD(base) (base)+0x34
296#define RING_START(base) (base)+0x38
297#define RING_CTL(base) (base)+0x3c
298#define RING_HWS_PGA(base) (base)+0x80
291#define TAIL_ADDR 0x001FFFF8 299#define TAIL_ADDR 0x001FFFF8
292#define HEAD_WRAP_COUNT 0xFFE00000 300#define HEAD_WRAP_COUNT 0xFFE00000
293#define HEAD_WRAP_ONE 0x00200000 301#define HEAD_WRAP_ONE 0x00200000
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f0b44d3ba958..c1517b2d2f08 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -801,6 +801,7 @@ static const struct intel_ring_buffer render_ring = {
801 .tail = PRB0_TAIL, 801 .tail = PRB0_TAIL,
802 .start = PRB0_START 802 .start = PRB0_START
803 }, 803 },
804 .mmio_base = RENDER_RING_BASE,
804 .size = 32 * PAGE_SIZE, 805 .size = 32 * PAGE_SIZE,
805 .alignment = PAGE_SIZE, 806 .alignment = PAGE_SIZE,
806 .virtual_start = NULL, 807 .virtual_start = NULL,
@@ -839,6 +840,7 @@ static const struct intel_ring_buffer bsd_ring = {
839 .tail = BSD_RING_TAIL, 840 .tail = BSD_RING_TAIL,
840 .start = BSD_RING_START 841 .start = BSD_RING_START
841 }, 842 },
843 .mmio_base = BSD_RING_BASE,
842 .size = 32 * PAGE_SIZE, 844 .size = 32 * PAGE_SIZE,
843 .alignment = PAGE_SIZE, 845 .alignment = PAGE_SIZE,
844 .virtual_start = NULL, 846 .virtual_start = NULL,
@@ -957,6 +959,7 @@ static const struct intel_ring_buffer gen6_bsd_ring = {
957 .tail = GEN6_BSD_RING_TAIL, 959 .tail = GEN6_BSD_RING_TAIL,
958 .start = GEN6_BSD_RING_START 960 .start = GEN6_BSD_RING_START
959 }, 961 },
962 .mmio_base = GEN6_BSD_RING_BASE,
960 .size = 32 * PAGE_SIZE, 963 .size = 32 * PAGE_SIZE,
961 .alignment = PAGE_SIZE, 964 .alignment = PAGE_SIZE,
962 .virtual_start = NULL, 965 .virtual_start = NULL,
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index be1fd9b37088..3917d8b1c1a9 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -20,6 +20,7 @@ struct intel_ring_buffer {
20 u32 tail; 20 u32 tail;
21 u32 start; 21 u32 start;
22 } regs; 22 } regs;
23 u32 mmio_base;
23 unsigned long size; 24 unsigned long size;
24 unsigned int alignment; 25 unsigned int alignment;
25 void *virtual_start; 26 void *virtual_start;