Merge tag 'renesas-dt-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

From Simon Horman:
Renesas ARM-based SoC DT updates for v3.13

* Add CPU cores to DTSI of r8a7790 SoC
* Add MMCIF and SDHI DT nodes for reference DTS of ape6evm board

* tag 'renesas-dt-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: Add r8a7790 CA7 CPU cores to DTSI
  ARM: shmobile: Add r8a7790 CA15 CPU cores
  ARM: shmobile: ape6evm-reference: add MMCIF and SDHI DT nodes

Signed-off-by: Olof Johansson <olof@lixom.net>

2 files changed, 121 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
index f444624eb097..2b49b05ae2f4 100644
--- a/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
+++ b/arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts
@@ -10,6 +10,7 @@
 
 /dts-v1/;
 /include/ "r8a73a4.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
         model = "APE6EVM";
@@ -24,6 +25,34 @@
                 reg = <0 0x40000000 0 0x40000000>;
         };
 
+        vcc_mmc0: regulator@0 {
+                compatible = "regulator-fixed";
+                regulator-name = "MMC0 Vcc";
+                regulator-min-microvolt = <2800000>;
+                regulator-max-microvolt = <2800000>;
+                regulator-always-on;
+        };
+
+        vcc_sdhi0: regulator@1 {
+                compatible = "regulator-fixed";
+
+                regulator-name = "SDHI0 Vcc";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+
+                gpio = <&pfc 76 GPIO_ACTIVE_HIGH>;
+                enable-active-high;
+        };
+
+        /* Common 3.3V rail, used by several devices on APE6EVM */
+        ape6evm_fixed_3v3: regulator@2 {
+                compatible = "regulator-fixed";
+                regulator-name = "3V3";
+                regulator-min-microvolt = <3300000>;
+                regulator-max-microvolt = <3300000>;
+                regulator-always-on;
+        };
+
         lbsc {
                 compatible = "simple-bus";
                 #address-cells = <1>;
@@ -62,4 +91,47 @@
                 renesas,groups = "scifa0_data";
                 renesas,function = "scifa0";
         };
+
+        mmc0_pins: mmcif {
+                renesas,groups = "mmc0_data8", "mmc0_ctrl";
+                renesas,function = "mmc0";
+        };
+
+        sdhi0_pins: sdhi0 {
+                renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";
+                renesas,function = "sdhi0";
+        };
+
+        sdhi1_pins: sdhi1 {
+                renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
+                renesas,function = "sdhi1";
+        };
+};
+
+&mmcif0 {
+        vmmc-supply = <&vcc_mmc0>;
+        bus-width = <8>;
+        non-removable;
+        pinctrl-names = "default";
+        pinctrl-0 = <&mmc0_pins>;
+        status = "okay";
+};
+
+&sdhi0 {
+        vmmc-supply = <&vcc_sdhi0>;
+        bus-width = <4>;
+        toshiba,mmc-wrprotect-disable;
+        pinctrl-names = "default";
+        pinctrl-0 = <&sdhi0_pins>;
+        status = "okay";
+};
+
+&sdhi1 {
+        vmmc-supply = <&ape6evm_fixed_3v3>;
+        bus-width = <4>;
+        broken-cd;
+        toshiba,mmc-wrprotect-disable;
+        pinctrl-names = "default";
+        pinctrl-0 = <&sdhi1_pins>;
+        status = "okay";
 };
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 3b879e7c697c..a0cfb6618884 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -24,6 +24,55 @@
                         reg = <0>;
                         clock-frequency = <1300000000>;
                 };
+
+                cpu1: cpu@1 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <1>;
+                        clock-frequency = <1300000000>;
+                };
+
+                cpu2: cpu@2 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <2>;
+                        clock-frequency = <1300000000>;
+                };
+
+                cpu3: cpu@3 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a15";
+                        reg = <3>;
+                        clock-frequency = <1300000000>;
+                };
+
+                cpu4: cpu@4 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x100>;
+                        clock-frequency = <780000000>;
+                };
+
+                cpu5: cpu@5 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x101>;
+                        clock-frequency = <780000000>;
+                };
+
+                cpu6: cpu@6 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x102>;
+                        clock-frequency = <780000000>;
+                };
+
+                cpu7: cpu@7 {
+                        device_type = "cpu";
+                        compatible = "arm,cortex-a7";
+                        reg = <0x103>;
+                        clock-frequency = <780000000>;
+                };
         };
 
         gic: interrupt-controller@f1001000 {