diff options
author | Paul Walmsley <paul@pwsan.com> | 2013-01-26 02:58:13 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2013-01-29 16:59:56 -0500 |
commit | 32d174ed1bd793e9be578914cce6b1e45c36843e (patch) | |
tree | 8e86bbdbd365e0aa57fbeea3de3cdc29852baf79 | |
parent | 1cd96478cf1505a32861ffed8d8f1189d1b1b8ab (diff) |
ARM: OMAP4: MPUSS PM: remove unnecessary shim functions for powerdomain control
The OMAP4 MPU subsystem power management code contains several unnecessary
shim functions for powerdomain control; remove them.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-rw-r--r-- | arch/arm/mach-omap2/omap-mpuss-lowpower.c | 44 |
1 files changed, 7 insertions, 37 deletions
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c index aac46bfdbeb2..8bcb64bcdcdb 100644 --- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c +++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c | |||
@@ -87,37 +87,6 @@ static inline void set_cpu_wakeup_addr(unsigned int cpu_id, u32 addr) | |||
87 | } | 87 | } |
88 | 88 | ||
89 | /* | 89 | /* |
90 | * Set the CPUx powerdomain's previous power state | ||
91 | */ | ||
92 | static inline void set_cpu_next_pwrst(unsigned int cpu_id, | ||
93 | unsigned int power_state) | ||
94 | { | ||
95 | struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id); | ||
96 | |||
97 | pwrdm_set_next_pwrst(pm_info->pwrdm, power_state); | ||
98 | } | ||
99 | |||
100 | /* | ||
101 | * Read CPU's previous power state | ||
102 | */ | ||
103 | static inline unsigned int read_cpu_prev_pwrst(unsigned int cpu_id) | ||
104 | { | ||
105 | struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id); | ||
106 | |||
107 | return pwrdm_read_prev_pwrst(pm_info->pwrdm); | ||
108 | } | ||
109 | |||
110 | /* | ||
111 | * Clear the CPUx powerdomain's previous power state | ||
112 | */ | ||
113 | static inline void clear_cpu_prev_pwrst(unsigned int cpu_id) | ||
114 | { | ||
115 | struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu_id); | ||
116 | |||
117 | pwrdm_clear_all_prev_pwrst(pm_info->pwrdm); | ||
118 | } | ||
119 | |||
120 | /* | ||
121 | * Store the SCU power status value to scratchpad memory | 90 | * Store the SCU power status value to scratchpad memory |
122 | */ | 91 | */ |
123 | static void scu_pwrst_prepare(unsigned int cpu_id, unsigned int cpu_state) | 92 | static void scu_pwrst_prepare(unsigned int cpu_id, unsigned int cpu_state) |
@@ -230,6 +199,7 @@ static void save_l2x0_context(void) | |||
230 | */ | 199 | */ |
231 | int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) | 200 | int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) |
232 | { | 201 | { |
202 | struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu); | ||
233 | unsigned int save_state = 0; | 203 | unsigned int save_state = 0; |
234 | unsigned int wakeup_cpu; | 204 | unsigned int wakeup_cpu; |
235 | 205 | ||
@@ -268,7 +238,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) | |||
268 | save_state = 2; | 238 | save_state = 2; |
269 | 239 | ||
270 | cpu_clear_prev_logic_pwrst(cpu); | 240 | cpu_clear_prev_logic_pwrst(cpu); |
271 | set_cpu_next_pwrst(cpu, power_state); | 241 | pwrdm_set_next_pwrst(pm_info->pwrdm, power_state); |
272 | set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume)); | 242 | set_cpu_wakeup_addr(cpu, virt_to_phys(omap4_cpu_resume)); |
273 | scu_pwrst_prepare(cpu, power_state); | 243 | scu_pwrst_prepare(cpu, power_state); |
274 | l2x0_pwrst_prepare(cpu, save_state); | 244 | l2x0_pwrst_prepare(cpu, save_state); |
@@ -286,7 +256,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) | |||
286 | * domain transition | 256 | * domain transition |
287 | */ | 257 | */ |
288 | wakeup_cpu = smp_processor_id(); | 258 | wakeup_cpu = smp_processor_id(); |
289 | set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON); | 259 | pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON); |
290 | 260 | ||
291 | pwrdm_post_transition(NULL); | 261 | pwrdm_post_transition(NULL); |
292 | 262 | ||
@@ -300,8 +270,8 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state) | |||
300 | */ | 270 | */ |
301 | int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) | 271 | int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) |
302 | { | 272 | { |
303 | unsigned int cpu_state = 0; | ||
304 | struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu); | 273 | struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu); |
274 | unsigned int cpu_state = 0; | ||
305 | 275 | ||
306 | if (omap_rev() == OMAP4430_REV_ES1_0) | 276 | if (omap_rev() == OMAP4430_REV_ES1_0) |
307 | return -ENXIO; | 277 | return -ENXIO; |
@@ -309,8 +279,8 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) | |||
309 | if (power_state == PWRDM_POWER_OFF) | 279 | if (power_state == PWRDM_POWER_OFF) |
310 | cpu_state = 1; | 280 | cpu_state = 1; |
311 | 281 | ||
312 | clear_cpu_prev_pwrst(cpu); | 282 | pwrdm_clear_all_prev_pwrst(pm_info->pwrdm); |
313 | set_cpu_next_pwrst(cpu, power_state); | 283 | pwrdm_set_next_pwrst(pm_info->pwrdm, power_state); |
314 | set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info->secondary_startup)); | 284 | set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info->secondary_startup)); |
315 | scu_pwrst_prepare(cpu, power_state); | 285 | scu_pwrst_prepare(cpu, power_state); |
316 | 286 | ||
@@ -321,7 +291,7 @@ int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) | |||
321 | */ | 291 | */ |
322 | omap4_finish_suspend(cpu_state); | 292 | omap4_finish_suspend(cpu_state); |
323 | 293 | ||
324 | set_cpu_next_pwrst(cpu, PWRDM_POWER_ON); | 294 | pwrdm_set_next_pwrst(pm_info->pwrdm, PWRDM_POWER_ON); |
325 | return 0; | 295 | return 0; |
326 | } | 296 | } |
327 | 297 | ||