diff options
author | Suman Anna <s-anna@ti.com> | 2013-09-17 15:31:03 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2013-10-09 03:08:19 -0400 |
commit | 325529d1ec7538b792c2adc2e243382f9f85dfff (patch) | |
tree | 1919db1a56b4db35e0178aadfd9b7da855680243 | |
parent | e01478b01da8f2ec190ea730cfc4536b183a55c8 (diff) |
ARM: OMAP5: hwmod data: Add spinlock data
Add the hwmod data for the spinlock IP in OMAP5 SoC.
This is needed to be able to enable the OMAP spinlock
support for OMAP5.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index b1725478d767..b3ed4d40045a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c | |||
@@ -1146,6 +1146,41 @@ static struct omap_hwmod omap54xx_mpu_hwmod = { | |||
1146 | }; | 1146 | }; |
1147 | 1147 | ||
1148 | /* | 1148 | /* |
1149 | * 'spinlock' class | ||
1150 | * spinlock provides hardware assistance for synchronizing the processes | ||
1151 | * running on multiple processors | ||
1152 | */ | ||
1153 | |||
1154 | static struct omap_hwmod_class_sysconfig omap54xx_spinlock_sysc = { | ||
1155 | .rev_offs = 0x0000, | ||
1156 | .sysc_offs = 0x0010, | ||
1157 | .syss_offs = 0x0014, | ||
1158 | .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | | ||
1159 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | | ||
1160 | SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), | ||
1161 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
1162 | .sysc_fields = &omap_hwmod_sysc_type1, | ||
1163 | }; | ||
1164 | |||
1165 | static struct omap_hwmod_class omap54xx_spinlock_hwmod_class = { | ||
1166 | .name = "spinlock", | ||
1167 | .sysc = &omap54xx_spinlock_sysc, | ||
1168 | }; | ||
1169 | |||
1170 | /* spinlock */ | ||
1171 | static struct omap_hwmod omap54xx_spinlock_hwmod = { | ||
1172 | .name = "spinlock", | ||
1173 | .class = &omap54xx_spinlock_hwmod_class, | ||
1174 | .clkdm_name = "l4cfg_clkdm", | ||
1175 | .prcm = { | ||
1176 | .omap4 = { | ||
1177 | .clkctrl_offs = OMAP54XX_CM_L4CFG_SPINLOCK_CLKCTRL_OFFSET, | ||
1178 | .context_offs = OMAP54XX_RM_L4CFG_SPINLOCK_CONTEXT_OFFSET, | ||
1179 | }, | ||
1180 | }, | ||
1181 | }; | ||
1182 | |||
1183 | /* | ||
1149 | * 'timer' class | 1184 | * 'timer' class |
1150 | * general purpose timer module with accurate 1ms tick | 1185 | * general purpose timer module with accurate 1ms tick |
1151 | * This class contains several variants: ['timer_1ms', 'timer'] | 1186 | * This class contains several variants: ['timer_1ms', 'timer'] |
@@ -2077,6 +2112,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__mpu = { | |||
2077 | .user = OCP_USER_MPU | OCP_USER_SDMA, | 2112 | .user = OCP_USER_MPU | OCP_USER_SDMA, |
2078 | }; | 2113 | }; |
2079 | 2114 | ||
2115 | /* l4_cfg -> spinlock */ | ||
2116 | static struct omap_hwmod_ocp_if omap54xx_l4_cfg__spinlock = { | ||
2117 | .master = &omap54xx_l4_cfg_hwmod, | ||
2118 | .slave = &omap54xx_spinlock_hwmod, | ||
2119 | .clk = "l4_root_clk_div", | ||
2120 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
2121 | }; | ||
2122 | |||
2080 | /* l4_wkup -> timer1 */ | 2123 | /* l4_wkup -> timer1 */ |
2081 | static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = { | 2124 | static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = { |
2082 | .master = &omap54xx_l4_wkup_hwmod, | 2125 | .master = &omap54xx_l4_wkup_hwmod, |
@@ -2296,6 +2339,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { | |||
2296 | &omap54xx_l4_per__mmc4, | 2339 | &omap54xx_l4_per__mmc4, |
2297 | &omap54xx_l4_per__mmc5, | 2340 | &omap54xx_l4_per__mmc5, |
2298 | &omap54xx_l4_cfg__mpu, | 2341 | &omap54xx_l4_cfg__mpu, |
2342 | &omap54xx_l4_cfg__spinlock, | ||
2299 | &omap54xx_l4_wkup__timer1, | 2343 | &omap54xx_l4_wkup__timer1, |
2300 | &omap54xx_l4_per__timer2, | 2344 | &omap54xx_l4_per__timer2, |
2301 | &omap54xx_l4_per__timer3, | 2345 | &omap54xx_l4_per__timer3, |