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authorDamien Lespiau <damien.lespiau@intel.com>2015-02-05 14:24:25 -0500
committerJani Nikula <jani.nikula@intel.com>2015-03-26 07:38:10 -0400
commit3164a803416832d61268b758112e8dfd7e35cdf7 (patch)
tree81f6672ab0cd14d4c77eb8de621882548808ecb0
parent832a3aad1e2927b1684e7369c9f36a370e0b95da (diff)
drm/i915: Fix atomic state when reusing the firmware fb
Right now, we get a warning when taking over the firmware fb: [drm:drm_atomic_plane_check] FB set but no CRTC with the following backtrace: [<ffffffffa010339d>] drm_atomic_check_only+0x35d/0x510 [drm] [<ffffffffa0103567>] drm_atomic_commit+0x17/0x60 [drm] [<ffffffffa00a6ccd>] drm_atomic_helper_plane_set_property+0x8d/0xd0 [drm_kms_helper] [<ffffffffa00f1fed>] drm_mode_plane_set_obj_prop+0x2d/0x90 [drm] [<ffffffffa00a8a1b>] restore_fbdev_mode+0x6b/0xf0 [drm_kms_helper] [<ffffffffa00aa969>] drm_fb_helper_restore_fbdev_mode_unlocked+0x29/0x80 [drm_kms_helper] [<ffffffffa00aa9e2>] drm_fb_helper_set_par+0x22/0x50 [drm_kms_helper] [<ffffffffa050a71a>] intel_fbdev_set_par+0x1a/0x60 [i915] [<ffffffff813ad444>] fbcon_init+0x4f4/0x580 That's because we update the plane state with the fb from the firmware, but we never associate the plane to that CRTC. We don't quite have the full DRM take over from HW state just yet, so fake enough of the plane atomic state to pass the checks. v2: Fix the state on which we set the CRTC in the case we're sharing the initial fb with another pipe. (Matt) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> [Jani: backported to drm-intel-fixes for v4.0-rc] Reference: http://mid.gmane.org/CA+5PVA7yXH=U757w8V=Zj2U1URG4nYNav20NpjtQ4svVueyPNw@mail.gmail.com Reference: http://lkml.kernel.org/r/CA+55aFweWR=nDzc2Y=rCtL_H8JfdprQiCimN5dwc+TgyD4Bjsg@mail.gmail.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1c12262029fb..30faf6c262e5 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2439,7 +2439,11 @@ intel_find_plane_obj(struct intel_crtc *intel_crtc,
2439 return; 2439 return;
2440 2440
2441 if (intel_alloc_plane_obj(intel_crtc, plane_config)) { 2441 if (intel_alloc_plane_obj(intel_crtc, plane_config)) {
2442 update_state_fb(intel_crtc->base.primary); 2442 struct drm_plane *primary = intel_crtc->base.primary;
2443
2444 primary->state->crtc = &intel_crtc->base;
2445 update_state_fb(primary);
2446
2443 return; 2447 return;
2444 } 2448 }
2445 2449
@@ -2464,11 +2468,14 @@ intel_find_plane_obj(struct intel_crtc *intel_crtc,
2464 continue; 2468 continue;
2465 2469
2466 if (i915_gem_obj_ggtt_offset(obj) == plane_config->base) { 2470 if (i915_gem_obj_ggtt_offset(obj) == plane_config->base) {
2471 struct drm_plane *primary = intel_crtc->base.primary;
2472
2467 if (obj->tiling_mode != I915_TILING_NONE) 2473 if (obj->tiling_mode != I915_TILING_NONE)
2468 dev_priv->preserve_bios_swizzle = true; 2474 dev_priv->preserve_bios_swizzle = true;
2469 2475
2470 drm_framebuffer_reference(c->primary->fb); 2476 drm_framebuffer_reference(c->primary->fb);
2471 intel_crtc->base.primary->fb = c->primary->fb; 2477 primary->fb = c->primary->fb;
2478 primary->state->crtc = &intel_crtc->base;
2472 obj->frontbuffer_bits |= INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe); 2479 obj->frontbuffer_bits |= INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
2473 break; 2480 break;
2474 } 2481 }