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authorJames Hogan <james.hogan@imgtec.com>2014-02-28 18:28:54 -0500
committerMauro Carvalho Chehab <m.chehab@samsung.com>2014-03-11 14:23:58 -0400
commit30dd9e0c8dc3478b63d7865df5434fcf01a07f3f (patch)
tree869dda0dd0f462879231f29da2ed0c9d9d2721a3
parent3fed7dbe8b94ab45298d9e63b90c1c57a01b6d5b (diff)
[media] rc: img-ir: add hardware decoder driver
Add remote control input driver for the ImgTec Infrared block hardware decoder, which is set up with timings for a specific protocol and supports mask/value filtering and wake events. The hardware decoder timing values, raw data to scan code conversion function and scan code filter to raw data filter conversion function will be provided in separate files for each protocol which this part of the driver can use. The new generic scan code filter interface is made use of to reduce interrupts and control wake events. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat
-rw-r--r--drivers/media/rc/img-ir/img-ir-hw.c1032
-rw-r--r--drivers/media/rc/img-ir/img-ir-hw.h269
2 files changed, 1301 insertions, 0 deletions
diff --git a/drivers/media/rc/img-ir/img-ir-hw.c b/drivers/media/rc/img-ir/img-ir-hw.c
new file mode 100644
index 000000000000..21c8bbca8821
--- /dev/null
+++ b/drivers/media/rc/img-ir/img-ir-hw.c
@@ -0,0 +1,1032 @@
1/*
2 * ImgTec IR Hardware Decoder found in PowerDown Controller.
3 *
4 * Copyright 2010-2014 Imagination Technologies Ltd.
5 *
6 * This ties into the input subsystem using the RC-core. Protocol support is
7 * provided in separate modules which provide the parameters and scancode
8 * translation functions to set up the hardware decoder and interpret the
9 * resulting input.
10 */
11
12#include <linux/bitops.h>
13#include <linux/clk.h>
14#include <linux/interrupt.h>
15#include <linux/spinlock.h>
16#include <linux/timer.h>
17#include <media/rc-core.h>
18#include "img-ir.h"
19
20/* Decoders lock (only modified to preprocess them) */
21static DEFINE_SPINLOCK(img_ir_decoders_lock);
22
23static bool img_ir_decoders_preprocessed;
24static struct img_ir_decoder *img_ir_decoders[] = {
25 NULL
26};
27
28#define IMG_IR_F_FILTER BIT(RC_FILTER_NORMAL) /* enable filtering */
29#define IMG_IR_F_WAKE BIT(RC_FILTER_WAKEUP) /* enable waking */
30
31/* code type quirks */
32
33#define IMG_IR_QUIRK_CODE_BROKEN 0x1 /* Decode is broken */
34#define IMG_IR_QUIRK_CODE_LEN_INCR 0x2 /* Bit length needs increment */
35
36/* functions for preprocessing timings, ensuring max is set */
37
38static void img_ir_timing_preprocess(struct img_ir_timing_range *range,
39 unsigned int unit)
40{
41 if (range->max < range->min)
42 range->max = range->min;
43 if (unit) {
44 /* multiply by unit and convert to microseconds */
45 range->min = (range->min*unit)/1000;
46 range->max = (range->max*unit + 999)/1000; /* round up */
47 }
48}
49
50static void img_ir_symbol_timing_preprocess(struct img_ir_symbol_timing *timing,
51 unsigned int unit)
52{
53 img_ir_timing_preprocess(&timing->pulse, unit);
54 img_ir_timing_preprocess(&timing->space, unit);
55}
56
57static void img_ir_timings_preprocess(struct img_ir_timings *timings,
58 unsigned int unit)
59{
60 img_ir_symbol_timing_preprocess(&timings->ldr, unit);
61 img_ir_symbol_timing_preprocess(&timings->s00, unit);
62 img_ir_symbol_timing_preprocess(&timings->s01, unit);
63 img_ir_symbol_timing_preprocess(&timings->s10, unit);
64 img_ir_symbol_timing_preprocess(&timings->s11, unit);
65 /* default s10 and s11 to s00 and s01 if no leader */
66 if (unit)
67 /* multiply by unit and convert to microseconds (round up) */
68 timings->ft.ft_min = (timings->ft.ft_min*unit + 999)/1000;
69}
70
71/* functions for filling empty fields with defaults */
72
73static void img_ir_timing_defaults(struct img_ir_timing_range *range,
74 struct img_ir_timing_range *defaults)
75{
76 if (!range->min)
77 range->min = defaults->min;
78 if (!range->max)
79 range->max = defaults->max;
80}
81
82static void img_ir_symbol_timing_defaults(struct img_ir_symbol_timing *timing,
83 struct img_ir_symbol_timing *defaults)
84{
85 img_ir_timing_defaults(&timing->pulse, &defaults->pulse);
86 img_ir_timing_defaults(&timing->space, &defaults->space);
87}
88
89static void img_ir_timings_defaults(struct img_ir_timings *timings,
90 struct img_ir_timings *defaults)
91{
92 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr);
93 img_ir_symbol_timing_defaults(&timings->s00, &defaults->s00);
94 img_ir_symbol_timing_defaults(&timings->s01, &defaults->s01);
95 img_ir_symbol_timing_defaults(&timings->s10, &defaults->s10);
96 img_ir_symbol_timing_defaults(&timings->s11, &defaults->s11);
97 if (!timings->ft.ft_min)
98 timings->ft.ft_min = defaults->ft.ft_min;
99}
100
101/* functions for converting timings to register values */
102
103/**
104 * img_ir_control() - Convert control struct to control register value.
105 * @control: Control data
106 *
107 * Returns: The control register value equivalent of @control.
108 */
109static u32 img_ir_control(const struct img_ir_control *control)
110{
111 u32 ctrl = control->code_type << IMG_IR_CODETYPE_SHIFT;
112 if (control->decoden)
113 ctrl |= IMG_IR_DECODEN;
114 if (control->hdrtog)
115 ctrl |= IMG_IR_HDRTOG;
116 if (control->ldrdec)
117 ctrl |= IMG_IR_LDRDEC;
118 if (control->decodinpol)
119 ctrl |= IMG_IR_DECODINPOL;
120 if (control->bitorien)
121 ctrl |= IMG_IR_BITORIEN;
122 if (control->d1validsel)
123 ctrl |= IMG_IR_D1VALIDSEL;
124 if (control->bitinv)
125 ctrl |= IMG_IR_BITINV;
126 if (control->decodend2)
127 ctrl |= IMG_IR_DECODEND2;
128 if (control->bitoriend2)
129 ctrl |= IMG_IR_BITORIEND2;
130 if (control->bitinvd2)
131 ctrl |= IMG_IR_BITINVD2;
132 return ctrl;
133}
134
135/**
136 * img_ir_timing_range_convert() - Convert microsecond range.
137 * @out: Output timing range in clock cycles with a shift.
138 * @in: Input timing range in microseconds.
139 * @tolerance: Tolerance as a fraction of 128 (roughly percent).
140 * @clock_hz: IR clock rate in Hz.
141 * @shift: Shift of output units.
142 *
143 * Converts min and max from microseconds to IR clock cycles, applies a
144 * tolerance, and shifts for the register, rounding in the right direction.
145 * Note that in and out can safely be the same object.
146 */
147static void img_ir_timing_range_convert(struct img_ir_timing_range *out,
148 const struct img_ir_timing_range *in,
149 unsigned int tolerance,
150 unsigned long clock_hz,
151 unsigned int shift)
152{
153 unsigned int min = in->min;
154 unsigned int max = in->max;
155 /* add a tolerance */
156 min = min - (min*tolerance >> 7);
157 max = max + (max*tolerance >> 7);
158 /* convert from microseconds into clock cycles */
159 min = min*clock_hz / 1000000;
160 max = (max*clock_hz + 999999) / 1000000; /* round up */
161 /* apply shift and copy to output */
162 out->min = min >> shift;
163 out->max = (max + ((1 << shift) - 1)) >> shift; /* round up */
164}
165
166/**
167 * img_ir_symbol_timing() - Convert symbol timing struct to register value.
168 * @timing: Symbol timing data
169 * @tolerance: Timing tolerance where 0-128 represents 0-100%
170 * @clock_hz: Frequency of source clock in Hz
171 * @pd_shift: Shift to apply to symbol period
172 * @w_shift: Shift to apply to symbol width
173 *
174 * Returns: Symbol timing register value based on arguments.
175 */
176static u32 img_ir_symbol_timing(const struct img_ir_symbol_timing *timing,
177 unsigned int tolerance,
178 unsigned long clock_hz,
179 unsigned int pd_shift,
180 unsigned int w_shift)
181{
182 struct img_ir_timing_range hw_pulse, hw_period;
183 /* we calculate period in hw_period, then convert in place */
184 hw_period.min = timing->pulse.min + timing->space.min;
185 hw_period.max = timing->pulse.max + timing->space.max;
186 img_ir_timing_range_convert(&hw_period, &hw_period,
187 tolerance, clock_hz, pd_shift);
188 img_ir_timing_range_convert(&hw_pulse, &timing->pulse,
189 tolerance, clock_hz, w_shift);
190 /* construct register value */
191 return (hw_period.max << IMG_IR_PD_MAX_SHIFT) |
192 (hw_period.min << IMG_IR_PD_MIN_SHIFT) |
193 (hw_pulse.max << IMG_IR_W_MAX_SHIFT) |
194 (hw_pulse.min << IMG_IR_W_MIN_SHIFT);
195}
196
197/**
198 * img_ir_free_timing() - Convert free time timing struct to register value.
199 * @timing: Free symbol timing data
200 * @clock_hz: Source clock frequency in Hz
201 *
202 * Returns: Free symbol timing register value.
203 */
204static u32 img_ir_free_timing(const struct img_ir_free_timing *timing,
205 unsigned long clock_hz)
206{
207 unsigned int minlen, maxlen, ft_min;
208 /* minlen is only 5 bits, and round minlen to multiple of 2 */
209 if (timing->minlen < 30)
210 minlen = timing->minlen & -2;
211 else
212 minlen = 30;
213 /* maxlen has maximum value of 48, and round maxlen to multiple of 2 */
214 if (timing->maxlen < 48)
215 maxlen = (timing->maxlen + 1) & -2;
216 else
217 maxlen = 48;
218 /* convert and shift ft_min, rounding upwards */
219 ft_min = (timing->ft_min*clock_hz + 999999) / 1000000;
220 ft_min = (ft_min + 7) >> 3;
221 /* construct register value */
222 return (timing->maxlen << IMG_IR_MAXLEN_SHIFT) |
223 (timing->minlen << IMG_IR_MINLEN_SHIFT) |
224 (ft_min << IMG_IR_FT_MIN_SHIFT);
225}
226
227/**
228 * img_ir_free_timing_dynamic() - Update free time register value.
229 * @st_ft: Static free time register value from img_ir_free_timing.
230 * @filter: Current filter which may additionally restrict min/max len.
231 *
232 * Returns: Updated free time register value based on the current filter.
233 */
234static u32 img_ir_free_timing_dynamic(u32 st_ft, struct img_ir_filter *filter)
235{
236 unsigned int minlen, maxlen, newminlen, newmaxlen;
237
238 /* round minlen, maxlen to multiple of 2 */
239 newminlen = filter->minlen & -2;
240 newmaxlen = (filter->maxlen + 1) & -2;
241 /* extract min/max len from register */
242 minlen = (st_ft & IMG_IR_MINLEN) >> IMG_IR_MINLEN_SHIFT;
243 maxlen = (st_ft & IMG_IR_MAXLEN) >> IMG_IR_MAXLEN_SHIFT;
244 /* if the new values are more restrictive, update the register value */
245 if (newminlen > minlen) {
246 st_ft &= ~IMG_IR_MINLEN;
247 st_ft |= newminlen << IMG_IR_MINLEN_SHIFT;
248 }
249 if (newmaxlen < maxlen) {
250 st_ft &= ~IMG_IR_MAXLEN;
251 st_ft |= newmaxlen << IMG_IR_MAXLEN_SHIFT;
252 }
253 return st_ft;
254}
255
256/**
257 * img_ir_timings_convert() - Convert timings to register values
258 * @regs: Output timing register values
259 * @timings: Input timing data
260 * @tolerance: Timing tolerance where 0-128 represents 0-100%
261 * @clock_hz: Source clock frequency in Hz
262 */
263static void img_ir_timings_convert(struct img_ir_timing_regvals *regs,
264 const struct img_ir_timings *timings,
265 unsigned int tolerance,
266 unsigned int clock_hz)
267{
268 /* leader symbol timings are divided by 16 */
269 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz,
270 4, 4);
271 /* other symbol timings, pd fields only are divided by 2 */
272 regs->s00 = img_ir_symbol_timing(&timings->s00, tolerance, clock_hz,
273 1, 0);
274 regs->s01 = img_ir_symbol_timing(&timings->s01, tolerance, clock_hz,
275 1, 0);
276 regs->s10 = img_ir_symbol_timing(&timings->s10, tolerance, clock_hz,
277 1, 0);
278 regs->s11 = img_ir_symbol_timing(&timings->s11, tolerance, clock_hz,
279 1, 0);
280 regs->ft = img_ir_free_timing(&timings->ft, clock_hz);
281}
282
283/**
284 * img_ir_decoder_preprocess() - Preprocess timings in decoder.
285 * @decoder: Decoder to be preprocessed.
286 *
287 * Ensures that the symbol timing ranges are valid with respect to ordering, and
288 * does some fixed conversion on them.
289 */
290static void img_ir_decoder_preprocess(struct img_ir_decoder *decoder)
291{
292 /* default tolerance */
293 if (!decoder->tolerance)
294 decoder->tolerance = 10; /* percent */
295 /* and convert tolerance to fraction out of 128 */
296 decoder->tolerance = decoder->tolerance * 128 / 100;
297
298 /* fill in implicit fields */
299 img_ir_timings_preprocess(&decoder->timings, decoder->unit);
300
301 /* do the same for repeat timings if applicable */
302 if (decoder->repeat) {
303 img_ir_timings_preprocess(&decoder->rtimings, decoder->unit);
304 img_ir_timings_defaults(&decoder->rtimings, &decoder->timings);
305 }
306}
307
308/**
309 * img_ir_decoder_convert() - Generate internal timings in decoder.
310 * @decoder: Decoder to be converted to internal timings.
311 * @timings: Timing register values.
312 * @clock_hz: IR clock rate in Hz.
313 *
314 * Fills out the repeat timings and timing register values for a specific clock
315 * rate.
316 */
317static void img_ir_decoder_convert(const struct img_ir_decoder *decoder,
318 struct img_ir_reg_timings *reg_timings,
319 unsigned int clock_hz)
320{
321 /* calculate control value */
322 reg_timings->ctrl = img_ir_control(&decoder->control);
323
324 /* fill in implicit fields and calculate register values */
325 img_ir_timings_convert(&reg_timings->timings, &decoder->timings,
326 decoder->tolerance, clock_hz);
327
328 /* do the same for repeat timings if applicable */
329 if (decoder->repeat)
330 img_ir_timings_convert(&reg_timings->rtimings,
331 &decoder->rtimings, decoder->tolerance,
332 clock_hz);
333}
334
335/**
336 * img_ir_write_timings() - Write timings to the hardware now
337 * @priv: IR private data
338 * @regs: Timing register values to write
339 * @type: RC filter type (RC_FILTER_*)
340 *
341 * Write timing register values @regs to the hardware, taking into account the
342 * current filter which may impose restrictions on the length of the expected
343 * data.
344 */
345static void img_ir_write_timings(struct img_ir_priv *priv,
346 struct img_ir_timing_regvals *regs,
347 enum rc_filter_type type)
348{
349 struct img_ir_priv_hw *hw = &priv->hw;
350
351 /* filter may be more restrictive to minlen, maxlen */
352 u32 ft = regs->ft;
353 if (hw->flags & BIT(type))
354 ft = img_ir_free_timing_dynamic(regs->ft, &hw->filters[type]);
355 /* write to registers */
356 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr);
357 img_ir_write(priv, IMG_IR_S00_SYMB_TIMING, regs->s00);
358 img_ir_write(priv, IMG_IR_S01_SYMB_TIMING, regs->s01);
359 img_ir_write(priv, IMG_IR_S10_SYMB_TIMING, regs->s10);
360 img_ir_write(priv, IMG_IR_S11_SYMB_TIMING, regs->s11);
361 img_ir_write(priv, IMG_IR_FREE_SYMB_TIMING, ft);
362 dev_dbg(priv->dev, "timings: ldr=%#x, s=[%#x, %#x, %#x, %#x], ft=%#x\n",
363 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft);
364}
365
366static void img_ir_write_filter(struct img_ir_priv *priv,
367 struct img_ir_filter *filter)
368{
369 if (filter) {
370 dev_dbg(priv->dev, "IR filter=%016llx & %016llx\n",
371 (unsigned long long)filter->data,
372 (unsigned long long)filter->mask);
373 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_LW, (u32)filter->data);
374 img_ir_write(priv, IMG_IR_IRQ_MSG_DATA_UP, (u32)(filter->data
375 >> 32));
376 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, (u32)filter->mask);
377 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, (u32)(filter->mask
378 >> 32));
379 } else {
380 dev_dbg(priv->dev, "IR clearing filter\n");
381 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_LW, 0);
382 img_ir_write(priv, IMG_IR_IRQ_MSG_MASK_UP, 0);
383 }
384}
385
386/* caller must have lock */
387static void _img_ir_set_filter(struct img_ir_priv *priv,
388 struct img_ir_filter *filter)
389{
390 struct img_ir_priv_hw *hw = &priv->hw;
391 u32 irq_en, irq_on;
392
393 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
394 if (filter) {
395 /* Only use the match interrupt */
396 hw->filters[RC_FILTER_NORMAL] = *filter;
397 hw->flags |= IMG_IR_F_FILTER;
398 irq_on = IMG_IR_IRQ_DATA_MATCH;
399 irq_en &= ~(IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID);
400 } else {
401 /* Only use the valid interrupt */
402 hw->flags &= ~IMG_IR_F_FILTER;
403 irq_en &= ~IMG_IR_IRQ_DATA_MATCH;
404 irq_on = IMG_IR_IRQ_DATA_VALID | IMG_IR_IRQ_DATA2_VALID;
405 }
406 irq_en |= irq_on;
407
408 img_ir_write_filter(priv, filter);
409 /* clear any interrupts we're enabling so we don't handle old ones */
410 img_ir_write(priv, IMG_IR_IRQ_CLEAR, irq_on);
411 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en);
412}
413
414/* caller must have lock */
415static void _img_ir_set_wake_filter(struct img_ir_priv *priv,
416 struct img_ir_filter *filter)
417{
418 struct img_ir_priv_hw *hw = &priv->hw;
419 if (filter) {
420 /* Enable wake, and copy filter for later */
421 hw->filters[RC_FILTER_WAKEUP] = *filter;
422 hw->flags |= IMG_IR_F_WAKE;
423 } else {
424 /* Disable wake */
425 hw->flags &= ~IMG_IR_F_WAKE;
426 }
427}
428
429/* Callback for setting scancode filter */
430static int img_ir_set_filter(struct rc_dev *dev, enum rc_filter_type type,
431 struct rc_scancode_filter *sc_filter)
432{
433 struct img_ir_priv *priv = dev->priv;
434 struct img_ir_priv_hw *hw = &priv->hw;
435 struct img_ir_filter filter, *filter_ptr = &filter;
436 int ret = 0;
437
438 dev_dbg(priv->dev, "IR scancode %sfilter=%08x & %08x\n",
439 type == RC_FILTER_WAKEUP ? "wake " : "",
440 sc_filter->data,
441 sc_filter->mask);
442
443 spin_lock_irq(&priv->lock);
444
445 /* filtering can always be disabled */
446 if (!sc_filter->mask) {
447 filter_ptr = NULL;
448 goto set_unlock;
449 }
450
451 /* current decoder must support scancode filtering */
452 if (!hw->decoder || !hw->decoder->filter) {
453 ret = -EINVAL;
454 goto unlock;
455 }
456
457 /* convert scancode filter to raw filter */
458 filter.minlen = 0;
459 filter.maxlen = ~0;
460 ret = hw->decoder->filter(sc_filter, &filter, hw->enabled_protocols);
461 if (ret)
462 goto unlock;
463 dev_dbg(priv->dev, "IR raw %sfilter=%016llx & %016llx\n",
464 type == RC_FILTER_WAKEUP ? "wake " : "",
465 (unsigned long long)filter.data,
466 (unsigned long long)filter.mask);
467
468set_unlock:
469 /* apply raw filters */
470 switch (type) {
471 case RC_FILTER_NORMAL:
472 _img_ir_set_filter(priv, filter_ptr);
473 break;
474 case RC_FILTER_WAKEUP:
475 _img_ir_set_wake_filter(priv, filter_ptr);
476 break;
477 default:
478 ret = -EINVAL;
479 };
480
481unlock:
482 spin_unlock_irq(&priv->lock);
483 return ret;
484}
485
486/**
487 * img_ir_set_decoder() - Set the current decoder.
488 * @priv: IR private data.
489 * @decoder: Decoder to use with immediate effect.
490 * @proto: Protocol bitmap (or 0 to use decoder->type).
491 */
492static void img_ir_set_decoder(struct img_ir_priv *priv,
493 const struct img_ir_decoder *decoder,
494 u64 proto)
495{
496 struct img_ir_priv_hw *hw = &priv->hw;
497 struct rc_dev *rdev = hw->rdev;
498 u32 ir_status, irq_en;
499 spin_lock_irq(&priv->lock);
500
501 /* switch off and disable interrupts */
502 img_ir_write(priv, IMG_IR_CONTROL, 0);
503 irq_en = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
504 img_ir_write(priv, IMG_IR_IRQ_ENABLE, irq_en & IMG_IR_IRQ_EDGE);
505 img_ir_write(priv, IMG_IR_IRQ_CLEAR, IMG_IR_IRQ_ALL & ~IMG_IR_IRQ_EDGE);
506
507 /* ack any data already detected */
508 ir_status = img_ir_read(priv, IMG_IR_STATUS);
509 if (ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)) {
510 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
511 img_ir_write(priv, IMG_IR_STATUS, ir_status);
512 img_ir_read(priv, IMG_IR_DATA_LW);
513 img_ir_read(priv, IMG_IR_DATA_UP);
514 }
515
516 /* stop the end timer and switch back to normal mode */
517 del_timer_sync(&hw->end_timer);
518 hw->mode = IMG_IR_M_NORMAL;
519
520 /* clear the wakeup scancode filter */
521 rdev->scancode_filters[RC_FILTER_WAKEUP].data = 0;
522 rdev->scancode_filters[RC_FILTER_WAKEUP].mask = 0;
523
524 /* clear raw filters */
525 _img_ir_set_filter(priv, NULL);
526 _img_ir_set_wake_filter(priv, NULL);
527
528 /* clear the enabled protocols */
529 hw->enabled_protocols = 0;
530
531 /* switch decoder */
532 hw->decoder = decoder;
533 if (!decoder)
534 goto unlock;
535
536 /* set the enabled protocols */
537 if (!proto)
538 proto = decoder->type;
539 hw->enabled_protocols = proto;
540
541 /* write the new timings */
542 img_ir_decoder_convert(decoder, &hw->reg_timings, hw->clk_hz);
543 img_ir_write_timings(priv, &hw->reg_timings.timings, RC_FILTER_NORMAL);
544
545 /* set up and enable */
546 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
547
548
549unlock:
550 spin_unlock_irq(&priv->lock);
551}
552
553/**
554 * img_ir_decoder_compatable() - Find whether a decoder will work with a device.
555 * @priv: IR private data.
556 * @dec: Decoder to check.
557 *
558 * Returns: true if @dec is compatible with the device @priv refers to.
559 */
560static bool img_ir_decoder_compatible(struct img_ir_priv *priv,
561 const struct img_ir_decoder *dec)
562{
563 unsigned int ct;
564
565 /* don't accept decoders using code types which aren't supported */
566 ct = dec->control.code_type;
567 if (priv->hw.ct_quirks[ct] & IMG_IR_QUIRK_CODE_BROKEN)
568 return false;
569
570 return true;
571}
572
573/**
574 * img_ir_allowed_protos() - Get allowed protocols from global decoder list.
575 * @priv: IR private data.
576 *
577 * Returns: Mask of protocols supported by the device @priv refers to.
578 */
579static u64 img_ir_allowed_protos(struct img_ir_priv *priv)
580{
581 u64 protos = 0;
582 struct img_ir_decoder **decp;
583
584 for (decp = img_ir_decoders; *decp; ++decp) {
585 const struct img_ir_decoder *dec = *decp;
586 if (img_ir_decoder_compatible(priv, dec))
587 protos |= dec->type;
588 }
589 return protos;
590}
591
592/* Callback for changing protocol using sysfs */
593static int img_ir_change_protocol(struct rc_dev *dev, u64 *ir_type)
594{
595 struct img_ir_priv *priv = dev->priv;
596 struct img_ir_priv_hw *hw = &priv->hw;
597 struct rc_dev *rdev = hw->rdev;
598 struct img_ir_decoder **decp;
599 u64 wakeup_protocols;
600
601 if (!*ir_type) {
602 /* disable all protocols */
603 img_ir_set_decoder(priv, NULL, 0);
604 goto success;
605 }
606 for (decp = img_ir_decoders; *decp; ++decp) {
607 const struct img_ir_decoder *dec = *decp;
608 if (!img_ir_decoder_compatible(priv, dec))
609 continue;
610 if (*ir_type & dec->type) {
611 *ir_type &= dec->type;
612 img_ir_set_decoder(priv, dec, *ir_type);
613 goto success;
614 }
615 }
616 return -EINVAL;
617
618success:
619 /*
620 * Only allow matching wakeup protocols for now, and only if filtering
621 * is supported.
622 */
623 wakeup_protocols = *ir_type;
624 if (!hw->decoder || !hw->decoder->filter)
625 wakeup_protocols = 0;
626 rc_set_allowed_wakeup_protocols(rdev, wakeup_protocols);
627 rc_set_enabled_wakeup_protocols(rdev, wakeup_protocols);
628 return 0;
629}
630
631/* Changes ir-core protocol device attribute */
632static void img_ir_set_protocol(struct img_ir_priv *priv, u64 proto)
633{
634 struct rc_dev *rdev = priv->hw.rdev;
635
636 spin_lock_irq(&rdev->rc_map.lock);
637 rdev->rc_map.rc_type = __ffs64(proto);
638 spin_unlock_irq(&rdev->rc_map.lock);
639
640 mutex_lock(&rdev->lock);
641 rc_set_enabled_protocols(rdev, proto);
642 rc_set_allowed_wakeup_protocols(rdev, proto);
643 rc_set_enabled_wakeup_protocols(rdev, proto);
644 mutex_unlock(&rdev->lock);
645}
646
647/* Set up IR decoders */
648static void img_ir_init_decoders(void)
649{
650 struct img_ir_decoder **decp;
651
652 spin_lock(&img_ir_decoders_lock);
653 if (!img_ir_decoders_preprocessed) {
654 for (decp = img_ir_decoders; *decp; ++decp)
655 img_ir_decoder_preprocess(*decp);
656 img_ir_decoders_preprocessed = true;
657 }
658 spin_unlock(&img_ir_decoders_lock);
659}
660
661#ifdef CONFIG_PM_SLEEP
662/**
663 * img_ir_enable_wake() - Switch to wake mode.
664 * @priv: IR private data.
665 *
666 * Returns: non-zero if the IR can wake the system.
667 */
668static int img_ir_enable_wake(struct img_ir_priv *priv)
669{
670 struct img_ir_priv_hw *hw = &priv->hw;
671 int ret = 0;
672
673 spin_lock_irq(&priv->lock);
674 if (hw->flags & IMG_IR_F_WAKE) {
675 /* interrupt only on a match */
676 hw->suspend_irqen = img_ir_read(priv, IMG_IR_IRQ_ENABLE);
677 img_ir_write(priv, IMG_IR_IRQ_ENABLE, IMG_IR_IRQ_DATA_MATCH);
678 img_ir_write_filter(priv, &hw->filters[RC_FILTER_WAKEUP]);
679 img_ir_write_timings(priv, &hw->reg_timings.timings,
680 RC_FILTER_WAKEUP);
681 hw->mode = IMG_IR_M_WAKE;
682 ret = 1;
683 }
684 spin_unlock_irq(&priv->lock);
685 return ret;
686}
687
688/**
689 * img_ir_disable_wake() - Switch out of wake mode.
690 * @priv: IR private data
691 *
692 * Returns: 1 if the hardware should be allowed to wake from a sleep state.
693 * 0 otherwise.
694 */
695static int img_ir_disable_wake(struct img_ir_priv *priv)
696{
697 struct img_ir_priv_hw *hw = &priv->hw;
698 int ret = 0;
699
700 spin_lock_irq(&priv->lock);
701 if (hw->flags & IMG_IR_F_WAKE) {
702 /* restore normal filtering */
703 if (hw->flags & IMG_IR_F_FILTER) {
704 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
705 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
706 IMG_IR_IRQ_DATA_MATCH);
707 img_ir_write_filter(priv,
708 &hw->filters[RC_FILTER_NORMAL]);
709 } else {
710 img_ir_write(priv, IMG_IR_IRQ_ENABLE,
711 (hw->suspend_irqen & IMG_IR_IRQ_EDGE) |
712 IMG_IR_IRQ_DATA_VALID |
713 IMG_IR_IRQ_DATA2_VALID);
714 img_ir_write_filter(priv, NULL);
715 }
716 img_ir_write_timings(priv, &hw->reg_timings.timings,
717 RC_FILTER_NORMAL);
718 hw->mode = IMG_IR_M_NORMAL;
719 ret = 1;
720 }
721 spin_unlock_irq(&priv->lock);
722 return ret;
723}
724#endif /* CONFIG_PM_SLEEP */
725
726/* lock must be held */
727static void img_ir_begin_repeat(struct img_ir_priv *priv)
728{
729 struct img_ir_priv_hw *hw = &priv->hw;
730 if (hw->mode == IMG_IR_M_NORMAL) {
731 /* switch to repeat timings */
732 img_ir_write(priv, IMG_IR_CONTROL, 0);
733 hw->mode = IMG_IR_M_REPEATING;
734 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
735 RC_FILTER_NORMAL);
736 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
737 }
738}
739
740/* lock must be held */
741static void img_ir_end_repeat(struct img_ir_priv *priv)
742{
743 struct img_ir_priv_hw *hw = &priv->hw;
744 if (hw->mode == IMG_IR_M_REPEATING) {
745 /* switch to normal timings */
746 img_ir_write(priv, IMG_IR_CONTROL, 0);
747 hw->mode = IMG_IR_M_NORMAL;
748 img_ir_write_timings(priv, &hw->reg_timings.timings,
749 RC_FILTER_NORMAL);
750 img_ir_write(priv, IMG_IR_CONTROL, hw->reg_timings.ctrl);
751 }
752}
753
754/* lock must be held */
755static void img_ir_handle_data(struct img_ir_priv *priv, u32 len, u64 raw)
756{
757 struct img_ir_priv_hw *hw = &priv->hw;
758 const struct img_ir_decoder *dec = hw->decoder;
759 int ret = IMG_IR_SCANCODE;
760 int scancode;
761 if (dec->scancode)
762 ret = dec->scancode(len, raw, &scancode, hw->enabled_protocols);
763 else if (len >= 32)
764 scancode = (u32)raw;
765 else if (len < 32)
766 scancode = (u32)raw & ((1 << len)-1);
767 dev_dbg(priv->dev, "data (%u bits) = %#llx\n",
768 len, (unsigned long long)raw);
769 if (ret == IMG_IR_SCANCODE) {
770 dev_dbg(priv->dev, "decoded scan code %#x\n", scancode);
771 rc_keydown(hw->rdev, scancode, 0);
772 img_ir_end_repeat(priv);
773 } else if (ret == IMG_IR_REPEATCODE) {
774 if (hw->mode == IMG_IR_M_REPEATING) {
775 dev_dbg(priv->dev, "decoded repeat code\n");
776 rc_repeat(hw->rdev);
777 } else {
778 dev_dbg(priv->dev, "decoded unexpected repeat code, ignoring\n");
779 }
780 } else {
781 dev_dbg(priv->dev, "decode failed (%d)\n", ret);
782 return;
783 }
784
785
786 if (dec->repeat) {
787 unsigned long interval;
788
789 img_ir_begin_repeat(priv);
790
791 /* update timer, but allowing for 1/8th tolerance */
792 interval = dec->repeat + (dec->repeat >> 3);
793 mod_timer(&hw->end_timer,
794 jiffies + msecs_to_jiffies(interval));
795 }
796}
797
798/* timer function to end waiting for repeat. */
799static void img_ir_end_timer(unsigned long arg)
800{
801 struct img_ir_priv *priv = (struct img_ir_priv *)arg;
802
803 spin_lock_irq(&priv->lock);
804 img_ir_end_repeat(priv);
805 spin_unlock_irq(&priv->lock);
806}
807
808#ifdef CONFIG_COMMON_CLK
809static void img_ir_change_frequency(struct img_ir_priv *priv,
810 struct clk_notifier_data *change)
811{
812 struct img_ir_priv_hw *hw = &priv->hw;
813
814 dev_dbg(priv->dev, "clk changed %lu HZ -> %lu HZ\n",
815 change->old_rate, change->new_rate);
816
817 spin_lock_irq(&priv->lock);
818 if (hw->clk_hz == change->new_rate)
819 goto unlock;
820 hw->clk_hz = change->new_rate;
821 /* refresh current timings */
822 if (hw->decoder) {
823 img_ir_decoder_convert(hw->decoder, &hw->reg_timings,
824 hw->clk_hz);
825 switch (hw->mode) {
826 case IMG_IR_M_NORMAL:
827 img_ir_write_timings(priv, &hw->reg_timings.timings,
828 RC_FILTER_NORMAL);
829 break;
830 case IMG_IR_M_REPEATING:
831 img_ir_write_timings(priv, &hw->reg_timings.rtimings,
832 RC_FILTER_NORMAL);
833 break;
834#ifdef CONFIG_PM_SLEEP
835 case IMG_IR_M_WAKE:
836 img_ir_write_timings(priv, &hw->reg_timings.timings,
837 RC_FILTER_WAKEUP);
838 break;
839#endif
840 }
841 }
842unlock:
843 spin_unlock_irq(&priv->lock);
844}
845
846static int img_ir_clk_notify(struct notifier_block *self, unsigned long action,
847 void *data)
848{
849 struct img_ir_priv *priv = container_of(self, struct img_ir_priv,
850 hw.clk_nb);
851 switch (action) {
852 case POST_RATE_CHANGE:
853 img_ir_change_frequency(priv, data);
854 break;
855 default:
856 break;
857 }
858 return NOTIFY_OK;
859}
860#endif /* CONFIG_COMMON_CLK */
861
862/* called with priv->lock held */
863void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
864{
865 struct img_ir_priv_hw *hw = &priv->hw;
866 u32 ir_status, len, lw, up;
867 unsigned int ct;
868
869 /* use the current decoder */
870 if (!hw->decoder)
871 return;
872
873 ir_status = img_ir_read(priv, IMG_IR_STATUS);
874 if (!(ir_status & (IMG_IR_RXDVAL | IMG_IR_RXDVALD2)))
875 return;
876 ir_status &= ~(IMG_IR_RXDVAL | IMG_IR_RXDVALD2);
877 img_ir_write(priv, IMG_IR_STATUS, ir_status);
878
879 len = (ir_status & IMG_IR_RXDLEN) >> IMG_IR_RXDLEN_SHIFT;
880 /* some versions report wrong length for certain code types */
881 ct = hw->decoder->control.code_type;
882 if (hw->ct_quirks[ct] & IMG_IR_QUIRK_CODE_LEN_INCR)
883 ++len;
884
885 lw = img_ir_read(priv, IMG_IR_DATA_LW);
886 up = img_ir_read(priv, IMG_IR_DATA_UP);
887 img_ir_handle_data(priv, len, (u64)up << 32 | lw);
888}
889
890void img_ir_setup_hw(struct img_ir_priv *priv)
891{
892 struct img_ir_decoder **decp;
893
894 if (!priv->hw.rdev)
895 return;
896
897 /* Use the first available decoder (or disable stuff if NULL) */
898 for (decp = img_ir_decoders; *decp; ++decp) {
899 const struct img_ir_decoder *dec = *decp;
900 if (img_ir_decoder_compatible(priv, dec)) {
901 img_ir_set_protocol(priv, dec->type);
902 img_ir_set_decoder(priv, dec, 0);
903 return;
904 }
905 }
906 img_ir_set_decoder(priv, NULL, 0);
907}
908
909/**
910 * img_ir_probe_hw_caps() - Probe capabilities of the hardware.
911 * @priv: IR private data.
912 */
913static void img_ir_probe_hw_caps(struct img_ir_priv *priv)
914{
915 struct img_ir_priv_hw *hw = &priv->hw;
916 /*
917 * When a version of the block becomes available without these quirks,
918 * they'll have to depend on the core revision.
919 */
920 hw->ct_quirks[IMG_IR_CODETYPE_PULSELEN]
921 |= IMG_IR_QUIRK_CODE_LEN_INCR;
922 hw->ct_quirks[IMG_IR_CODETYPE_BIPHASE]
923 |= IMG_IR_QUIRK_CODE_BROKEN;
924 hw->ct_quirks[IMG_IR_CODETYPE_2BITPULSEPOS]
925 |= IMG_IR_QUIRK_CODE_BROKEN;
926}
927
928int img_ir_probe_hw(struct img_ir_priv *priv)
929{
930 struct img_ir_priv_hw *hw = &priv->hw;
931 struct rc_dev *rdev;
932 int error;
933
934 /* Ensure hardware decoders have been preprocessed */
935 img_ir_init_decoders();
936
937 /* Probe hardware capabilities */
938 img_ir_probe_hw_caps(priv);
939
940 /* Set up the end timer */
941 setup_timer(&hw->end_timer, img_ir_end_timer, (unsigned long)priv);
942
943 /* Register a clock notifier */
944 if (!IS_ERR(priv->clk)) {
945 hw->clk_hz = clk_get_rate(priv->clk);
946#ifdef CONFIG_COMMON_CLK
947 hw->clk_nb.notifier_call = img_ir_clk_notify;
948 error = clk_notifier_register(priv->clk, &hw->clk_nb);
949 if (error)
950 dev_warn(priv->dev,
951 "failed to register clock notifier\n");
952#endif
953 } else {
954 hw->clk_hz = 32768;
955 }
956
957 /* Allocate hardware decoder */
958 hw->rdev = rdev = rc_allocate_device();
959 if (!rdev) {
960 dev_err(priv->dev, "cannot allocate input device\n");
961 error = -ENOMEM;
962 goto err_alloc_rc;
963 }
964 rdev->priv = priv;
965 rdev->map_name = RC_MAP_EMPTY;
966 rc_set_allowed_protocols(rdev, img_ir_allowed_protos(priv));
967 rdev->input_name = "IMG Infrared Decoder";
968 rdev->s_filter = img_ir_set_filter;
969
970 /* Register hardware decoder */
971 error = rc_register_device(rdev);
972 if (error) {
973 dev_err(priv->dev, "failed to register IR input device\n");
974 goto err_register_rc;
975 }
976
977 /*
978 * Set this after rc_register_device as no protocols have been
979 * registered yet.
980 */
981 rdev->change_protocol = img_ir_change_protocol;
982
983 device_init_wakeup(priv->dev, 1);
984
985 return 0;
986
987err_register_rc:
988 img_ir_set_decoder(priv, NULL, 0);
989 hw->rdev = NULL;
990 rc_free_device(rdev);
991err_alloc_rc:
992#ifdef CONFIG_COMMON_CLK
993 if (!IS_ERR(priv->clk))
994 clk_notifier_unregister(priv->clk, &hw->clk_nb);
995#endif
996 return error;
997}
998
999void img_ir_remove_hw(struct img_ir_priv *priv)
1000{
1001 struct img_ir_priv_hw *hw = &priv->hw;
1002 struct rc_dev *rdev = hw->rdev;
1003 if (!rdev)
1004 return;
1005 img_ir_set_decoder(priv, NULL, 0);
1006 hw->rdev = NULL;
1007 rc_unregister_device(rdev);
1008#ifdef CONFIG_COMMON_CLK
1009 if (!IS_ERR(priv->clk))
1010 clk_notifier_unregister(priv->clk, &hw->clk_nb);
1011#endif
1012}
1013
1014#ifdef CONFIG_PM_SLEEP
1015int img_ir_suspend(struct device *dev)
1016{
1017 struct img_ir_priv *priv = dev_get_drvdata(dev);
1018
1019 if (device_may_wakeup(dev) && img_ir_enable_wake(priv))
1020 enable_irq_wake(priv->irq);
1021 return 0;
1022}
1023
1024int img_ir_resume(struct device *dev)
1025{
1026 struct img_ir_priv *priv = dev_get_drvdata(dev);
1027
1028 if (device_may_wakeup(dev) && img_ir_disable_wake(priv))
1029 disable_irq_wake(priv->irq);
1030 return 0;
1031}
1032#endif /* CONFIG_PM_SLEEP */
diff --git a/drivers/media/rc/img-ir/img-ir-hw.h b/drivers/media/rc/img-ir/img-ir-hw.h
new file mode 100644
index 000000000000..6c9a94a81190
--- /dev/null
+++ b/drivers/media/rc/img-ir/img-ir-hw.h
@@ -0,0 +1,269 @@
1/*
2 * ImgTec IR Hardware Decoder found in PowerDown Controller.
3 *
4 * Copyright 2010-2014 Imagination Technologies Ltd.
5 */
6
7#ifndef _IMG_IR_HW_H_
8#define _IMG_IR_HW_H_
9
10#include <linux/kernel.h>
11#include <media/rc-core.h>
12
13/* constants */
14
15#define IMG_IR_CODETYPE_PULSELEN 0x0 /* Sony */
16#define IMG_IR_CODETYPE_PULSEDIST 0x1 /* NEC, Toshiba, Micom, Sharp */
17#define IMG_IR_CODETYPE_BIPHASE 0x2 /* RC-5/6 */
18#define IMG_IR_CODETYPE_2BITPULSEPOS 0x3 /* RC-MM */
19
20
21/* Timing information */
22
23/**
24 * struct img_ir_control - Decoder control settings
25 * @decoden: Primary decoder enable
26 * @code_type: Decode type (see IMG_IR_CODETYPE_*)
27 * @hdrtog: Detect header toggle symbol after leader symbol
28 * @ldrdec: Don't discard leader if maximum width reached
29 * @decodinpol: Decoder input polarity (1=active high)
30 * @bitorien: Bit orientation (1=MSB first)
31 * @d1validsel: Decoder 2 takes over if it detects valid data
32 * @bitinv: Bit inversion switch (1=don't invert)
33 * @decodend2: Secondary decoder enable (no leader symbol)
34 * @bitoriend2: Bit orientation (1=MSB first)
35 * @bitinvd2: Secondary decoder bit inversion switch (1=don't invert)
36 */
37struct img_ir_control {
38 unsigned decoden:1;
39 unsigned code_type:2;
40 unsigned hdrtog:1;
41 unsigned ldrdec:1;
42 unsigned decodinpol:1;
43 unsigned bitorien:1;
44 unsigned d1validsel:1;
45 unsigned bitinv:1;
46 unsigned decodend2:1;
47 unsigned bitoriend2:1;
48 unsigned bitinvd2:1;
49};
50
51/**
52 * struct img_ir_timing_range - range of timing values
53 * @min: Minimum timing value
54 * @max: Maximum timing value (if < @min, this will be set to @min during
55 * preprocessing step, so it is normally not explicitly initialised
56 * and is taken care of by the tolerance)
57 */
58struct img_ir_timing_range {
59 u16 min;
60 u16 max;
61};
62
63/**
64 * struct img_ir_symbol_timing - timing data for a symbol
65 * @pulse: Timing range for the length of the pulse in this symbol
66 * @space: Timing range for the length of the space in this symbol
67 */
68struct img_ir_symbol_timing {
69 struct img_ir_timing_range pulse;
70 struct img_ir_timing_range space;
71};
72
73/**
74 * struct img_ir_free_timing - timing data for free time symbol
75 * @minlen: Minimum number of bits of data
76 * @maxlen: Maximum number of bits of data
77 * @ft_min: Minimum free time after message
78 */
79struct img_ir_free_timing {
80 /* measured in bits */
81 u8 minlen;
82 u8 maxlen;
83 u16 ft_min;
84};
85
86/**
87 * struct img_ir_timings - Timing values.
88 * @ldr: Leader symbol timing data
89 * @s00: Zero symbol timing data for primary decoder
90 * @s01: One symbol timing data for primary decoder
91 * @s10: Zero symbol timing data for secondary (no leader symbol) decoder
92 * @s11: One symbol timing data for secondary (no leader symbol) decoder
93 * @ft: Free time symbol timing data
94 */
95struct img_ir_timings {
96 struct img_ir_symbol_timing ldr, s00, s01, s10, s11;
97 struct img_ir_free_timing ft;
98};
99
100/**
101 * struct img_ir_filter - Filter IR events.
102 * @data: Data to match.
103 * @mask: Mask of bits to compare.
104 * @minlen: Additional minimum number of bits.
105 * @maxlen: Additional maximum number of bits.
106 */
107struct img_ir_filter {
108 u64 data;
109 u64 mask;
110 u8 minlen;
111 u8 maxlen;
112};
113
114/**
115 * struct img_ir_timing_regvals - Calculated timing register values.
116 * @ldr: Leader symbol timing register value
117 * @s00: Zero symbol timing register value for primary decoder
118 * @s01: One symbol timing register value for primary decoder
119 * @s10: Zero symbol timing register value for secondary decoder
120 * @s11: One symbol timing register value for secondary decoder
121 * @ft: Free time symbol timing register value
122 */
123struct img_ir_timing_regvals {
124 u32 ldr, s00, s01, s10, s11, ft;
125};
126
127#define IMG_IR_SCANCODE 0 /* new scancode */
128#define IMG_IR_REPEATCODE 1 /* repeat the previous code */
129
130/**
131 * struct img_ir_decoder - Decoder settings for an IR protocol.
132 * @type: Protocol types bitmap.
133 * @tolerance: Timing tolerance as a percentage (default 10%).
134 * @unit: Unit of timings in nanoseconds (default 1 us).
135 * @timings: Primary timings
136 * @rtimings: Additional override timings while waiting for repeats.
137 * @repeat: Maximum repeat interval (always in milliseconds).
138 * @control: Control flags.
139 *
140 * @scancode: Pointer to function to convert the IR data into a scancode (it
141 * must be safe to execute in interrupt context).
142 * Returns IMG_IR_SCANCODE to emit new scancode.
143 * Returns IMG_IR_REPEATCODE to repeat previous code.
144 * Returns -errno (e.g. -EINVAL) on error.
145 * @filter: Pointer to function to convert scancode filter to raw hardware
146 * filter. The minlen and maxlen fields will have been initialised
147 * to the maximum range.
148 */
149struct img_ir_decoder {
150 /* core description */
151 u64 type;
152 unsigned int tolerance;
153 unsigned int unit;
154 struct img_ir_timings timings;
155 struct img_ir_timings rtimings;
156 unsigned int repeat;
157 struct img_ir_control control;
158
159 /* scancode logic */
160 int (*scancode)(int len, u64 raw, int *scancode, u64 protocols);
161 int (*filter)(const struct rc_scancode_filter *in,
162 struct img_ir_filter *out, u64 protocols);
163};
164
165/**
166 * struct img_ir_reg_timings - Reg values for decoder timings at clock rate.
167 * @ctrl: Processed control register value.
168 * @timings: Processed primary timings.
169 * @rtimings: Processed repeat timings.
170 */
171struct img_ir_reg_timings {
172 u32 ctrl;
173 struct img_ir_timing_regvals timings;
174 struct img_ir_timing_regvals rtimings;
175};
176
177int img_ir_register_decoder(struct img_ir_decoder *dec);
178void img_ir_unregister_decoder(struct img_ir_decoder *dec);
179
180struct img_ir_priv;
181
182#ifdef CONFIG_IR_IMG_HW
183
184enum img_ir_mode {
185 IMG_IR_M_NORMAL,
186 IMG_IR_M_REPEATING,
187#ifdef CONFIG_PM_SLEEP
188 IMG_IR_M_WAKE,
189#endif
190};
191
192/**
193 * struct img_ir_priv_hw - Private driver data for hardware decoder.
194 * @ct_quirks: Quirk bits for each code type.
195 * @rdev: Remote control device
196 * @clk_nb: Notifier block for clock notify events.
197 * @end_timer: Timer until repeat timeout.
198 * @decoder: Current decoder settings.
199 * @enabled_protocols: Currently enabled protocols.
200 * @clk_hz: Current core clock rate in Hz.
201 * @reg_timings: Timing reg values for decoder at clock rate.
202 * @flags: IMG_IR_F_*.
203 * @filters: HW filters (derived from scancode filters).
204 * @mode: Current decode mode.
205 * @suspend_irqen: Saved IRQ enable mask over suspend.
206 */
207struct img_ir_priv_hw {
208 unsigned int ct_quirks[4];
209 struct rc_dev *rdev;
210 struct notifier_block clk_nb;
211 struct timer_list end_timer;
212 const struct img_ir_decoder *decoder;
213 u64 enabled_protocols;
214 unsigned long clk_hz;
215 struct img_ir_reg_timings reg_timings;
216 unsigned int flags;
217 struct img_ir_filter filters[RC_FILTER_MAX];
218
219 enum img_ir_mode mode;
220 u32 suspend_irqen;
221};
222
223static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
224{
225 return hw->rdev;
226};
227
228void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status);
229void img_ir_setup_hw(struct img_ir_priv *priv);
230int img_ir_probe_hw(struct img_ir_priv *priv);
231void img_ir_remove_hw(struct img_ir_priv *priv);
232
233#ifdef CONFIG_PM_SLEEP
234int img_ir_suspend(struct device *dev);
235int img_ir_resume(struct device *dev);
236#else
237#define img_ir_suspend NULL
238#define img_ir_resume NULL
239#endif
240
241#else
242
243struct img_ir_priv_hw {
244};
245
246static inline bool img_ir_hw_enabled(struct img_ir_priv_hw *hw)
247{
248 return false;
249};
250static inline void img_ir_isr_hw(struct img_ir_priv *priv, u32 irq_status)
251{
252}
253static inline void img_ir_setup_hw(struct img_ir_priv *priv)
254{
255}
256static inline int img_ir_probe_hw(struct img_ir_priv *priv)
257{
258 return -ENODEV;
259}
260static inline void img_ir_remove_hw(struct img_ir_priv *priv)
261{
262}
263
264#define img_ir_suspend NULL
265#define img_ir_resume NULL
266
267#endif /* CONFIG_IR_IMG_HW */
268
269#endif /* _IMG_IR_HW_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-29 03:40:33 -0400