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authorStefan Roese <sr@denx.de>2014-08-29 06:40:04 -0400
committerTony Lindgren <tony@atomide.com>2014-09-08 20:07:46 -0400
commit30d95c6d70920348c58649c35a8d41915cd7db9c (patch)
treebb8f7596ac176eb8c7c84e791dd9b8646432d090
parent63dd5bc03a1ac9dd90807f6f3fc2475c0d4f046a (diff)
ARM: dts: omap3: Add Technexion TAO3530 SOM omap3-tao3530.dtsi
The Technexion TAO3530 is a OMAP3530 based SOM. This patch adds the basic support for it as an dtsi file which can be included by baseboard equipped with this SOM. E.g. the Technexion Thunder baseboard. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat
-rw-r--r--arch/arm/boot/dts/omap3-tao3530.dtsi337
1 files changed, 337 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-tao3530.dtsi b/arch/arm/boot/dts/omap3-tao3530.dtsi
new file mode 100644
index 000000000000..b30f387d3a83
--- /dev/null
+++ b/arch/arm/boot/dts/omap3-tao3530.dtsi
@@ -0,0 +1,337 @@
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9/dts-v1/;
10
11#include "omap34xx-hs.dtsi"
12
13/ {
14 cpus {
15 cpu@0 {
16 cpu0-supply = <&vcc>;
17 };
18 };
19
20 memory {
21 device_type = "memory";
22 reg = <0x80000000 0x10000000>; /* 256 MB */
23 };
24
25 /* HS USB Port 2 Power */
26 hsusb2_power: hsusb2_power_reg {
27 compatible = "regulator-fixed";
28 regulator-name = "hsusb2_vbus";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 gpio = <&twl_gpio 18 0>; /* GPIO LEDA */
32 startup-delay-us = <70000>;
33 };
34
35 /* HS USB Host PHY on PORT 2 */
36 hsusb2_phy: hsusb2_phy {
37 compatible = "usb-nop-xceiv";
38 reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* gpio_162 */
39 vcc-supply = <&hsusb2_power>;
40 };
41
42 sound {
43 compatible = "ti,omap-twl4030";
44 ti,model = "omap3beagle";
45
46 /* McBSP2 is used for onboard sound, same as on beagle */
47 ti,mcbsp = <&mcbsp2>;
48 ti,codec = <&twl_audio>;
49 };
50
51 /* Regulator to enable/switch the vcc of the Wifi module */
52 mmc2_sdio_poweron: regulator-mmc2-sdio-poweron {
53 compatible = "regulator-fixed";
54 regulator-name = "regulator-mmc2-sdio-poweron";
55 regulator-min-microvolt = <3150000>;
56 regulator-max-microvolt = <3150000>;
57 gpio = <&gpio5 29 GPIO_ACTIVE_LOW>; /* gpio_157 */
58 enable-active-low;
59 startup-delay-us = <10000>;
60 };
61};
62
63&omap3_pmx_core {
64 hsusbb2_pins: pinmux_hsusbb2_pins {
65 pinctrl-single,pins = <
66 OMAP3_CORE1_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
67 OMAP3_CORE1_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
68 OMAP3_CORE1_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
69 OMAP3_CORE1_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
70 OMAP3_CORE1_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
71 OMAP3_CORE1_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
72 OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
73 OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
74 OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
75 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
76 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
77 OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
78 >;
79 };
80
81 mmc1_pins: pinmux_mmc1_pins {
82 pinctrl-single,pins = <
83 OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
84 OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
85 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
86 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
87 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
88 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
89 OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */
90 OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */
91 OMAP3_CORE1_IOPAD(0x2154, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */
92 OMAP3_CORE1_IOPAD(0x2156, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */
93 >;
94 };
95
96 mmc2_pins: pinmux_mmc2_pins {
97 pinctrl-single,pins = <
98 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
99 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
100 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
101 OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
102 OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
103 OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
104 >;
105 };
106
107 /* wlan GPIO output for WLAN_EN */
108 wlan_gpio: pinmux_wlan_gpio {
109 pinctrl-single,pins = <
110 OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4) /* mcbsp1_fsr gpio_157 */
111 >;
112 };
113
114 uart3_pins: pinmux_uart3_pins {
115 pinctrl-single,pins = <
116 OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
117 OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
118 >;
119 };
120
121 i2c3_pins: pinmux_i2c3_pins {
122 pinctrl-single,pins = <
123 OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl.i2c3_scl */
124 OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda.i2c3_sda */
125 >;
126 };
127
128 mcspi1_pins: pinmux_mcspi1_pins {
129 pinctrl-single,pins = <
130 OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
131 OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
132 OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
133 OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
134 >;
135 };
136
137 mcspi3_pins: pinmux_mcspi3_pins {
138 pinctrl-single,pins = <
139 OMAP3_CORE1_IOPAD(0x25dc, PIN_OUTPUT | MUX_MODE1) /* etk_d0.mcspi3_simo gpio14 INPUT | MODE1 */
140 OMAP3_CORE1_IOPAD(0x25de, PIN_INPUT_PULLUP | MUX_MODE1) /* etk_d1.mcspi3_somi gpio15 INPUT | MODE1 */
141 OMAP3_CORE1_IOPAD(0x25e0, PIN_OUTPUT | MUX_MODE1) /* etk_d2.mcspi3_cs0 gpio16 INPUT | MODE1 */
142 OMAP3_CORE1_IOPAD(0x25e2, PIN_INPUT | MUX_MODE1) /* etk_d3.mcspi3_clk gpio17 INPUT | MODE1 */
143 >;
144 };
145
146 mcbsp3_pins: pinmux_mcbsp3_pins {
147 pinctrl-single,pins = <
148 OMAP3_CORE1_IOPAD(0x216c, PIN_OUTPUT | MUX_MODE0) /* mcbsp3_dx.uart2_cts */
149 OMAP3_CORE1_IOPAD(0x216e, PIN_INPUT | MUX_MODE0) /* mcbsp3_dr.uart2_rts */
150 OMAP3_CORE1_IOPAD(0x2170, PIN_INPUT | MUX_MODE0) /* mcbsp3_clk.uart2_tx */
151 OMAP3_CORE1_IOPAD(0x2172, PIN_INPUT | MUX_MODE0) /* mcbsp3_fsx.uart2_rx */
152 >;
153 };
154};
155
156/* McBSP1: mux'ed with GPIO158 as clock for HA-DSP */
157&mcbsp1 {
158 status = "disabled";
159};
160
161&mcbsp2 {
162 status = "okay";
163};
164
165&i2c1 {
166 clock-frequency = <2600000>;
167
168 twl: twl@48 {
169 reg = <0x48>;
170 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
171 interrupt-parent = <&intc>;
172
173 twl_audio: audio {
174 compatible = "ti,twl4030-audio";
175 codec {
176 };
177 };
178 };
179};
180
181&i2c3 {
182 clock-frequency = <100000>;
183
184 pinctrl-names = "default";
185 pinctrl-0 = <&i2c3_pins>;
186};
187
188&mcspi1 {
189 pinctrl-names = "default";
190 pinctrl-0 = <&mcspi1_pins>;
191
192 spidev@0 {
193 compatible = "spidev";
194 spi-max-frequency = <48000000>;
195 reg = <0>;
196 spi-cpha;
197 };
198};
199
200&mcspi3 {
201 pinctrl-names = "default";
202 pinctrl-0 = <&mcspi3_pins>;
203
204 spidev@0 {
205 compatible = "spidev";
206 spi-max-frequency = <48000000>;
207 reg = <0>;
208 spi-cpha;
209 };
210};
211
212#include "twl4030.dtsi"
213#include "twl4030_omap3.dtsi"
214
215&mmc1 {
216 pinctrl-names = "default";
217 pinctrl-0 = <&mmc1_pins>;
218 vmmc-supply = <&vmmc1>;
219 vmmc_aux-supply = <&vsim>;
220 cd-gpios = <&twl_gpio 0 0>;
221 bus-width = <8>;
222};
223
224// WiFi (Marvell 88W8686) on MMC2/SDIO
225&mmc2 {
226 pinctrl-names = "default";
227 pinctrl-0 = <&mmc2_pins>;
228 vmmc-supply = <&mmc2_sdio_poweron>;
229 non-removable;
230 bus-width = <4>;
231 cap-power-off-card;
232};
233
234&mmc3 {
235 status = "disabled";
236};
237
238&usbhshost {
239 port2-mode = "ehci-phy";
240};
241
242&usbhsehci {
243 phys = <0 &hsusb2_phy>;
244};
245
246&twl_gpio {
247 ti,use-leds;
248 /* pullups: BIT(1) */
249 ti,pullups = <0x000002>;
250 /*
251 * pulldowns:
252 * BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
253 * BIT(15), BIT(16), BIT(17)
254 */
255 ti,pulldowns = <0x03a1c4>;
256};
257
258&uart3 {
259 pinctrl-names = "default";
260 pinctrl-0 = <&uart3_pins>;
261};
262
263&mcbsp3 {
264 status = "okay";
265 pinctrl-names = "default";
266 pinctrl-0 = <&mcbsp3_pins>;
267};
268
269&gpmc {
270 ranges = <0 0 0x00000000 0x01000000>;
271
272 nand@0,0 {
273 reg = <0 0 0>; /* CS0, offset 0 */
274 nand-bus-width = <16>;
275 gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
276 ti,nand-ecc-opt = "sw";
277
278 gpmc,cs-on-ns = <0>;
279 gpmc,cs-rd-off-ns = <36>;
280 gpmc,cs-wr-off-ns = <36>;
281 gpmc,adv-on-ns = <6>;
282 gpmc,adv-rd-off-ns = <24>;
283 gpmc,adv-wr-off-ns = <36>;
284 gpmc,oe-on-ns = <6>;
285 gpmc,oe-off-ns = <48>;
286 gpmc,we-on-ns = <6>;
287 gpmc,we-off-ns = <30>;
288 gpmc,rd-cycle-ns = <72>;
289 gpmc,wr-cycle-ns = <72>;
290 gpmc,access-ns = <54>;
291 gpmc,wr-access-ns = <30>;
292
293 #address-cells = <1>;
294 #size-cells = <1>;
295
296 x-loader@0 {
297 label = "X-Loader";
298 reg = <0 0x80000>;
299 };
300
301 bootloaders@80000 {
302 label = "U-Boot";
303 reg = <0x80000 0x1e0000>;
304 };
305
306 bootloaders_env@260000 {
307 label = "U-Boot Env";
308 reg = <0x260000 0x20000>;
309 };
310
311 kernel@280000 {
312 label = "Kernel";
313 reg = <0x280000 0x400000>;
314 };
315
316 filesystem@680000 {
317 label = "File System";
318 reg = <0x680000 0xf980000>;
319 };
320 };
321};
322
323&usb_otg_hs {
324 interface-type = <0>;
325 usb-phy = <&usb2_phy>;
326 phys = <&usb2_phy>;
327 phy-names = "usb2-phy";
328 mode = <3>;
329 power = <50>;
330};
331
332&vaux2 {
333 regulator-name = "vdd_ehci";
334 regulator-min-microvolt = <1800000>;
335 regulator-max-microvolt = <1800000>;
336 regulator-always-on;
337};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-18 01:22:40 -0400