aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAlex Elder <elder@linaro.org>2013-11-22 13:44:32 -0500
committerChristian Daudt <bcm@fixthebug.org>2013-12-31 12:08:38 -0500
commit30d831156b3a7f249c08cbe457a0d728160db39b (patch)
treedefe87256d4105c3ae6590adc9261fd8d324deb0
parentd97f79973846456c511f46310ba158439e6c84f5 (diff)
clk: bcm281xx: define kona clock binding
Document the device tree binding for Broadcom Kona architecture clock control units and clocks. Kona device nodes are represented with compatible strings having "bcm11351" in their name. Kona clocks are managed by "clock control units" (CCUs). Each CCU has a device tree node, and within that node are defined the names of the clocks provided by the CCU. The BCM281xx family of SoCs use Kona CCUs and clocks. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Reviewed-by: Tim Kryger <tim.kryger@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Christian Daudt <bcm@fixthebug.org>
-rw-r--r--Documentation/devicetree/bindings/clock/bcm-kona-clock.txt93
1 files changed, 93 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/bcm-kona-clock.txt b/Documentation/devicetree/bindings/clock/bcm-kona-clock.txt
new file mode 100644
index 000000000000..56d1f4961075
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/bcm-kona-clock.txt
@@ -0,0 +1,93 @@
1Broadcom Kona Family Clocks
2
3This binding is associated with Broadcom SoCs having "Kona" style
4clock control units (CCUs). A CCU is a clock provider that manages
5a set of clock signals. Each CCU is represented by a node in the
6device tree.
7
8This binding uses the common clock binding:
9 Documentation/devicetree/bindings/clock/clock-bindings.txt
10
11Required properties:
12- compatible
13 Shall have one of the following values:
14 - "brcm,bcm11351-root-ccu"
15 - "brcm,bcm11351-aon-ccu"
16 - "brcm,bcm11351-hub-ccu"
17 - "brcm,bcm11351-master-ccu"
18 - "brcm,bcm11351-slave-ccu"
19- reg
20 Shall define the base and range of the address space
21 containing clock control registers
22- #clock-cells
23 Shall have value <1>. The permitted clock-specifier values
24 are defined below.
25- clock-output-names
26 Shall be an ordered list of strings defining the names of
27 the clocks provided by the CCU.
28
29
30BCM281XX family SoCs use Kona CCUs. The following table defines
31the set of CCUs and clock specifiers for BCM281XX clocks. When
32a clock consumer references a clocks, its symbolic specifier
33(rather than its numeric index value) should be used. These
34specifiers are defined in "include/dt-bindings/clock/bcm281xx.h".
35
36 CCU Clock Type Index Specifier
37 --- ----- ---- ----- ---------
38 root frac_1m peri 0 BCM281XX_ROOT_CCU_FRAC_1M
39
40 aon hub_timer peri 0 BCM281XX_AON_CCU_HUB_TIMER
41 aon pmu_bsc peri 1 BCM281XX_AON_CCU_PMU_BSC
42 aon pmu_bsc_var peri 2 BCM281XX_AON_CCU_PMU_BSC_VAR
43
44 hub tmon_1m peri 0 BCM281XX_HUB_CCU_TMON_1M
45
46 master sdio1 peri 0 BCM281XX_MASTER_CCU_SDIO1
47 master sdio2 peri 1 BCM281XX_MASTER_CCU_SDIO2
48 master sdio3 peri 2 BCM281XX_MASTER_CCU_SDIO3
49 master sdio4 peri 3 BCM281XX_MASTER_CCU_SDIO4
50 master dmac peri 4 BCM281XX_MASTER_CCU_DMAC
51 master usb_ic peri 5 BCM281XX_MASTER_CCU_USB_IC
52 master hsic2_48m peri 6 BCM281XX_MASTER_CCU_HSIC_48M
53 master hsic2_12m peri 7 BCM281XX_MASTER_CCU_HSIC_12M
54
55 slave uartb peri 0 BCM281XX_SLAVE_CCU_UARTB
56 slave uartb2 peri 1 BCM281XX_SLAVE_CCU_UARTB2
57 slave uartb3 peri 2 BCM281XX_SLAVE_CCU_UARTB3
58 slave uartb4 peri 3 BCM281XX_SLAVE_CCU_UARTB4
59 slave ssp0 peri 4 BCM281XX_SLAVE_CCU_SSP0
60 slave ssp2 peri 5 BCM281XX_SLAVE_CCU_SSP2
61 slave bsc1 peri 6 BCM281XX_SLAVE_CCU_BSC1
62 slave bsc2 peri 7 BCM281XX_SLAVE_CCU_BSC2
63 slave bsc3 peri 8 BCM281XX_SLAVE_CCU_BSC3
64 slave pwm peri 9 BCM281XX_SLAVE_CCU_PWM
65
66
67Device tree example:
68
69 slave_ccu: slave_ccu {
70 compatible = "brcm,bcm11351-slave-ccu";
71 reg = <0x3e011000 0x0f00>;
72 #clock-cells = <1>;
73 clock-output-names = "uartb",
74 "uartb2",
75 "uartb3",
76 "uartb4";
77 };
78
79 ref_crystal_clk: ref_crystal {
80 #clock-cells = <0>;
81 compatible = "fixed-clock";
82 clock-frequency = <26000000>;
83 };
84
85 uart@3e002000 {
86 compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
87 status = "disabled";
88 reg = <0x3e002000 0x1000>;
89 clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
90 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
91 reg-shift = <2>;
92 reg-io-width = <4>;
93 };