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authorSam Ravnborg <sam@ravnborg.org>2012-05-11 07:35:06 -0400
committerDavid S. Miller <davem@davemloft.net>2012-05-11 22:27:46 -0400
commit306f1231622176d06b1ad2bccc46122dd4e927fa (patch)
treec8ac1f2bf302484b0e87e7793fd6c9322c6860f4
parente7eaf5b8abb836785a512fa7e9348dc6b0d7bc81 (diff)
sparc32: remove sun4c traps
We used to runtime patch the trap table for srmmu. With the removal of sun4c support this is no longer required. With the sun4c trap removed we can remove all the referenced trap handling which is sun4c specific. This also allows us to get rid of the nosun4c.c file that contained only dummy functions/data. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--arch/sparc/include/asm/head_32.h4
-rw-r--r--arch/sparc/include/asm/memreg.h51
-rw-r--r--arch/sparc/kernel/devices.c4
-rw-r--r--arch/sparc/kernel/entry.S248
-rw-r--r--arch/sparc/kernel/head_32.S6
-rw-r--r--arch/sparc/kernel/setup_32.c9
-rw-r--r--arch/sparc/mm/Makefile2
-rw-r--r--arch/sparc/mm/fault_32.c89
-rw-r--r--arch/sparc/mm/nosun4c.c54
-rw-r--r--arch/sparc/mm/srmmu.c5
10 files changed, 4 insertions, 468 deletions
diff --git a/arch/sparc/include/asm/head_32.h b/arch/sparc/include/asm/head_32.h
index 5ceb7faee3f1..25460390fc70 100644
--- a/arch/sparc/include/asm/head_32.h
+++ b/arch/sparc/include/asm/head_32.h
@@ -18,9 +18,7 @@
18#define TRAP_ENTRY(type, label) \ 18#define TRAP_ENTRY(type, label) \
19 rd %psr, %l0; b label; rd %wim, %l3; nop; 19 rd %psr, %l0; b label; rd %wim, %l3; nop;
20 20
21/* Data/text faults. Defaults to sun4c version at boot time. */ 21/* Data/text faults */
22#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
23#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
24#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; 22#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7;
25#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; 23#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7;
26 24
diff --git a/arch/sparc/include/asm/memreg.h b/arch/sparc/include/asm/memreg.h
deleted file mode 100644
index 845ad2b39183..000000000000
--- a/arch/sparc/include/asm/memreg.h
+++ /dev/null
@@ -1,51 +0,0 @@
1#ifndef _SPARC_MEMREG_H
2#define _SPARC_MEMREG_H
3/* memreg.h: Definitions of the values found in the synchronous
4 * and asynchronous memory error registers when a fault
5 * occurs on the sun4c.
6 *
7 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
8 */
9
10/* First the synchronous error codes, these are usually just
11 * normal page faults.
12 */
13
14#define SUN4C_SYNC_WDRESET 0x0001 /* watchdog reset */
15#define SUN4C_SYNC_SIZE 0x0002 /* bad access size? whuz this? */
16#define SUN4C_SYNC_PARITY 0x0008 /* bad ram chips caused a parity error */
17#define SUN4C_SYNC_SBUS 0x0010 /* the SBUS had some problems... */
18#define SUN4C_SYNC_NOMEM 0x0020 /* translation to non-existent ram */
19#define SUN4C_SYNC_PROT 0x0040 /* access violated pte protections */
20#define SUN4C_SYNC_NPRESENT 0x0080 /* pte said that page was not present */
21#define SUN4C_SYNC_BADWRITE 0x8000 /* while writing something went bogus */
22
23#define SUN4C_SYNC_BOLIXED \
24 (SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \
25 SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY)
26
27/* Now the asynchronous error codes, these are almost always produced
28 * by the cache writing things back to memory and getting a bad translation.
29 * Bad DVMA transactions can cause these faults too.
30 */
31
32#define SUN4C_ASYNC_BADDVMA 0x0010 /* error during DVMA access */
33#define SUN4C_ASYNC_NOMEM 0x0020 /* write back pointed to bad phys addr */
34#define SUN4C_ASYNC_BADWB 0x0080 /* write back points to non-present page */
35
36/* Memory parity error register with associated bit constants. */
37#ifndef __ASSEMBLY__
38extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
39#endif
40
41#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */
42#define SUN4C_MPE_MULTI 0x40 /* Multiple parity errors detected. (ro) */
43#define SUN4C_MPE_TEST 0x20 /* Write inverse parity. (rw) */
44#define SUN4C_MPE_CHECK 0x10 /* Enable parity checking. (rw) */
45#define SUN4C_MPE_ERR00 0x08 /* Parity error in bits 0-7. (ro) */
46#define SUN4C_MPE_ERR08 0x04 /* Parity error in bits 8-15. (ro) */
47#define SUN4C_MPE_ERR16 0x02 /* Parity error in bits 16-23. (ro) */
48#define SUN4C_MPE_ERR24 0x01 /* Parity error in bits 24-31. (ro) */
49#define SUN4C_MPE_ERRS 0x0F /* Bit mask for the error bits. (ro) */
50
51#endif /* !(_SPARC_MEMREG_H) */
diff --git a/arch/sparc/kernel/devices.c b/arch/sparc/kernel/devices.c
index 6b2f56a6f8af..3d465e87f7e2 100644
--- a/arch/sparc/kernel/devices.c
+++ b/arch/sparc/kernel/devices.c
@@ -21,7 +21,6 @@
21#include <asm/cpu_type.h> 21#include <asm/cpu_type.h>
22 22
23extern void clock_stop_probe(void); /* tadpole.c */ 23extern void clock_stop_probe(void); /* tadpole.c */
24extern void sun4c_probe_memerr_reg(void);
25 24
26static char *cpu_mid_prop(void) 25static char *cpu_mid_prop(void)
27{ 26{
@@ -139,7 +138,4 @@ void __init device_scan(void)
139 auxio_power_probe(); 138 auxio_power_probe();
140 } 139 }
141 clock_stop_probe(); 140 clock_stop_probe();
142
143 if (ARCH_SUN4C)
144 sun4c_probe_memerr_reg();
145} 141}
diff --git a/arch/sparc/kernel/entry.S b/arch/sparc/kernel/entry.S
index e0e0b8109225..8abe65d3f729 100644
--- a/arch/sparc/kernel/entry.S
+++ b/arch/sparc/kernel/entry.S
@@ -17,7 +17,6 @@
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/psr.h> 18#include <asm/psr.h>
19#include <asm/vaddrs.h> 19#include <asm/vaddrs.h>
20#include <asm/memreg.h>
21#include <asm/page.h> 20#include <asm/page.h>
22#include <asm/pgtable.h> 21#include <asm/pgtable.h>
23#include <asm/pgtsun4c.h> 22#include <asm/pgtsun4c.h>
@@ -829,253 +828,6 @@ vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
829 .globl vac_hwflush_patch2 828 .globl vac_hwflush_patch2
830 829
831 .align 4 830 .align 4
832 .globl sun4c_fault
833
834! %l0 = %psr
835! %l1 = %pc
836! %l2 = %npc
837! %l3 = %wim
838! %l7 = 1 for textfault
839! We want error in %l5, vaddr in %l6
840sun4c_fault:
841 sethi %hi(AC_SYNC_ERR), %l4
842 add %l4, 0x4, %l6 ! AC_SYNC_VA in %l6
843 lda [%l6] ASI_CONTROL, %l5 ! Address
844 lda [%l4] ASI_CONTROL, %l6 ! Error, retained for a bit
845
846 andn %l5, 0xfff, %l5 ! Encode all info into l7
847 srl %l6, 14, %l4
848
849 and %l4, 2, %l4
850 or %l5, %l4, %l4
851
852 or %l4, %l7, %l7 ! l7 = [addr,write,txtfault]
853
854 andcc %l0, PSR_PS, %g0
855 be sun4c_fault_fromuser
856 andcc %l7, 1, %g0 ! Text fault?
857
858 be 1f
859 sethi %hi(KERNBASE), %l4
860
861 mov %l1, %l5 ! PC
862
8631:
864 cmp %l5, %l4
865 blu sun4c_fault_fromuser
866 sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4
867
868 /* If the kernel references a bum kernel pointer, or a pte which
869 * points to a non existent page in ram, we will run this code
870 * _forever_ and lock up the machine!!!!! So we must check for
871 * this condition, the AC_SYNC_ERR bits are what we must examine.
872 * Also a parity error would make this happen as well. So we just
873 * check that we are in fact servicing a tlb miss and not some
874 * other type of fault for the kernel.
875 */
876 andcc %l6, 0x80, %g0
877 be sun4c_fault_fromuser
878 and %l5, %l4, %l5
879
880 /* Test for NULL pte_t * in vmalloc area. */
881 sethi %hi(VMALLOC_START), %l4
882 cmp %l5, %l4
883 blu,a invalid_segment_patch1
884 lduXa [%l5] ASI_SEGMAP, %l4
885
886 sethi %hi(swapper_pg_dir), %l4
887 srl %l5, SUN4C_PGDIR_SHIFT, %l6
888 or %l4, %lo(swapper_pg_dir), %l4
889 sll %l6, 2, %l6
890 ld [%l4 + %l6], %l4
891 andcc %l4, PAGE_MASK, %g0
892 be sun4c_fault_fromuser
893 lduXa [%l5] ASI_SEGMAP, %l4
894
895invalid_segment_patch1:
896 cmp %l4, 0x7f
897 bne 1f
898 sethi %hi(sun4c_kfree_ring), %l4
899 or %l4, %lo(sun4c_kfree_ring), %l4
900 ld [%l4 + 0x18], %l3
901 deccc %l3 ! do we have a free entry?
902 bcs,a 2f ! no, unmap one.
903 sethi %hi(sun4c_kernel_ring), %l4
904
905 st %l3, [%l4 + 0x18] ! sun4c_kfree_ring.num_entries--
906
907 ld [%l4 + 0x00], %l6 ! entry = sun4c_kfree_ring.ringhd.next
908 st %l5, [%l6 + 0x08] ! entry->vaddr = address
909
910 ld [%l6 + 0x00], %l3 ! next = entry->next
911 ld [%l6 + 0x04], %l7 ! entry->prev
912
913 st %l7, [%l3 + 0x04] ! next->prev = entry->prev
914 st %l3, [%l7 + 0x00] ! entry->prev->next = next
915
916 sethi %hi(sun4c_kernel_ring), %l4
917 or %l4, %lo(sun4c_kernel_ring), %l4
918 ! head = &sun4c_kernel_ring.ringhd
919
920 ld [%l4 + 0x00], %l7 ! head->next
921
922 st %l4, [%l6 + 0x04] ! entry->prev = head
923 st %l7, [%l6 + 0x00] ! entry->next = head->next
924 st %l6, [%l7 + 0x04] ! head->next->prev = entry
925
926 st %l6, [%l4 + 0x00] ! head->next = entry
927
928 ld [%l4 + 0x18], %l3
929 inc %l3 ! sun4c_kernel_ring.num_entries++
930 st %l3, [%l4 + 0x18]
931 b 4f
932 ld [%l6 + 0x08], %l5
933
9342:
935 or %l4, %lo(sun4c_kernel_ring), %l4
936 ! head = &sun4c_kernel_ring.ringhd
937
938 ld [%l4 + 0x04], %l6 ! entry = head->prev
939
940 ld [%l6 + 0x08], %l3 ! tmp = entry->vaddr
941
942 ! Flush segment from the cache.
943 sethi %hi((64 * 1024)), %l7
9449:
945vac_hwflush_patch1:
946vac_linesize_patch:
947 subcc %l7, 16, %l7
948 bne 9b
949vac_hwflush_patch2:
950 sta %g0, [%l3 + %l7] ASI_FLUSHSEG
951
952 st %l5, [%l6 + 0x08] ! entry->vaddr = address
953
954 ld [%l6 + 0x00], %l5 ! next = entry->next
955 ld [%l6 + 0x04], %l7 ! entry->prev
956
957 st %l7, [%l5 + 0x04] ! next->prev = entry->prev
958 st %l5, [%l7 + 0x00] ! entry->prev->next = next
959 st %l4, [%l6 + 0x04] ! entry->prev = head
960
961 ld [%l4 + 0x00], %l7 ! head->next
962
963 st %l7, [%l6 + 0x00] ! entry->next = head->next
964 st %l6, [%l7 + 0x04] ! head->next->prev = entry
965 st %l6, [%l4 + 0x00] ! head->next = entry
966
967 mov %l3, %l5 ! address = tmp
968
9694:
970num_context_patch1:
971 mov 0x08, %l7
972
973 ld [%l6 + 0x08], %l4
974 ldub [%l6 + 0x0c], %l3
975 or %l4, %l3, %l4 ! encode new vaddr/pseg into l4
976
977 sethi %hi(AC_CONTEXT), %l3
978 lduba [%l3] ASI_CONTROL, %l6
979
980 /* Invalidate old mapping, instantiate new mapping,
981 * for each context. Registers l6/l7 are live across
982 * this loop.
983 */
9843: deccc %l7
985 sethi %hi(AC_CONTEXT), %l3
986 stba %l7, [%l3] ASI_CONTROL
987invalid_segment_patch2:
988 mov 0x7f, %l3
989 stXa %l3, [%l5] ASI_SEGMAP
990 andn %l4, 0x1ff, %l3
991 bne 3b
992 stXa %l4, [%l3] ASI_SEGMAP
993
994 sethi %hi(AC_CONTEXT), %l3
995 stba %l6, [%l3] ASI_CONTROL
996
997 andn %l4, 0x1ff, %l5
998
9991:
1000 sethi %hi(VMALLOC_START), %l4
1001 cmp %l5, %l4
1002
1003 bgeu 1f
1004 mov 1 << (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7
1005
1006 sethi %hi(KERNBASE), %l6
1007
1008 sub %l5, %l6, %l4
1009 srl %l4, PAGE_SHIFT, %l4
1010 sethi %hi((SUN4C_PAGE_KERNEL & 0xf4000000)), %l3
1011 or %l3, %l4, %l3
1012
1013 sethi %hi(PAGE_SIZE), %l4
1014
10152:
1016 sta %l3, [%l5] ASI_PTE
1017 deccc %l7
1018 inc %l3
1019 bne 2b
1020 add %l5, %l4, %l5
1021
1022 b 7f
1023 sethi %hi(sun4c_kernel_faults), %l4
1024
10251:
1026 srl %l5, SUN4C_PGDIR_SHIFT, %l3
1027 sethi %hi(swapper_pg_dir), %l4
1028 or %l4, %lo(swapper_pg_dir), %l4
1029 sll %l3, 2, %l3
1030 ld [%l4 + %l3], %l4
1031 and %l4, PAGE_MASK, %l4
1032
1033 srl %l5, (PAGE_SHIFT - 2), %l6
1034 and %l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
1035 add %l6, %l4, %l6
1036
1037 sethi %hi(PAGE_SIZE), %l4
1038
10392:
1040 ld [%l6], %l3
1041 deccc %l7
1042 sta %l3, [%l5] ASI_PTE
1043 add %l6, 0x4, %l6
1044 bne 2b
1045 add %l5, %l4, %l5
1046
1047 sethi %hi(sun4c_kernel_faults), %l4
10487:
1049 ld [%l4 + %lo(sun4c_kernel_faults)], %l3
1050 inc %l3
1051 st %l3, [%l4 + %lo(sun4c_kernel_faults)]
1052
1053 /* Restore condition codes */
1054 wr %l0, 0x0, %psr
1055 WRITE_PAUSE
1056 jmp %l1
1057 rett %l2
1058
1059sun4c_fault_fromuser:
1060 SAVE_ALL
1061 nop
1062
1063 mov %l7, %o1 ! Decode the info from %l7
1064 mov %l7, %o2
1065 and %o1, 1, %o1 ! arg2 = text_faultp
1066 mov %l7, %o3
1067 and %o2, 2, %o2 ! arg3 = writep
1068 andn %o3, 0xfff, %o3 ! arg4 = faulting address
1069
1070 wr %l0, PSR_ET, %psr
1071 WRITE_PAUSE
1072
1073 call do_sun4c_fault
1074 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
1075
1076 RESTORE_ALL
1077
1078 .align 4
1079 .globl srmmu_fault 831 .globl srmmu_fault
1080srmmu_fault: 832srmmu_fault:
1081 mov 0x400, %l5 833 mov 0x400, %l5
diff --git a/arch/sparc/kernel/head_32.S b/arch/sparc/kernel/head_32.S
index 054a49f3044c..0e23ff36a419 100644
--- a/arch/sparc/kernel/head_32.S
+++ b/arch/sparc/kernel/head_32.S
@@ -84,7 +84,7 @@ trapbase_cpu0:
84#endif 84#endif
85/* We get control passed to us here at t_zero. */ 85/* We get control passed to us here at t_zero. */
86t_zero: b gokernel; nop; nop; nop; 86t_zero: b gokernel; nop; nop; nop;
87t_tflt: SPARC_TFAULT /* Inst. Access Exception */ 87t_tflt: SRMMU_TFAULT /* Inst. Access Exception */
88t_bins: TRAP_ENTRY(0x2, bad_instruction) /* Illegal Instruction */ 88t_bins: TRAP_ENTRY(0x2, bad_instruction) /* Illegal Instruction */
89t_pins: TRAP_ENTRY(0x3, priv_instruction) /* Privileged Instruction */ 89t_pins: TRAP_ENTRY(0x3, priv_instruction) /* Privileged Instruction */
90t_fpd: TRAP_ENTRY(0x4, fpd_trap_handler) /* Floating Point Disabled */ 90t_fpd: TRAP_ENTRY(0x4, fpd_trap_handler) /* Floating Point Disabled */
@@ -92,7 +92,7 @@ t_wovf: WINDOW_SPILL /* Window Overflow */
92t_wunf: WINDOW_FILL /* Window Underflow */ 92t_wunf: WINDOW_FILL /* Window Underflow */
93t_mna: TRAP_ENTRY(0x7, mna_handler) /* Memory Address Not Aligned */ 93t_mna: TRAP_ENTRY(0x7, mna_handler) /* Memory Address Not Aligned */
94t_fpe: TRAP_ENTRY(0x8, fpe_trap_handler) /* Floating Point Exception */ 94t_fpe: TRAP_ENTRY(0x8, fpe_trap_handler) /* Floating Point Exception */
95t_dflt: SPARC_DFAULT /* Data Miss Exception */ 95t_dflt: SRMMU_DFAULT /* Data Miss Exception */
96t_tio: TRAP_ENTRY(0xa, do_tag_overflow) /* Tagged Instruction Ovrflw */ 96t_tio: TRAP_ENTRY(0xa, do_tag_overflow) /* Tagged Instruction Ovrflw */
97t_wpt: TRAP_ENTRY(0xb, do_watchpoint) /* Watchpoint Detected */ 97t_wpt: TRAP_ENTRY(0xb, do_watchpoint) /* Watchpoint Detected */
98t_badc: BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10) 98t_badc: BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
@@ -120,7 +120,7 @@ t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled) /* Co-Processor Disabled */
120t_uflsh:SKIP_TRAP(0x25, unimp_flush) /* Unimplemented FLUSH inst. */ 120t_uflsh:SKIP_TRAP(0x25, unimp_flush) /* Unimplemented FLUSH inst. */
121t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27) 121t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
122t_cpexc:TRAP_ENTRY(0x28, do_cp_exception) /* Co-Processor Exception */ 122t_cpexc:TRAP_ENTRY(0x28, do_cp_exception) /* Co-Processor Exception */
123t_dacce:SPARC_DFAULT /* Data Access Error */ 123t_dacce:SRMMU_DFAULT /* Data Access Error */
124t_hwdz: TRAP_ENTRY(0x2a, do_hw_divzero) /* Division by zero, you lose... */ 124t_hwdz: TRAP_ENTRY(0x2a, do_hw_divzero) /* Division by zero, you lose... */
125t_dserr:BAD_TRAP(0x2b) /* Data Store Error */ 125t_dserr:BAD_TRAP(0x2b) /* Data Store Error */
126t_daccm:BAD_TRAP(0x2c) /* Data Access MMU-Miss */ 126t_daccm:BAD_TRAP(0x2c) /* Data Access MMU-Miss */
diff --git a/arch/sparc/kernel/setup_32.c b/arch/sparc/kernel/setup_32.c
index d444468b27f6..a2123adb2128 100644
--- a/arch/sparc/kernel/setup_32.c
+++ b/arch/sparc/kernel/setup_32.c
@@ -182,13 +182,6 @@ static void __init boot_flags_init(char *commands)
182 } 182 }
183} 183}
184 184
185/* This routine will in the future do all the nasty prom stuff
186 * to probe for the mmu type and its parameters, etc. This will
187 * also be where SMP things happen.
188 */
189
190extern void sun4c_probe_vac(void);
191
192extern unsigned short root_flags; 185extern unsigned short root_flags;
193extern unsigned short root_dev; 186extern unsigned short root_dev;
194extern unsigned short ram_flags; 187extern unsigned short ram_flags;
@@ -275,8 +268,6 @@ void __init setup_arch(char **cmdline_p)
275#endif 268#endif
276 269
277 idprom_init(); 270 idprom_init();
278 if (ARCH_SUN4C)
279 sun4c_probe_vac();
280 load_mmu(); 271 load_mmu();
281 272
282 phys_base = 0xffffffffUL; 273 phys_base = 0xffffffffUL;
diff --git a/arch/sparc/mm/Makefile b/arch/sparc/mm/Makefile
index 2e68054f97f5..697eab74c321 100644
--- a/arch/sparc/mm/Makefile
+++ b/arch/sparc/mm/Makefile
@@ -17,5 +17,3 @@ obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
17 17
18# Only used by sparc32 18# Only used by sparc32
19obj-$(CONFIG_HIGHMEM) += highmem.o 19obj-$(CONFIG_HIGHMEM) += highmem.o
20
21obj-$(CONFIG_SPARC32) += nosun4c.o
diff --git a/arch/sparc/mm/fault_32.c b/arch/sparc/mm/fault_32.c
index f3e6921712bb..734812105266 100644
--- a/arch/sparc/mm/fault_32.c
+++ b/arch/sparc/mm/fault_32.c
@@ -24,7 +24,6 @@
24 24
25#include <asm/page.h> 25#include <asm/page.h>
26#include <asm/pgtable.h> 26#include <asm/pgtable.h>
27#include <asm/memreg.h>
28#include <asm/openprom.h> 27#include <asm/openprom.h>
29#include <asm/oplib.h> 28#include <asm/oplib.h>
30#include <asm/smp.h> 29#include <asm/smp.h>
@@ -70,8 +69,6 @@ asmlinkage void sparc_lvl15_nmi(struct pt_regs *regs, unsigned long serr,
70 printk(" Synchronous Vaddr %08lx\n", svaddr); 69 printk(" Synchronous Vaddr %08lx\n", svaddr);
71 printk(" Asynchronous Error %08lx\n", aerr); 70 printk(" Asynchronous Error %08lx\n", aerr);
72 printk(" Asynchronous Vaddr %08lx\n", avaddr); 71 printk(" Asynchronous Vaddr %08lx\n", avaddr);
73 if (sun4c_memerr_reg)
74 printk(" Memory Parity Error %08lx\n", *sun4c_memerr_reg);
75 printk("REGISTER DUMP:\n"); 72 printk("REGISTER DUMP:\n");
76 show_regs(regs); 73 show_regs(regs);
77 prom_halt(); 74 prom_halt();
@@ -422,92 +419,6 @@ vmalloc_fault:
422 } 419 }
423} 420}
424 421
425asmlinkage void do_sun4c_fault(struct pt_regs *regs, int text_fault, int write,
426 unsigned long address)
427{
428 extern void sun4c_update_mmu_cache(struct vm_area_struct *,
429 unsigned long,pte_t *);
430 extern pte_t *sun4c_pte_offset_kernel(pmd_t *,unsigned long);
431 struct task_struct *tsk = current;
432 struct mm_struct *mm = tsk->mm;
433 pgd_t *pgdp;
434 pte_t *ptep;
435
436 if (text_fault) {
437 address = regs->pc;
438 } else if (!write &&
439 !(regs->psr & PSR_PS)) {
440 unsigned int insn, __user *ip;
441
442 ip = (unsigned int __user *)regs->pc;
443 if (!get_user(insn, ip)) {
444 if ((insn & 0xc1680000) == 0xc0680000)
445 write = 1;
446 }
447 }
448
449 if (!mm) {
450 /* We are oopsing. */
451 do_sparc_fault(regs, text_fault, write, address);
452 BUG(); /* P3 Oops already, you bitch */
453 }
454
455 pgdp = pgd_offset(mm, address);
456 ptep = sun4c_pte_offset_kernel((pmd_t *) pgdp, address);
457
458 if (pgd_val(*pgdp)) {
459 if (write) {
460 if ((pte_val(*ptep) & (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_PRESENT))
461 == (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_PRESENT)) {
462 unsigned long flags;
463
464 *ptep = __pte(pte_val(*ptep) | _SUN4C_PAGE_ACCESSED |
465 _SUN4C_PAGE_MODIFIED |
466 _SUN4C_PAGE_VALID |
467 _SUN4C_PAGE_DIRTY);
468
469 local_irq_save(flags);
470 if (sun4c_get_segmap(address) != invalid_segment) {
471 sun4c_put_pte(address, pte_val(*ptep));
472 local_irq_restore(flags);
473 return;
474 }
475 local_irq_restore(flags);
476 }
477 } else {
478 if ((pte_val(*ptep) & (_SUN4C_PAGE_READ|_SUN4C_PAGE_PRESENT))
479 == (_SUN4C_PAGE_READ|_SUN4C_PAGE_PRESENT)) {
480 unsigned long flags;
481
482 *ptep = __pte(pte_val(*ptep) | _SUN4C_PAGE_ACCESSED |
483 _SUN4C_PAGE_VALID);
484
485 local_irq_save(flags);
486 if (sun4c_get_segmap(address) != invalid_segment) {
487 sun4c_put_pte(address, pte_val(*ptep));
488 local_irq_restore(flags);
489 return;
490 }
491 local_irq_restore(flags);
492 }
493 }
494 }
495
496 /* This conditional is 'interesting'. */
497 if (pgd_val(*pgdp) && !(write && !(pte_val(*ptep) & _SUN4C_PAGE_WRITE))
498 && (pte_val(*ptep) & _SUN4C_PAGE_VALID))
499 /* Note: It is safe to not grab the MMAP semaphore here because
500 * we know that update_mmu_cache() will not sleep for
501 * any reason (at least not in the current implementation)
502 * and therefore there is no danger of another thread getting
503 * on the CPU and doing a shrink_mmap() on this vma.
504 */
505 sun4c_update_mmu_cache (find_vma(current->mm, address), address,
506 ptep);
507 else
508 do_sparc_fault(regs, text_fault, write, address);
509}
510
511/* This always deals with user addresses. */ 422/* This always deals with user addresses. */
512static void force_user_fault(unsigned long address, int write) 423static void force_user_fault(unsigned long address, int write)
513{ 424{
diff --git a/arch/sparc/mm/nosun4c.c b/arch/sparc/mm/nosun4c.c
deleted file mode 100644
index 0e0e8cfd21aa..000000000000
--- a/arch/sparc/mm/nosun4c.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * nosun4c.c: This file is a bunch of dummies for SMP compiles,
3 * so that it does not need sun4c and avoid ifdefs.
4 *
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 */
7
8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/init.h>
11#include <asm/pgtable.h>
12
13static char shouldnothappen[] __initdata = "32bit SMP kernel only supports sun4m and sun4d\n";
14
15/* Dummies */
16struct sun4c_mmu_ring {
17 unsigned long xxx1[3];
18 unsigned char xxx2[2];
19 int xxx3;
20};
21struct sun4c_mmu_ring sun4c_kernel_ring;
22struct sun4c_mmu_ring sun4c_kfree_ring;
23unsigned long sun4c_kernel_faults;
24unsigned long *sun4c_memerr_reg;
25
26static void __init should_not_happen(void)
27{
28 prom_printf(shouldnothappen);
29 prom_halt();
30}
31
32pte_t *sun4c_pte_offset(pmd_t * dir, unsigned long address)
33{
34 return NULL;
35}
36
37pte_t *sun4c_pte_offset_kernel(pmd_t *dir, unsigned long address)
38{
39 return NULL;
40}
41
42void sun4c_update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
43{
44}
45
46void __init sun4c_probe_vac(void)
47{
48 should_not_happen();
49}
50
51void __init sun4c_probe_memerr_reg(void)
52{
53 should_not_happen();
54}
diff --git a/arch/sparc/mm/srmmu.c b/arch/sparc/mm/srmmu.c
index f37fbb24458b..7fd4cc395cf8 100644
--- a/arch/sparc/mm/srmmu.c
+++ b/arch/sparc/mm/srmmu.c
@@ -2134,8 +2134,6 @@ extern unsigned long spwin_mmu_patchme, fwin_mmu_patchme,
2134extern unsigned long spwin_srmmu_stackchk, srmmu_fwin_stackchk, 2134extern unsigned long spwin_srmmu_stackchk, srmmu_fwin_stackchk,
2135 tsetup_srmmu_stackchk, srmmu_rett_stackchk; 2135 tsetup_srmmu_stackchk, srmmu_rett_stackchk;
2136 2136
2137extern unsigned long srmmu_fault;
2138
2139#define PATCH_BRANCH(insn, dest) do { \ 2137#define PATCH_BRANCH(insn, dest) do { \
2140 iaddr = &(insn); \ 2138 iaddr = &(insn); \
2141 daddr = &(dest); \ 2139 daddr = &(dest); \
@@ -2150,9 +2148,6 @@ static void __init patch_window_trap_handlers(void)
2150 PATCH_BRANCH(fwin_mmu_patchme, srmmu_fwin_stackchk); 2148 PATCH_BRANCH(fwin_mmu_patchme, srmmu_fwin_stackchk);
2151 PATCH_BRANCH(tsetup_mmu_patchme, tsetup_srmmu_stackchk); 2149 PATCH_BRANCH(tsetup_mmu_patchme, tsetup_srmmu_stackchk);
2152 PATCH_BRANCH(rtrap_mmu_patchme, srmmu_rett_stackchk); 2150 PATCH_BRANCH(rtrap_mmu_patchme, srmmu_rett_stackchk);
2153 PATCH_BRANCH(sparc_ttable[SP_TRAP_TFLT].inst_three, srmmu_fault);
2154 PATCH_BRANCH(sparc_ttable[SP_TRAP_DFLT].inst_three, srmmu_fault);
2155 PATCH_BRANCH(sparc_ttable[SP_TRAP_DACC].inst_three, srmmu_fault);
2156} 2151}
2157 2152
2158#ifdef CONFIG_SMP 2153#ifdef CONFIG_SMP