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authorNick Kossifidis <mickflemm@gmail.com>2010-11-23 14:09:11 -0500
committerJohn W. Linville <linville@tuxdriver.com>2010-11-30 13:52:35 -0500
commit3017fcab416d8d1ee48ca16aa9a3062f600dab8e (patch)
tree8f6daedc2060c20a0a1a569e8e782991cd28f2a6
parent25ddfa195735934256fda55bb4f2d749c19386ff (diff)
ath5k: Extend get_default_sifs/slot_time
* Extend get_default_sifs/slot_time to include timings for turbo half and quarter rate modes. * AR5210 code for now uses timings already on core clock units instead of usecs so rename them (we 'll clean it up later). Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h24
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c52
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c16
3 files changed, 68 insertions, 24 deletions
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index 005cad025170..e11fc8f39192 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -226,16 +226,16 @@
226#define AR5K_INIT_USEC 39 226#define AR5K_INIT_USEC 39
227#define AR5K_INIT_USEC_TURBO 79 227#define AR5K_INIT_USEC_TURBO 79
228#define AR5K_INIT_USEC_32 31 228#define AR5K_INIT_USEC_32 31
229#define AR5K_INIT_SLOT_TIME 396 229#define AR5K_INIT_SLOT_TIME_CLOCK 396
230#define AR5K_INIT_SLOT_TIME_TURBO 480 230#define AR5K_INIT_SLOT_TIME_TURBO_CLOCK 480
231#define AR5K_INIT_ACK_CTS_TIMEOUT 1024 231#define AR5K_INIT_ACK_CTS_TIMEOUT 1024
232#define AR5K_INIT_ACK_CTS_TIMEOUT_TURBO 0x08000800 232#define AR5K_INIT_ACK_CTS_TIMEOUT_TURBO 0x08000800
233#define AR5K_INIT_PROG_IFS 920 233#define AR5K_INIT_PROG_IFS 920
234#define AR5K_INIT_PROG_IFS_TURBO 960 234#define AR5K_INIT_PROG_IFS_TURBO 960
235#define AR5K_INIT_EIFS 3440 235#define AR5K_INIT_EIFS 3440
236#define AR5K_INIT_EIFS_TURBO 6880 236#define AR5K_INIT_EIFS_TURBO 6880
237#define AR5K_INIT_SIFS 560 237#define AR5K_INIT_SIFS_CLOCK 560
238#define AR5K_INIT_SIFS_TURBO 480 238#define AR5K_INIT_SIFS_TURBO_CLOCK 480
239#define AR5K_INIT_SH_RETRY 10 239#define AR5K_INIT_SH_RETRY 10
240#define AR5K_INIT_LG_RETRY AR5K_INIT_SH_RETRY 240#define AR5K_INIT_LG_RETRY AR5K_INIT_SH_RETRY
241#define AR5K_INIT_SSH_RETRY 32 241#define AR5K_INIT_SSH_RETRY 32
@@ -251,6 +251,22 @@
251 (AR5K_INIT_PROG_IFS_TURBO) \ 251 (AR5K_INIT_PROG_IFS_TURBO) \
252) 252)
253 253
254/* Slot time */
255#define AR5K_INIT_SLOT_TIME_TURBO 6
256#define AR5K_INIT_SLOT_TIME_DEFAULT 9
257#define AR5K_INIT_SLOT_TIME_HALF_RATE 13
258#define AR5K_INIT_SLOT_TIME_QUARTER_RATE 21
259#define AR5K_INIT_SLOT_TIME_B 20
260#define AR5K_SLOT_TIME_MAX 0xffff
261
262/* SIFS */
263#define AR5K_INIT_SIFS_TURBO 6
264/* XXX: 8 from initvals 10 from standard */
265#define AR5K_INIT_SIFS_DEFAULT_BG 8
266#define AR5K_INIT_SIFS_DEFAULT_A 16
267#define AR5K_INIT_SIFS_HALF_RATE 32
268#define AR5K_INIT_SIFS_QUARTER_RATE 64
269
254/* Rx latency for 5 and 10MHz operation (max ?) */ 270/* Rx latency for 5 and 10MHz operation (max ?) */
255#define AR5K_INIT_RX_LAT_MAX 63 271#define AR5K_INIT_RX_LAT_MAX 63
256/* Tx latencies from initvals (5212 only but no problem 272/* Tx latencies from initvals (5212 only but no problem
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 2c2ea1539849..2118f7048f37 100644
--- a/drivers/net/wireless/ath/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -43,14 +43,27 @@
43static unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah) 43static unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
44{ 44{
45 struct ieee80211_channel *channel = ah->ah_current_channel; 45 struct ieee80211_channel *channel = ah->ah_current_channel;
46 unsigned int slot_time;
46 47
47 if (channel->hw_value & CHANNEL_TURBO) 48 switch (ah->ah_bwmode) {
48 return 6; /* both turbo modes */ 49 case AR5K_BWMODE_40MHZ:
49 50 slot_time = AR5K_INIT_SLOT_TIME_TURBO;
50 if (channel->hw_value & CHANNEL_CCK) 51 break;
51 return 20; /* 802.11b */ 52 case AR5K_BWMODE_10MHZ:
53 slot_time = AR5K_INIT_SLOT_TIME_HALF_RATE;
54 break;
55 case AR5K_BWMODE_5MHZ:
56 slot_time = AR5K_INIT_SLOT_TIME_QUARTER_RATE;
57 break;
58 case AR5K_BWMODE_DEFAULT:
59 slot_time = AR5K_INIT_SLOT_TIME_DEFAULT;
60 default:
61 if (channel->hw_value & CHANNEL_CCK)
62 slot_time = AR5K_INIT_SLOT_TIME_B;
63 break;
64 }
52 65
53 return 9; /* 802.11 a/g */ 66 return slot_time;
54} 67}
55 68
56/** 69/**
@@ -58,17 +71,30 @@ static unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
58 * 71 *
59 * @ah: The &struct ath5k_hw 72 * @ah: The &struct ath5k_hw
60 */ 73 */
61static unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah) 74unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
62{ 75{
63 struct ieee80211_channel *channel = ah->ah_current_channel; 76 struct ieee80211_channel *channel = ah->ah_current_channel;
77 unsigned int sifs;
64 78
65 if (channel->hw_value & CHANNEL_TURBO) 79 switch (ah->ah_bwmode) {
66 return 8; /* both turbo modes */ 80 case AR5K_BWMODE_40MHZ:
67 81 sifs = AR5K_INIT_SIFS_TURBO;
68 if (channel->hw_value & CHANNEL_5GHZ) 82 break;
69 return 16; /* 802.11a */ 83 case AR5K_BWMODE_10MHZ:
84 sifs = AR5K_INIT_SIFS_HALF_RATE;
85 break;
86 case AR5K_BWMODE_5MHZ:
87 sifs = AR5K_INIT_SIFS_QUARTER_RATE;
88 break;
89 case AR5K_BWMODE_DEFAULT:
90 sifs = AR5K_INIT_SIFS_DEFAULT_BG;
91 default:
92 if (channel->hw_value & CHANNEL_5GHZ)
93 sifs = AR5K_INIT_SIFS_DEFAULT_A;
94 break;
95 }
70 96
71 return 10; /* 802.11 b/g */ 97 return sifs;
72} 98}
73 99
74/** 100/**
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
index c422d5c92d46..6eb6838d906d 100644
--- a/drivers/net/wireless/ath/ath5k/qcu.c
+++ b/drivers/net/wireless/ath/ath5k/qcu.c
@@ -297,7 +297,8 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
297 297
298 /* Set Slot time */ 298 /* Set Slot time */
299 ath5k_hw_reg_write(ah, (ah->ah_bwmode == AR5K_BWMODE_40MHZ) ? 299 ath5k_hw_reg_write(ah, (ah->ah_bwmode == AR5K_BWMODE_40MHZ) ?
300 AR5K_INIT_SLOT_TIME_TURBO : AR5K_INIT_SLOT_TIME, 300 AR5K_INIT_SLOT_TIME_TURBO_CLOCK :
301 AR5K_INIT_SLOT_TIME_CLOCK,
301 AR5K_SLOT_TIME); 302 AR5K_SLOT_TIME);
302 /* Set ACK_CTS timeout */ 303 /* Set ACK_CTS timeout */
303 ath5k_hw_reg_write(ah, (ah->ah_bwmode == AR5K_BWMODE_40MHZ) ? 304 ath5k_hw_reg_write(ah, (ah->ah_bwmode == AR5K_BWMODE_40MHZ) ?
@@ -306,15 +307,16 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
306 307
307 /* Set IFS0 */ 308 /* Set IFS0 */
308 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) { 309 if (ah->ah_bwmode == AR5K_BWMODE_40MHZ) {
309 ath5k_hw_reg_write(ah, ((AR5K_INIT_SIFS_TURBO + 310 ath5k_hw_reg_write(ah, ((AR5K_INIT_SIFS_TURBO_CLOCK +
310 tq->tqi_aifs * AR5K_INIT_SLOT_TIME_TURBO) << 311 tq->tqi_aifs * AR5K_INIT_SLOT_TIME_TURBO_CLOCK)
311 AR5K_IFS0_DIFS_S) | AR5K_INIT_SIFS_TURBO, 312 << AR5K_IFS0_DIFS_S) |
313 AR5K_INIT_SIFS_TURBO_CLOCK,
312 AR5K_IFS0); 314 AR5K_IFS0);
313 } else { 315 } else {
314 ath5k_hw_reg_write(ah, ((AR5K_INIT_SIFS + 316 ath5k_hw_reg_write(ah, ((AR5K_INIT_SIFS_CLOCK +
315 tq->tqi_aifs * AR5K_INIT_SLOT_TIME) << 317 tq->tqi_aifs * AR5K_INIT_SLOT_TIME_CLOCK) <<
316 AR5K_IFS0_DIFS_S) | 318 AR5K_IFS0_DIFS_S) |
317 AR5K_INIT_SIFS, AR5K_IFS0); 319 AR5K_INIT_SIFS_CLOCK, AR5K_IFS0);
318 } 320 }
319 321
320 /* Set IFS1 */ 322 /* Set IFS1 */