diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-15 03:42:11 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-01-15 03:42:11 -0500 |
commit | 2e67c56248b776c0a546925c796cdb167ee4d7a0 (patch) | |
tree | 1532ff3d2a452ed52b732fba9878846494e863e1 | |
parent | 1a60864fc1c3b268a921549bcfc707c98083260b (diff) | |
parent | 74e72f894d56eb9d2e1218530c658e7d297e002b (diff) |
Merge branch 'akpm' (incoming from Andrew)
Merge patches from Andrew Morton:
"Six fixes"
* emailed patches from Andrew Morton <akpm@linux-foundation.org>:
lib/percpu_counter.c: fix __percpu_counter_add()
crash_dump: fix compilation error (on MIPS at least)
mm: fix crash when using XFS on loopback
MIPS: fix blast_icache32 on loongson2
MIPS: fix case mismatch in local_r4k_flush_icache_range()
nilfs2: fix segctor bug that causes file system corruption
-rw-r--r-- | arch/mips/include/asm/cacheops.h | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/r4kcache.h | 51 | ||||
-rw-r--r-- | arch/mips/mm/c-r4k.c | 11 | ||||
-rw-r--r-- | fs/nilfs2/segment.c | 10 | ||||
-rw-r--r-- | include/linux/crash_dump.h | 2 | ||||
-rw-r--r-- | lib/percpu_counter.c | 4 | ||||
-rw-r--r-- | mm/util.c | 5 |
7 files changed, 50 insertions, 35 deletions
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h index c75025f27c20..06b9bc7ea14b 100644 --- a/arch/mips/include/asm/cacheops.h +++ b/arch/mips/include/asm/cacheops.h | |||
@@ -83,6 +83,6 @@ | |||
83 | /* | 83 | /* |
84 | * Loongson2-specific cacheops | 84 | * Loongson2-specific cacheops |
85 | */ | 85 | */ |
86 | #define Hit_Invalidate_I_Loongson23 0x00 | 86 | #define Hit_Invalidate_I_Loongson2 0x00 |
87 | 87 | ||
88 | #endif /* __ASM_CACHEOPS_H */ | 88 | #endif /* __ASM_CACHEOPS_H */ |
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h index 34d1a1917125..c84caddb8bde 100644 --- a/arch/mips/include/asm/r4kcache.h +++ b/arch/mips/include/asm/r4kcache.h | |||
@@ -165,7 +165,7 @@ static inline void flush_icache_line(unsigned long addr) | |||
165 | __iflush_prologue | 165 | __iflush_prologue |
166 | switch (boot_cpu_type()) { | 166 | switch (boot_cpu_type()) { |
167 | case CPU_LOONGSON2: | 167 | case CPU_LOONGSON2: |
168 | cache_op(Hit_Invalidate_I_Loongson23, addr); | 168 | cache_op(Hit_Invalidate_I_Loongson2, addr); |
169 | break; | 169 | break; |
170 | 170 | ||
171 | default: | 171 | default: |
@@ -219,7 +219,7 @@ static inline void protected_flush_icache_line(unsigned long addr) | |||
219 | { | 219 | { |
220 | switch (boot_cpu_type()) { | 220 | switch (boot_cpu_type()) { |
221 | case CPU_LOONGSON2: | 221 | case CPU_LOONGSON2: |
222 | protected_cache_op(Hit_Invalidate_I_Loongson23, addr); | 222 | protected_cache_op(Hit_Invalidate_I_Loongson2, addr); |
223 | break; | 223 | break; |
224 | 224 | ||
225 | default: | 225 | default: |
@@ -357,8 +357,8 @@ static inline void invalidate_tcache_page(unsigned long addr) | |||
357 | "i" (op)); | 357 | "i" (op)); |
358 | 358 | ||
359 | /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */ | 359 | /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */ |
360 | #define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize) \ | 360 | #define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, extra) \ |
361 | static inline void blast_##pfx##cache##lsize(void) \ | 361 | static inline void extra##blast_##pfx##cache##lsize(void) \ |
362 | { \ | 362 | { \ |
363 | unsigned long start = INDEX_BASE; \ | 363 | unsigned long start = INDEX_BASE; \ |
364 | unsigned long end = start + current_cpu_data.desc.waysize; \ | 364 | unsigned long end = start + current_cpu_data.desc.waysize; \ |
@@ -376,7 +376,7 @@ static inline void blast_##pfx##cache##lsize(void) \ | |||
376 | __##pfx##flush_epilogue \ | 376 | __##pfx##flush_epilogue \ |
377 | } \ | 377 | } \ |
378 | \ | 378 | \ |
379 | static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \ | 379 | static inline void extra##blast_##pfx##cache##lsize##_page(unsigned long page) \ |
380 | { \ | 380 | { \ |
381 | unsigned long start = page; \ | 381 | unsigned long start = page; \ |
382 | unsigned long end = page + PAGE_SIZE; \ | 382 | unsigned long end = page + PAGE_SIZE; \ |
@@ -391,7 +391,7 @@ static inline void blast_##pfx##cache##lsize##_page(unsigned long page) \ | |||
391 | __##pfx##flush_epilogue \ | 391 | __##pfx##flush_epilogue \ |
392 | } \ | 392 | } \ |
393 | \ | 393 | \ |
394 | static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \ | 394 | static inline void extra##blast_##pfx##cache##lsize##_page_indexed(unsigned long page) \ |
395 | { \ | 395 | { \ |
396 | unsigned long indexmask = current_cpu_data.desc.waysize - 1; \ | 396 | unsigned long indexmask = current_cpu_data.desc.waysize - 1; \ |
397 | unsigned long start = INDEX_BASE + (page & indexmask); \ | 397 | unsigned long start = INDEX_BASE + (page & indexmask); \ |
@@ -410,23 +410,24 @@ static inline void blast_##pfx##cache##lsize##_page_indexed(unsigned long page) | |||
410 | __##pfx##flush_epilogue \ | 410 | __##pfx##flush_epilogue \ |
411 | } | 411 | } |
412 | 412 | ||
413 | __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) | 413 | __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, ) |
414 | __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16) | 414 | __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, ) |
415 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16) | 415 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, ) |
416 | __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) | 416 | __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, ) |
417 | __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32) | 417 | __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, ) |
418 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32) | 418 | __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I_Loongson2, 32, loongson2_) |
419 | __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64) | 419 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, ) |
420 | __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) | 420 | __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, ) |
421 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64) | 421 | __BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, ) |
422 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) | 422 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, ) |
423 | 423 | __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, ) | |
424 | __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) | 424 | |
425 | __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32) | 425 | __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, ) |
426 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16) | 426 | __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, ) |
427 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32) | 427 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, ) |
428 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64) | 428 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, ) |
429 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128) | 429 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, ) |
430 | __BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, ) | ||
430 | 431 | ||
431 | /* build blast_xxx_range, protected_blast_xxx_range */ | 432 | /* build blast_xxx_range, protected_blast_xxx_range */ |
432 | #define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \ | 433 | #define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, extra) \ |
@@ -452,8 +453,8 @@ static inline void prot##extra##blast_##pfx##cache##_range(unsigned long start, | |||
452 | __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, ) | 453 | __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, ) |
453 | __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, ) | 454 | __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_, ) |
454 | __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, ) | 455 | __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_, ) |
455 | __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson23, \ | 456 | __BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I_Loongson2, \ |
456 | protected_, loongson23_) | 457 | protected_, loongson2_) |
457 | __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , ) | 458 | __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, , ) |
458 | __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , ) | 459 | __BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, , ) |
459 | /* blast_inv_dcache_range */ | 460 | /* blast_inv_dcache_range */ |
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 62ffd20ea869..49e572d879e1 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c | |||
@@ -237,6 +237,8 @@ static void r4k_blast_icache_page_setup(void) | |||
237 | r4k_blast_icache_page = (void *)cache_noop; | 237 | r4k_blast_icache_page = (void *)cache_noop; |
238 | else if (ic_lsize == 16) | 238 | else if (ic_lsize == 16) |
239 | r4k_blast_icache_page = blast_icache16_page; | 239 | r4k_blast_icache_page = blast_icache16_page; |
240 | else if (ic_lsize == 32 && current_cpu_type() == CPU_LOONGSON2) | ||
241 | r4k_blast_icache_page = loongson2_blast_icache32_page; | ||
240 | else if (ic_lsize == 32) | 242 | else if (ic_lsize == 32) |
241 | r4k_blast_icache_page = blast_icache32_page; | 243 | r4k_blast_icache_page = blast_icache32_page; |
242 | else if (ic_lsize == 64) | 244 | else if (ic_lsize == 64) |
@@ -261,6 +263,9 @@ static void r4k_blast_icache_page_indexed_setup(void) | |||
261 | else if (TX49XX_ICACHE_INDEX_INV_WAR) | 263 | else if (TX49XX_ICACHE_INDEX_INV_WAR) |
262 | r4k_blast_icache_page_indexed = | 264 | r4k_blast_icache_page_indexed = |
263 | tx49_blast_icache32_page_indexed; | 265 | tx49_blast_icache32_page_indexed; |
266 | else if (current_cpu_type() == CPU_LOONGSON2) | ||
267 | r4k_blast_icache_page_indexed = | ||
268 | loongson2_blast_icache32_page_indexed; | ||
264 | else | 269 | else |
265 | r4k_blast_icache_page_indexed = | 270 | r4k_blast_icache_page_indexed = |
266 | blast_icache32_page_indexed; | 271 | blast_icache32_page_indexed; |
@@ -284,6 +289,8 @@ static void r4k_blast_icache_setup(void) | |||
284 | r4k_blast_icache = blast_r4600_v1_icache32; | 289 | r4k_blast_icache = blast_r4600_v1_icache32; |
285 | else if (TX49XX_ICACHE_INDEX_INV_WAR) | 290 | else if (TX49XX_ICACHE_INDEX_INV_WAR) |
286 | r4k_blast_icache = tx49_blast_icache32; | 291 | r4k_blast_icache = tx49_blast_icache32; |
292 | else if (current_cpu_type() == CPU_LOONGSON2) | ||
293 | r4k_blast_icache = loongson2_blast_icache32; | ||
287 | else | 294 | else |
288 | r4k_blast_icache = blast_icache32; | 295 | r4k_blast_icache = blast_icache32; |
289 | } else if (ic_lsize == 64) | 296 | } else if (ic_lsize == 64) |
@@ -580,11 +587,11 @@ static inline void local_r4k_flush_icache_range(unsigned long start, unsigned lo | |||
580 | else { | 587 | else { |
581 | switch (boot_cpu_type()) { | 588 | switch (boot_cpu_type()) { |
582 | case CPU_LOONGSON2: | 589 | case CPU_LOONGSON2: |
583 | protected_blast_icache_range(start, end); | 590 | protected_loongson2_blast_icache_range(start, end); |
584 | break; | 591 | break; |
585 | 592 | ||
586 | default: | 593 | default: |
587 | protected_loongson23_blast_icache_range(start, end); | 594 | protected_blast_icache_range(start, end); |
588 | break; | 595 | break; |
589 | } | 596 | } |
590 | } | 597 | } |
diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c index 9f6b486b6c01..a1a191634abc 100644 --- a/fs/nilfs2/segment.c +++ b/fs/nilfs2/segment.c | |||
@@ -1440,17 +1440,19 @@ static int nilfs_segctor_collect(struct nilfs_sc_info *sci, | |||
1440 | 1440 | ||
1441 | nilfs_clear_logs(&sci->sc_segbufs); | 1441 | nilfs_clear_logs(&sci->sc_segbufs); |
1442 | 1442 | ||
1443 | err = nilfs_segctor_extend_segments(sci, nilfs, nadd); | ||
1444 | if (unlikely(err)) | ||
1445 | return err; | ||
1446 | |||
1447 | if (sci->sc_stage.flags & NILFS_CF_SUFREED) { | 1443 | if (sci->sc_stage.flags & NILFS_CF_SUFREED) { |
1448 | err = nilfs_sufile_cancel_freev(nilfs->ns_sufile, | 1444 | err = nilfs_sufile_cancel_freev(nilfs->ns_sufile, |
1449 | sci->sc_freesegs, | 1445 | sci->sc_freesegs, |
1450 | sci->sc_nfreesegs, | 1446 | sci->sc_nfreesegs, |
1451 | NULL); | 1447 | NULL); |
1452 | WARN_ON(err); /* do not happen */ | 1448 | WARN_ON(err); /* do not happen */ |
1449 | sci->sc_stage.flags &= ~NILFS_CF_SUFREED; | ||
1453 | } | 1450 | } |
1451 | |||
1452 | err = nilfs_segctor_extend_segments(sci, nilfs, nadd); | ||
1453 | if (unlikely(err)) | ||
1454 | return err; | ||
1455 | |||
1454 | nadd = min_t(int, nadd << 1, SC_MAX_SEGDELTA); | 1456 | nadd = min_t(int, nadd << 1, SC_MAX_SEGDELTA); |
1455 | sci->sc_stage = prev_stage; | 1457 | sci->sc_stage = prev_stage; |
1456 | } | 1458 | } |
diff --git a/include/linux/crash_dump.h b/include/linux/crash_dump.h index fe68a5a98583..7032518f8542 100644 --- a/include/linux/crash_dump.h +++ b/include/linux/crash_dump.h | |||
@@ -6,6 +6,8 @@ | |||
6 | #include <linux/proc_fs.h> | 6 | #include <linux/proc_fs.h> |
7 | #include <linux/elf.h> | 7 | #include <linux/elf.h> |
8 | 8 | ||
9 | #include <asm/pgtable.h> /* for pgprot_t */ | ||
10 | |||
9 | #define ELFCORE_ADDR_MAX (-1ULL) | 11 | #define ELFCORE_ADDR_MAX (-1ULL) |
10 | #define ELFCORE_ADDR_ERR (-2ULL) | 12 | #define ELFCORE_ADDR_ERR (-2ULL) |
11 | 13 | ||
diff --git a/lib/percpu_counter.c b/lib/percpu_counter.c index 7473ee3b4ee7..1da85bb1bc07 100644 --- a/lib/percpu_counter.c +++ b/lib/percpu_counter.c | |||
@@ -82,10 +82,10 @@ void __percpu_counter_add(struct percpu_counter *fbc, s64 amount, s32 batch) | |||
82 | unsigned long flags; | 82 | unsigned long flags; |
83 | raw_spin_lock_irqsave(&fbc->lock, flags); | 83 | raw_spin_lock_irqsave(&fbc->lock, flags); |
84 | fbc->count += count; | 84 | fbc->count += count; |
85 | __this_cpu_sub(*fbc->counters, count); | ||
85 | raw_spin_unlock_irqrestore(&fbc->lock, flags); | 86 | raw_spin_unlock_irqrestore(&fbc->lock, flags); |
86 | __this_cpu_write(*fbc->counters, 0); | ||
87 | } else { | 87 | } else { |
88 | __this_cpu_write(*fbc->counters, count); | 88 | this_cpu_add(*fbc->counters, amount); |
89 | } | 89 | } |
90 | preempt_enable(); | 90 | preempt_enable(); |
91 | } | 91 | } |
@@ -390,7 +390,10 @@ struct address_space *page_mapping(struct page *page) | |||
390 | { | 390 | { |
391 | struct address_space *mapping = page->mapping; | 391 | struct address_space *mapping = page->mapping; |
392 | 392 | ||
393 | VM_BUG_ON(PageSlab(page)); | 393 | /* This happens if someone calls flush_dcache_page on slab page */ |
394 | if (unlikely(PageSlab(page))) | ||
395 | return NULL; | ||
396 | |||
394 | if (unlikely(PageSwapCache(page))) { | 397 | if (unlikely(PageSwapCache(page))) { |
395 | swp_entry_t entry; | 398 | swp_entry_t entry; |
396 | 399 | ||