Merge master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild

* master.kernel.org:/pub/scm/linux/kernel/git/sam/kbuild: (46 commits)
  kbuild: remove obsoleted scripts/reference_* files
  kbuild: fix make help & make *pkg
  kconfig: fix time ordering of writes to .kconfig.d and include/linux/autoconf.h
  Kconfig: remove the CONFIG_CC_ALIGN_* options
  kbuild: add -fverbose-asm to i386 Makefile
  kbuild: clean-up genksyms
  kbuild: Lindent genksyms.c
  kbuild: fix genksyms build error
  kbuild: in makefile.txt note that Makefile is preferred name for kbuild files
  kbuild: replace PHONY with FORCE
  kbuild: Fix bug in crc symbol generating of kernel and modules
  kbuild: change kbuild to not rely on incorrect GNU make behavior
  kbuild: when warning symbols exported twice now tell user this is the problem
  kbuild: fix make dir/file.xx when asm symlink is missing
  kbuild: in the section mismatch check try harder to find symbols
  kbuild: fix section mismatch check for unwind on IA64
  kbuild: kill false positives from section mismatch warnings for powerpc
  kbuild: kill trailing whitespace in modpost & friends
  kbuild: small update of allnoconfig description
  kbuild: make namespace.pl CROSS_COMPILE happy
  ...

Trivial conflict in arch/ppc/boot/Makefile manually fixed up

52 files changed, 1500 insertions, 1259 deletions

diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile
index 2975291e296a..7d87dd73cbe4 100644
--- a/Documentation/DocBook/Makefile
+++ b/Documentation/DocBook/Makefile
@@ -28,7 +28,7 @@ PS_METHOD	= $(prefer-db2x)
 
 ###
 # The targets that may be used.
-.PHONY: xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs
+PHONY += xmldocs sgmldocs psdocs pdfdocs htmldocs mandocs installmandocs
 
 BOOKS := $(addprefix $(obj)/,$(DOCBOOKS))
 xmldocs: $(BOOKS)
@@ -211,3 +211,9 @@ clean-dirs := $(patsubst %.xml,%,$(DOCBOOKS))
 
 #man put files in man subdir - traverse down
 subdir- := man/
+
+
+# Declare the contents of the .PHONY variable as phony.  We keep that
+# information in a variable se we can use it in if_changed and friends.
+
+.PHONY: $(PHONY)
diff --git a/Documentation/kbuild/makefiles.txt b/Documentation/kbuild/makefiles.txt
index 443230b43e09..a9c00facdf40 100644
--- a/Documentation/kbuild/makefiles.txt
+++ b/Documentation/kbuild/makefiles.txt
@@ -17,6 +17,7 @@ This document describes the Linux kernel Makefiles.
            --- 3.8 Command line dependency
            --- 3.9 Dependency tracking
            --- 3.10 Special Rules
+           --- 3.11 $(CC) support functions
 
         === 4 Host Program support
            --- 4.1 Simple Host Program
@@ -38,7 +39,6 @@ This document describes the Linux kernel Makefiles.
            --- 6.6 Commands useful for building a boot image
            --- 6.7 Custom kbuild commands
            --- 6.8 Preprocessing linker scripts
-           --- 6.9 $(CC) support functions
 
         === 7 Kbuild Variables
         === 8 Makefile language
@@ -106,9 +106,9 @@ This document is aimed towards normal developers and arch developers.
 Most Makefiles within the kernel are kbuild Makefiles that use the
 kbuild infrastructure. This chapter introduce the syntax used in the
 kbuild makefiles.
-The preferred name for the kbuild files is 'Kbuild' but 'Makefile' will
-continue to be supported. All new developmen is expected to use the
-Kbuild filename.
+The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can
+be used and if both a 'Makefile' and a 'Kbuild' file exists then the 'Kbuild'
+file will be used.
 
 Section 3.1 "Goal definitions" is a quick intro, further chapters provide
 more details, with real examples.
@@ -385,6 +385,102 @@ more details, with real examples.
         to prerequisites are referenced with $(src) (because they are not
         generated files).
 
+--- 3.11 $(CC) support functions
+
+        The kernel may be build with several different versions of
+        $(CC), each supporting a unique set of features and options.
+        kbuild provide basic support to check for valid options for $(CC).
+        $(CC) is useally the gcc compiler, but other alternatives are
+        available.
+
+    as-option
+        as-option is used to check if $(CC) when used to compile
+        assembler (*.S) files supports the given option. An optional
+        second option may be specified if first option are not supported.
+
+        Example:
+                #arch/sh/Makefile
+                cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)
+
+        In the above example cflags-y will be assinged the the option
+        -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).
+        The second argument is optional, and if supplied will be used
+        if first argument is not supported.
+
+    cc-option
+        cc-option is used to check if $(CC) support a given option, and not
+        supported to use an optional second option.
+
+        Example:
+                #arch/i386/Makefile
+                cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)
+
+        In the above example cflags-y will be assigned the option
+        -march=pentium-mmx if supported by $(CC), otherwise -march-i586.
+        The second argument to cc-option is optional, and if omitted
+        cflags-y will be assigned no value if first option is not supported.