diff options
| author | Paul Walmsley <paul@pwsan.com> | 2011-03-11 00:43:05 -0500 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2011-03-11 00:43:05 -0500 |
| commit | 2d403fe03070b541cc93cfa915f6e6c592cf231c (patch) | |
| tree | 530e0bf3a99a9aa93e0113a916fb7a547605ad2e | |
| parent | 21ace5452ce3327f0d11f85b0c33dfcd0d20fdb2 (diff) | |
| parent | cc1226e7635011c7dd1e786770ed51ee751800f2 (diff) | |
Merge remote branch 'remotes/origin/hwmod_a_2.6.39' into tmp-integration-2.6.39-20110310-024
Conflicts:
arch/arm/mach-omap2/omap_hwmod_2430_data.c
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
arch/arm/plat-omap/include/plat/omap_hwmod.h
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod.c | 79 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 11 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 12 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 13 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/prm2xxx_3xxx.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/prm2xxx_3xxx.h | 5 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/plat/omap_hwmod.h | 4 |
7 files changed, 82 insertions, 60 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index e39772beaedd..4c8329e4e6e1 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c | |||
| @@ -370,7 +370,7 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, | |||
| 370 | } | 370 | } |
| 371 | 371 | ||
| 372 | autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; | 372 | autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; |
| 373 | autoidle_mask = (0x3 << autoidle_shift); | 373 | autoidle_mask = (0x1 << autoidle_shift); |
| 374 | 374 | ||
| 375 | *v &= ~autoidle_mask; | 375 | *v &= ~autoidle_mask; |
| 376 | *v |= autoidle << autoidle_shift; | 376 | *v |= autoidle << autoidle_shift; |
| @@ -929,7 +929,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) | |||
| 929 | if (!ret) | 929 | if (!ret) |
| 930 | oh->_state = _HWMOD_STATE_CLKS_INITED; | 930 | oh->_state = _HWMOD_STATE_CLKS_INITED; |
| 931 | 931 | ||
| 932 | return 0; | 932 | return ret; |
| 933 | } | 933 | } |
| 934 | 934 | ||
| 935 | /** | 935 | /** |
| @@ -975,25 +975,29 @@ static int _wait_target_ready(struct omap_hwmod *oh) | |||
| 975 | } | 975 | } |
| 976 | 976 | ||
| 977 | /** | 977 | /** |
| 978 | * _lookup_hardreset - return the register bit shift for this hwmod/reset line | 978 | * _lookup_hardreset - fill register bit info for this hwmod/reset line |
| 979 | * @oh: struct omap_hwmod * | 979 | * @oh: struct omap_hwmod * |
| 980 | * @name: name of the reset line in the context of this hwmod | 980 | * @name: name of the reset line in the context of this hwmod |
| 981 | * @ohri: struct omap_hwmod_rst_info * that this function will fill in | ||
| 981 | * | 982 | * |
| 982 | * Return the bit position of the reset line that match the | 983 | * Return the bit position of the reset line that match the |
| 983 | * input name. Return -ENOENT if not found. | 984 | * input name. Return -ENOENT if not found. |
| 984 | */ | 985 | */ |
| 985 | static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name) | 986 | static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, |
| 987 | struct omap_hwmod_rst_info *ohri) | ||
| 986 | { | 988 | { |
| 987 | int i; | 989 | int i; |
| 988 | 990 | ||
| 989 | for (i = 0; i < oh->rst_lines_cnt; i++) { | 991 | for (i = 0; i < oh->rst_lines_cnt; i++) { |
| 990 | const char *rst_line = oh->rst_lines[i].name; | 992 | const char *rst_line = oh->rst_lines[i].name; |
| 991 | if (!strcmp(rst_line, name)) { | 993 | if (!strcmp(rst_line, name)) { |
| 992 | u8 shift = oh->rst_lines[i].rst_shift; | 994 | ohri->rst_shift = oh->rst_lines[i].rst_shift; |
| 993 | pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n", | 995 | ohri->st_shift = oh->rst_lines[i].st_shift; |
| 994 | oh->name, rst_line, shift); | 996 | pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", |
| 997 | oh->name, __func__, rst_line, ohri->rst_shift, | ||
| 998 | ohri->st_shift); | ||
| 995 | 999 | ||
| 996 | return shift; | 1000 | return 0; |
| 997 | } | 1001 | } |
| 998 | } | 1002 | } |
| 999 | 1003 | ||
| @@ -1012,21 +1016,22 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name) | |||
| 1012 | */ | 1016 | */ |
| 1013 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) | 1017 | static int _assert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1014 | { | 1018 | { |
| 1015 | u8 shift; | 1019 | struct omap_hwmod_rst_info ohri; |
| 1020 | u8 ret; | ||
| 1016 | 1021 | ||
| 1017 | if (!oh) | 1022 | if (!oh) |
| 1018 | return -EINVAL; | 1023 | return -EINVAL; |
| 1019 | 1024 | ||
| 1020 | shift = _lookup_hardreset(oh, name); | 1025 | ret = _lookup_hardreset(oh, name, &ohri); |
| 1021 | if (IS_ERR_VALUE(shift)) | 1026 | if (IS_ERR_VALUE(ret)) |
| 1022 | return shift; | 1027 | return ret; |
| 1023 | 1028 | ||
| 1024 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | 1029 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) |
| 1025 | return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, | 1030 | return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, |
| 1026 | shift); | 1031 | ohri.rst_shift); |
| 1027 | else if (cpu_is_omap44xx()) | 1032 | else if (cpu_is_omap44xx()) |
| 1028 | return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg, | 1033 | return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg, |
| 1029 | shift); | 1034 | ohri.rst_shift); |
| 1030 | else | 1035 | else |
| 1031 | return -EINVAL; | 1036 | return -EINVAL; |
| 1032 | } | 1037 | } |
| @@ -1043,29 +1048,34 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) | |||
| 1043 | */ | 1048 | */ |
| 1044 | static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) | 1049 | static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) |
| 1045 | { | 1050 | { |
| 1046 | u8 shift; | 1051 | struct omap_hwmod_rst_info ohri; |
| 1047 | int r; | 1052 | int ret; |
| 1048 | 1053 | ||
| 1049 | if (!oh) | 1054 | if (!oh) |
| 1050 | return -EINVAL; | 1055 | return -EINVAL; |
| 1051 | 1056 | ||
| 1052 | shift = _lookup_hardreset(oh, name); | 1057 | ret = _lookup_hardreset(oh, name, &ohri); |
| 1053 | if (IS_ERR_VALUE(shift)) | 1058 | if (IS_ERR_VALUE(ret)) |
| 1054 | return shift; | 1059 | return ret; |
| 1055 | 1060 | ||
| 1056 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | 1061 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
| 1057 | r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, | 1062 | ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, |
| 1058 | shift); | 1063 | ohri.rst_shift, |
| 1059 | else if (cpu_is_omap44xx()) | 1064 | ohri.st_shift); |
| 1060 | r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg, | 1065 | } else if (cpu_is_omap44xx()) { |
| 1061 | shift); | 1066 | if (ohri.st_shift) |
| 1062 | else | 1067 | pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", |
| 1068 | oh->name, name); | ||
| 1069 | ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg, | ||
| 1070 | ohri.rst_shift); | ||
| 1071 | } else { | ||
| 1063 | return -EINVAL; | 1072 | return -EINVAL; |
| 1073 | } | ||
| 1064 | 1074 | ||
| 1065 | if (r == -EBUSY) | 1075 | if (ret == -EBUSY) |
| 1066 | pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); | 1076 | pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); |
| 1067 | 1077 | ||
| 1068 | return r; | 1078 | return ret; |
| 1069 | } | 1079 | } |
| 1070 | 1080 | ||
| 1071 | /** | 1081 | /** |
| @@ -1078,21 +1088,22 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) | |||
| 1078 | */ | 1088 | */ |
| 1079 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) | 1089 | static int _read_hardreset(struct omap_hwmod *oh, const char *name) |
| 1080 | { | 1090 | { |
| 1081 | u8 shift; | 1091 | struct omap_hwmod_rst_info ohri; |
| 1092 | u8 ret; | ||
| 1082 | 1093 | ||
| 1083 | if (!oh) | 1094 | if (!oh) |
| 1084 | return -EINVAL; | 1095 | return -EINVAL; |
| 1085 | 1096 | ||
| 1086 | shift = _lookup_hardreset(oh, name); | 1097 | ret = _lookup_hardreset(oh, name, &ohri); |
| 1087 | if (IS_ERR_VALUE(shift)) | 1098 | if (IS_ERR_VALUE(ret)) |
| 1088 | return shift; | 1099 | return ret; |
| 1089 | 1100 | ||
| 1090 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { | 1101 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) { |
| 1091 | return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, | 1102 | return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, |
| 1092 | shift); | 1103 | ohri.st_shift); |
| 1093 | } else if (cpu_is_omap44xx()) { | 1104 | } else if (cpu_is_omap44xx()) { |
| 1094 | return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg, | 1105 | return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg, |
| 1095 | shift); | 1106 | ohri.rst_shift); |
| 1096 | } else { | 1107 | } else { |
| 1097 | return -EINVAL; | 1108 | return -EINVAL; |
| 1098 | } | 1109 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 61e58bd27aec..62823467163b 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | |||
| @@ -988,7 +988,7 @@ static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { | |||
| 988 | .sysc_offs = 0x0010, | 988 | .sysc_offs = 0x0010, |
| 989 | .syss_offs = 0x0014, | 989 | .syss_offs = 0x0014, |
| 990 | .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | | 990 | .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | |
| 991 | SYSC_HAS_AUTOIDLE), | 991 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 992 | .sysc_fields = &omap_hwmod_sysc_type1, | 992 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 993 | }; | 993 | }; |
| 994 | 994 | ||
| @@ -1029,7 +1029,7 @@ static struct omap_hwmod_class_sysconfig uart_sysc = { | |||
| 1029 | .syss_offs = 0x58, | 1029 | .syss_offs = 0x58, |
| 1030 | .sysc_flags = (SYSC_HAS_SIDLEMODE | | 1030 | .sysc_flags = (SYSC_HAS_SIDLEMODE | |
| 1031 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | 1031 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
| 1032 | SYSC_HAS_AUTOIDLE), | 1032 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 1033 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 1033 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 1034 | .sysc_fields = &omap_hwmod_sysc_type1, | 1034 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1035 | }; | 1035 | }; |
| @@ -1441,7 +1441,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { | |||
| 1441 | .rev_offs = 0x00, | 1441 | .rev_offs = 0x00, |
| 1442 | .sysc_offs = 0x20, | 1442 | .sysc_offs = 0x20, |
| 1443 | .syss_offs = 0x10, | 1443 | .syss_offs = 0x10, |
| 1444 | .sysc_flags = SYSC_HAS_SOFTRESET, | 1444 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), |
| 1445 | .sysc_fields = &omap_hwmod_sysc_type1, | 1445 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1446 | }; | 1446 | }; |
| 1447 | 1447 | ||
| @@ -1613,7 +1613,8 @@ static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = { | |||
| 1613 | .sysc_offs = 0x0010, | 1613 | .sysc_offs = 0x0010, |
| 1614 | .syss_offs = 0x0014, | 1614 | .syss_offs = 0x0014, |
| 1615 | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | | 1615 | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | |
| 1616 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | 1616 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | |
| 1617 | SYSS_HAS_RESET_STATUS), | ||
| 1617 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 1618 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 1618 | .sysc_fields = &omap_hwmod_sysc_type1, | 1619 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1619 | }; | 1620 | }; |
| @@ -1755,7 +1756,7 @@ static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = { | |||
| 1755 | .syss_offs = 0x0028, | 1756 | .syss_offs = 0x0028, |
| 1756 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | | 1757 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | |
| 1757 | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | | 1758 | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | |
| 1758 | SYSC_HAS_AUTOIDLE), | 1759 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 1759 | .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | 1760 | .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), |
| 1760 | .sysc_fields = &omap_hwmod_sysc_type1, | 1761 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1761 | }; | 1762 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 490789a6bed0..0fdf2cabfb12 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | |||
| @@ -1088,7 +1088,7 @@ static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { | |||
| 1088 | .sysc_offs = 0x0010, | 1088 | .sysc_offs = 0x0010, |
| 1089 | .syss_offs = 0x0014, | 1089 | .syss_offs = 0x0014, |
| 1090 | .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | | 1090 | .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | |
| 1091 | SYSC_HAS_AUTOIDLE), | 1091 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 1092 | .sysc_fields = &omap_hwmod_sysc_type1, | 1092 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1093 | }; | 1093 | }; |
| 1094 | 1094 | ||
| @@ -1129,7 +1129,7 @@ static struct omap_hwmod_class_sysconfig uart_sysc = { | |||
| 1129 | .syss_offs = 0x58, | 1129 | .syss_offs = 0x58, |
| 1130 | .sysc_flags = (SYSC_HAS_SIDLEMODE | | 1130 | .sysc_flags = (SYSC_HAS_SIDLEMODE | |
| 1131 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | 1131 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
| 1132 | SYSC_HAS_AUTOIDLE), | 1132 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 1133 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 1133 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 1134 | .sysc_fields = &omap_hwmod_sysc_type1, | 1134 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1135 | }; | 1135 | }; |
| @@ -1516,7 +1516,8 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { | |||
| 1516 | .rev_offs = 0x00, | 1516 | .rev_offs = 0x00, |
| 1517 | .sysc_offs = 0x20, | 1517 | .sysc_offs = 0x20, |
| 1518 | .syss_offs = 0x10, | 1518 | .syss_offs = 0x10, |
| 1519 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | 1519 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | |
| 1520 | SYSS_HAS_RESET_STATUS), | ||
| 1520 | .sysc_fields = &omap_hwmod_sysc_type1, | 1521 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1521 | }; | 1522 | }; |
| 1522 | 1523 | ||
| @@ -1714,7 +1715,8 @@ static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { | |||
| 1714 | .sysc_offs = 0x0010, | 1715 | .sysc_offs = 0x0010, |
| 1715 | .syss_offs = 0x0014, | 1716 | .syss_offs = 0x0014, |
| 1716 | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | | 1717 | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | |
| 1717 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | 1718 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | |
| 1719 | SYSS_HAS_RESET_STATUS), | ||
| 1718 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 1720 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 1719 | .sysc_fields = &omap_hwmod_sysc_type1, | 1721 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1720 | }; | 1722 | }; |
| @@ -1886,7 +1888,7 @@ static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { | |||
| 1886 | .syss_offs = 0x0028, | 1888 | .syss_offs = 0x0028, |
| 1887 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | | 1889 | .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | |
| 1888 | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | | 1890 | SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | |
| 1889 | SYSC_HAS_AUTOIDLE), | 1891 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 1890 | .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | 1892 | .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), |
| 1891 | .sysc_fields = &omap_hwmod_sysc_type1, | 1893 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1892 | }; | 1894 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 2e275cbcd654..17b4fb8c3479 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | |||
| @@ -1240,7 +1240,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = { | |||
| 1240 | .syss_offs = 0x0014, | 1240 | .syss_offs = 0x0014, |
| 1241 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE | | 1241 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE | |
| 1242 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | 1242 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
| 1243 | SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY), | 1243 | SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY | |
| 1244 | SYSS_HAS_RESET_STATUS), | ||
| 1244 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 1245 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 1245 | .sysc_fields = &omap_hwmod_sysc_type1, | 1246 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1246 | }; | 1247 | }; |
| @@ -1252,7 +1253,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { | |||
| 1252 | .syss_offs = 0x10, | 1253 | .syss_offs = 0x10, |
| 1253 | .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | | 1254 | .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | |
| 1254 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | 1255 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
| 1255 | SYSC_HAS_AUTOIDLE), | 1256 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 1256 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 1257 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 1257 | .sysc_fields = &omap_hwmod_sysc_type1, | 1258 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1258 | }; | 1259 | }; |
| @@ -1299,7 +1300,7 @@ static struct omap_hwmod_class_sysconfig uart_sysc = { | |||
| 1299 | .syss_offs = 0x58, | 1300 | .syss_offs = 0x58, |
| 1300 | .sysc_flags = (SYSC_HAS_SIDLEMODE | | 1301 | .sysc_flags = (SYSC_HAS_SIDLEMODE | |
| 1301 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | 1302 | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | |
| 1302 | SYSC_HAS_AUTOIDLE), | 1303 | SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), |
| 1303 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 1304 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 1304 | .sysc_fields = &omap_hwmod_sysc_type1, | 1305 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 1305 | }; | 1306 | }; |
| @@ -2105,7 +2106,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_gpio_sysc = { | |||
| 2105 | .sysc_offs = 0x0010, | 2106 | .sysc_offs = 0x0010, |
| 2106 | .syss_offs = 0x0014, | 2107 | .syss_offs = 0x0014, |
| 2107 | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | | 2108 | .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | |
| 2108 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | 2109 | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | |
| 2110 | SYSS_HAS_RESET_STATUS), | ||
| 2109 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 2111 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 2110 | .sysc_fields = &omap_hwmod_sysc_type1, | 2112 | .sysc_fields = &omap_hwmod_sysc_type1, |
| 2111 | }; | 2113 | }; |
| @@ -2359,7 +2361,8 @@ static struct omap_hwmod_class_sysconfig omap3xxx_dma_sysc = { | |||
| 2359 | .syss_offs = 0x0028, | 2361 | .syss_offs = 0x0028, |
| 2360 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | | 2362 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | |
| 2361 | SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | 2363 | SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY | |
| 2362 | SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE), | 2364 | SYSC_HAS_EMUFREE | SYSC_HAS_AUTOIDLE | |
| 2365 | SYSS_HAS_RESET_STATUS), | ||
| 2363 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | 2366 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | |
| 2364 | MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | 2367 | MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), |
| 2365 | .sysc_fields = &omap_hwmod_sysc_type1, | 2368 | .sysc_fields = &omap_hwmod_sysc_type1, |
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c index ec0362574b5e..051213fbc346 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | |||
| @@ -118,7 +118,8 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) | |||
| 118 | /** | 118 | /** |
| 119 | * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait | 119 | * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait |
| 120 | * @prm_mod: PRM submodule base (e.g. CORE_MOD) | 120 | * @prm_mod: PRM submodule base (e.g. CORE_MOD) |
| 121 | * @shift: register bit shift corresponding to the reset line to deassert | 121 | * @rst_shift: register bit shift corresponding to the reset line to deassert |
| 122 | * @st_shift: register bit shift for the status of the deasserted submodule | ||
| 122 | * | 123 | * |
| 123 | * Some IPs like dsp or iva contain processors that require an HW | 124 | * Some IPs like dsp or iva contain processors that require an HW |
| 124 | * reset line to be asserted / deasserted in order to fully enable the | 125 | * reset line to be asserted / deasserted in order to fully enable the |
| @@ -129,27 +130,28 @@ int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) | |||
| 129 | * -EINVAL upon an argument error, -EEXIST if the submodule was already out | 130 | * -EINVAL upon an argument error, -EEXIST if the submodule was already out |
| 130 | * of reset, or -EBUSY if the submodule did not exit reset promptly. | 131 | * of reset, or -EBUSY if the submodule did not exit reset promptly. |
| 131 | */ | 132 | */ |
| 132 | int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift) | 133 | int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) |
| 133 | { | 134 | { |
| 134 | u32 mask; | 135 | u32 rst, st; |
| 135 | int c; | 136 | int c; |
| 136 | 137 | ||
| 137 | if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) | 138 | if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) |
| 138 | return -EINVAL; | 139 | return -EINVAL; |
| 139 | 140 | ||
| 140 | mask = 1 << shift; | 141 | rst = 1 << rst_shift; |
| 142 | st = 1 << st_shift; | ||
| 141 | 143 | ||
| 142 | /* Check the current status to avoid de-asserting the line twice */ | 144 | /* Check the current status to avoid de-asserting the line twice */ |
| 143 | if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, mask) == 0) | 145 | if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0) |
| 144 | return -EEXIST; | 146 | return -EEXIST; |
| 145 | 147 | ||
| 146 | /* Clear the reset status by writing 1 to the status bit */ | 148 | /* Clear the reset status by writing 1 to the status bit */ |
| 147 | omap2_prm_rmw_mod_reg_bits(0xffffffff, mask, prm_mod, OMAP2_RM_RSTST); | 149 | omap2_prm_rmw_mod_reg_bits(0xffffffff, st, prm_mod, OMAP2_RM_RSTST); |
| 148 | /* de-assert the reset control line */ | 150 | /* de-assert the reset control line */ |
| 149 | omap2_prm_rmw_mod_reg_bits(mask, 0, prm_mod, OMAP2_RM_RSTCTRL); | 151 | omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL); |
| 150 | /* wait the status to be set */ | 152 | /* wait the status to be set */ |
| 151 | omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST, | 153 | omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST, |
| 152 | mask), | 154 | st), |
| 153 | MAX_MODULE_HARDRESET_WAIT, c); | 155 | MAX_MODULE_HARDRESET_WAIT, c); |
| 154 | 156 | ||
| 155 | return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; | 157 | return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; |
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h index 49654c8d18f5..a1fc62a39dbb 100644 --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | |||
| @@ -282,7 +282,8 @@ static inline int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) | |||
| 282 | "not suppose to be used on omap4\n"); | 282 | "not suppose to be used on omap4\n"); |
| 283 | return 0; | 283 | return 0; |
| 284 | } | 284 | } |
| 285 | static inline int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift) | 285 | static inline int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, |
| 286 | u8 st_shift) | ||
| 286 | { | 287 | { |
| 287 | WARN(1, "prm: omap2xxx/omap3xxx specific function and " | 288 | WARN(1, "prm: omap2xxx/omap3xxx specific function and " |
| 288 | "not suppose to be used on omap4\n"); | 289 | "not suppose to be used on omap4\n"); |
| @@ -300,7 +301,7 @@ extern u32 omap2_prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); | |||
| 300 | /* These omap2_ PRM functions apply to both OMAP2 and 3 */ | 301 | /* These omap2_ PRM functions apply to both OMAP2 and 3 */ |
| 301 | extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); | 302 | extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); |
| 302 | extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); | 303 | extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); |
| 303 | extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift); | 304 | extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); |
| 304 | 305 | ||
| 305 | #endif /* CONFIG_ARCH_OMAP4 */ | 306 | #endif /* CONFIG_ARCH_OMAP4 */ |
| 306 | #endif | 307 | #endif |
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index 8a1368fbbbd3..fca0cbce4659 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
| @@ -125,6 +125,7 @@ struct omap_hwmod_dma_info { | |||
| 125 | * struct omap_hwmod_rst_info - IPs reset lines use by hwmod | 125 | * struct omap_hwmod_rst_info - IPs reset lines use by hwmod |
| 126 | * @name: name of the reset line (module local name) | 126 | * @name: name of the reset line (module local name) |
| 127 | * @rst_shift: Offset of the reset bit | 127 | * @rst_shift: Offset of the reset bit |
| 128 | * @st_shift: Offset of the reset status bit (OMAP2/3 only) | ||
| 128 | * | 129 | * |
| 129 | * @name should be something short, e.g., "cpu0" or "rst". It is defined | 130 | * @name should be something short, e.g., "cpu0" or "rst". It is defined |
| 130 | * locally to the hwmod. | 131 | * locally to the hwmod. |
| @@ -132,6 +133,7 @@ struct omap_hwmod_dma_info { | |||
| 132 | struct omap_hwmod_rst_info { | 133 | struct omap_hwmod_rst_info { |
| 133 | const char *name; | 134 | const char *name; |
| 134 | u8 rst_shift; | 135 | u8 rst_shift; |
| 136 | u8 st_shift; | ||
| 135 | }; | 137 | }; |
| 136 | 138 | ||
| 137 | /** | 139 | /** |
| @@ -377,7 +379,7 @@ struct omap_hwmod_omap4_prcm { | |||
| 377 | * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM | 379 | * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM |
| 378 | * controller, etc. XXX probably belongs outside the main hwmod file | 380 | * controller, etc. XXX probably belongs outside the main hwmod file |
| 379 | * XXX Should be HWMOD_SETUP_NO_IDLE | 381 | * XXX Should be HWMOD_SETUP_NO_IDLE |
| 380 | * HWMOD_NO_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE) | 382 | * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE) |
| 381 | * when module is enabled, rather than the default, which is to | 383 | * when module is enabled, rather than the default, which is to |
| 382 | * enable autoidle | 384 | * enable autoidle |
| 383 | * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup | 385 | * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup |
