diff options
author | Takashi Iwai <tiwai@suse.de> | 2011-05-02 06:33:43 -0400 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2011-05-02 06:33:43 -0400 |
commit | 2b63536f0cc20c30619a90dc2d36cc64a9d75c28 (patch) | |
tree | cd96363c188a8ad170c52a803666869ccf5c4da0 | |
parent | 9cf0aa9ebae703c117421d94f20b2ece8112218e (diff) |
ALSA: hda - Constify fixup and other array data in patch_sigmatel.c
Signed-off-by: Takashi Iwai <tiwai@suse.de>
-rw-r--r-- | sound/pci/hda/patch_sigmatel.c | 394 |
1 files changed, 199 insertions, 195 deletions
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c index 1ce65d4e05ac..a2884bb88031 100644 --- a/sound/pci/hda/patch_sigmatel.c +++ b/sound/pci/hda/patch_sigmatel.c | |||
@@ -217,15 +217,15 @@ struct sigmatel_spec { | |||
217 | unsigned int stream_delay; | 217 | unsigned int stream_delay; |
218 | 218 | ||
219 | /* analog loopback */ | 219 | /* analog loopback */ |
220 | struct snd_kcontrol_new *aloopback_ctl; | 220 | const struct snd_kcontrol_new *aloopback_ctl; |
221 | unsigned char aloopback_mask; | 221 | unsigned char aloopback_mask; |
222 | unsigned char aloopback_shift; | 222 | unsigned char aloopback_shift; |
223 | 223 | ||
224 | /* power management */ | 224 | /* power management */ |
225 | unsigned int num_pwrs; | 225 | unsigned int num_pwrs; |
226 | unsigned int *pwr_mapping; | 226 | const unsigned int *pwr_mapping; |
227 | hda_nid_t *pwr_nids; | 227 | const hda_nid_t *pwr_nids; |
228 | hda_nid_t *dac_list; | 228 | const hda_nid_t *dac_list; |
229 | 229 | ||
230 | /* events */ | 230 | /* events */ |
231 | struct snd_array events; | 231 | struct snd_array events; |
@@ -241,20 +241,20 @@ struct sigmatel_spec { | |||
241 | int volume_offset; | 241 | int volume_offset; |
242 | 242 | ||
243 | /* capture */ | 243 | /* capture */ |
244 | hda_nid_t *adc_nids; | 244 | const hda_nid_t *adc_nids; |
245 | unsigned int num_adcs; | 245 | unsigned int num_adcs; |
246 | hda_nid_t *mux_nids; | 246 | const hda_nid_t *mux_nids; |
247 | unsigned int num_muxes; | 247 | unsigned int num_muxes; |
248 | hda_nid_t *dmic_nids; | 248 | const hda_nid_t *dmic_nids; |
249 | unsigned int num_dmics; | 249 | unsigned int num_dmics; |
250 | hda_nid_t *dmux_nids; | 250 | const hda_nid_t *dmux_nids; |
251 | unsigned int num_dmuxes; | 251 | unsigned int num_dmuxes; |
252 | hda_nid_t *smux_nids; | 252 | const hda_nid_t *smux_nids; |
253 | unsigned int num_smuxes; | 253 | unsigned int num_smuxes; |
254 | unsigned int num_analog_muxes; | 254 | unsigned int num_analog_muxes; |
255 | 255 | ||
256 | unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */ | 256 | const unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */ |
257 | unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */ | 257 | const unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */ |
258 | unsigned int num_caps; /* number of capture volume/switch elements */ | 258 | unsigned int num_caps; /* number of capture volume/switch elements */ |
259 | 259 | ||
260 | struct sigmatel_mic_route ext_mic; | 260 | struct sigmatel_mic_route ext_mic; |
@@ -269,12 +269,12 @@ struct sigmatel_spec { | |||
269 | hda_nid_t digbeep_nid; | 269 | hda_nid_t digbeep_nid; |
270 | 270 | ||
271 | /* pin widgets */ | 271 | /* pin widgets */ |
272 | hda_nid_t *pin_nids; | 272 | const hda_nid_t *pin_nids; |
273 | unsigned int num_pins; | 273 | unsigned int num_pins; |
274 | 274 | ||
275 | /* codec specific stuff */ | 275 | /* codec specific stuff */ |
276 | struct hda_verb *init; | 276 | const struct hda_verb *init; |
277 | struct snd_kcontrol_new *mixer; | 277 | const struct snd_kcontrol_new *mixer; |
278 | 278 | ||
279 | /* capture source */ | 279 | /* capture source */ |
280 | struct hda_input_mux *dinput_mux; | 280 | struct hda_input_mux *dinput_mux; |
@@ -317,52 +317,52 @@ struct sigmatel_spec { | |||
317 | hda_nid_t auto_dmic_nids[MAX_DMICS_NUM]; | 317 | hda_nid_t auto_dmic_nids[MAX_DMICS_NUM]; |
318 | }; | 318 | }; |
319 | 319 | ||
320 | static hda_nid_t stac9200_adc_nids[1] = { | 320 | static const hda_nid_t stac9200_adc_nids[1] = { |
321 | 0x03, | 321 | 0x03, |
322 | }; | 322 | }; |
323 | 323 | ||
324 | static hda_nid_t stac9200_mux_nids[1] = { | 324 | static const hda_nid_t stac9200_mux_nids[1] = { |
325 | 0x0c, | 325 | 0x0c, |
326 | }; | 326 | }; |
327 | 327 | ||
328 | static hda_nid_t stac9200_dac_nids[1] = { | 328 | static const hda_nid_t stac9200_dac_nids[1] = { |
329 | 0x02, | 329 | 0x02, |
330 | }; | 330 | }; |
331 | 331 | ||
332 | static hda_nid_t stac92hd73xx_pwr_nids[8] = { | 332 | static const hda_nid_t stac92hd73xx_pwr_nids[8] = { |
333 | 0x0a, 0x0b, 0x0c, 0xd, 0x0e, | 333 | 0x0a, 0x0b, 0x0c, 0xd, 0x0e, |
334 | 0x0f, 0x10, 0x11 | 334 | 0x0f, 0x10, 0x11 |
335 | }; | 335 | }; |
336 | 336 | ||
337 | static hda_nid_t stac92hd73xx_slave_dig_outs[2] = { | 337 | static const hda_nid_t stac92hd73xx_slave_dig_outs[2] = { |
338 | 0x26, 0, | 338 | 0x26, 0, |
339 | }; | 339 | }; |
340 | 340 | ||
341 | static hda_nid_t stac92hd73xx_adc_nids[2] = { | 341 | static const hda_nid_t stac92hd73xx_adc_nids[2] = { |
342 | 0x1a, 0x1b | 342 | 0x1a, 0x1b |
343 | }; | 343 | }; |
344 | 344 | ||
345 | #define STAC92HD73XX_NUM_DMICS 2 | 345 | #define STAC92HD73XX_NUM_DMICS 2 |
346 | static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = { | 346 | static const hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = { |
347 | 0x13, 0x14, 0 | 347 | 0x13, 0x14, 0 |
348 | }; | 348 | }; |
349 | 349 | ||
350 | #define STAC92HD73_DAC_COUNT 5 | 350 | #define STAC92HD73_DAC_COUNT 5 |
351 | 351 | ||
352 | static hda_nid_t stac92hd73xx_mux_nids[2] = { | 352 | static const hda_nid_t stac92hd73xx_mux_nids[2] = { |
353 | 0x20, 0x21, | 353 | 0x20, 0x21, |
354 | }; | 354 | }; |
355 | 355 | ||
356 | static hda_nid_t stac92hd73xx_dmux_nids[2] = { | 356 | static const hda_nid_t stac92hd73xx_dmux_nids[2] = { |
357 | 0x20, 0x21, | 357 | 0x20, 0x21, |
358 | }; | 358 | }; |
359 | 359 | ||
360 | static hda_nid_t stac92hd73xx_smux_nids[2] = { | 360 | static const hda_nid_t stac92hd73xx_smux_nids[2] = { |
361 | 0x22, 0x23, | 361 | 0x22, 0x23, |
362 | }; | 362 | }; |
363 | 363 | ||
364 | #define STAC92HD73XX_NUM_CAPS 2 | 364 | #define STAC92HD73XX_NUM_CAPS 2 |
365 | static unsigned long stac92hd73xx_capvols[] = { | 365 | static const unsigned long stac92hd73xx_capvols[] = { |
366 | HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT), | 366 | HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT), |
367 | HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT), | 367 | HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT), |
368 | }; | 368 | }; |
@@ -370,137 +370,141 @@ static unsigned long stac92hd73xx_capvols[] = { | |||
370 | 370 | ||
371 | #define STAC92HD83_DAC_COUNT 3 | 371 | #define STAC92HD83_DAC_COUNT 3 |
372 | 372 | ||
373 | static hda_nid_t stac92hd83xxx_pwr_nids[4] = { | 373 | static const hda_nid_t stac92hd83xxx_pwr_nids[4] = { |
374 | 0xa, 0xb, 0xd, 0xe, | 374 | 0xa, 0xb, 0xd, 0xe, |
375 | }; | 375 | }; |
376 | 376 | ||
377 | static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = { | 377 | static const hda_nid_t stac92hd83xxx_slave_dig_outs[2] = { |
378 | 0x1e, 0, | 378 | 0x1e, 0, |
379 | }; | 379 | }; |
380 | 380 | ||
381 | static unsigned int stac92hd83xxx_pwr_mapping[4] = { | 381 | static const unsigned int stac92hd83xxx_pwr_mapping[4] = { |
382 | 0x03, 0x0c, 0x20, 0x40, | 382 | 0x03, 0x0c, 0x20, 0x40, |
383 | }; | 383 | }; |
384 | 384 | ||
385 | static hda_nid_t stac92hd83xxx_dmic_nids[] = { | 385 | static const hda_nid_t stac92hd83xxx_dmic_nids[] = { |
386 | 0x11, 0x20, | 386 | 0x11, 0x20, |
387 | }; | 387 | }; |
388 | 388 | ||
389 | static hda_nid_t stac92hd71bxx_pwr_nids[3] = { | 389 | static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { |
390 | 0x0a, 0x0d, 0x0f | 390 | 0x0a, 0x0d, 0x0f |
391 | }; | 391 | }; |
392 | 392 | ||
393 | static hda_nid_t stac92hd71bxx_adc_nids[2] = { | 393 | static const hda_nid_t stac92hd71bxx_adc_nids[2] = { |
394 | 0x12, 0x13, | 394 | 0x12, 0x13, |
395 | }; | 395 | }; |
396 | 396 | ||
397 | static hda_nid_t stac92hd71bxx_mux_nids[2] = { | 397 | static const hda_nid_t stac92hd71bxx_mux_nids[2] = { |
398 | 0x1a, 0x1b | 398 | 0x1a, 0x1b |
399 | }; | 399 | }; |
400 | 400 | ||
401 | static hda_nid_t stac92hd71bxx_dmux_nids[2] = { | 401 | static const hda_nid_t stac92hd71bxx_dmux_nids[2] = { |
402 | 0x1c, 0x1d, | 402 | 0x1c, 0x1d, |
403 | }; | 403 | }; |
404 | 404 | ||
405 | static hda_nid_t stac92hd71bxx_smux_nids[2] = { | 405 | static const hda_nid_t stac92hd71bxx_smux_nids[2] = { |
406 | 0x24, 0x25, | 406 | 0x24, 0x25, |
407 | }; | 407 | }; |
408 | 408 | ||
409 | #define STAC92HD71BXX_NUM_DMICS 2 | 409 | #define STAC92HD71BXX_NUM_DMICS 2 |
410 | static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = { | 410 | static const hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = { |
411 | 0x18, 0x19, 0 | 411 | 0x18, 0x19, 0 |
412 | }; | 412 | }; |
413 | 413 | ||
414 | static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = { | 414 | static const hda_nid_t stac92hd71bxx_dmic_5port_nids[STAC92HD71BXX_NUM_DMICS] = { |
415 | 0x18, 0 | ||
416 | }; | ||
417 | |||
418 | static const hda_nid_t stac92hd71bxx_slave_dig_outs[2] = { | ||
415 | 0x22, 0 | 419 | 0x22, 0 |
416 | }; | 420 | }; |
417 | 421 | ||
418 | #define STAC92HD71BXX_NUM_CAPS 2 | 422 | #define STAC92HD71BXX_NUM_CAPS 2 |
419 | static unsigned long stac92hd71bxx_capvols[] = { | 423 | static const unsigned long stac92hd71bxx_capvols[] = { |
420 | HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT), | 424 | HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT), |
421 | HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT), | 425 | HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT), |
422 | }; | 426 | }; |
423 | #define stac92hd71bxx_capsws stac92hd71bxx_capvols | 427 | #define stac92hd71bxx_capsws stac92hd71bxx_capvols |
424 | 428 | ||
425 | static hda_nid_t stac925x_adc_nids[1] = { | 429 | static const hda_nid_t stac925x_adc_nids[1] = { |
426 | 0x03, | 430 | 0x03, |
427 | }; | 431 | }; |
428 | 432 | ||
429 | static hda_nid_t stac925x_mux_nids[1] = { | 433 | static const hda_nid_t stac925x_mux_nids[1] = { |
430 | 0x0f, | 434 | 0x0f, |
431 | }; | 435 | }; |
432 | 436 | ||
433 | static hda_nid_t stac925x_dac_nids[1] = { | 437 | static const hda_nid_t stac925x_dac_nids[1] = { |
434 | 0x02, | 438 | 0x02, |
435 | }; | 439 | }; |
436 | 440 | ||
437 | #define STAC925X_NUM_DMICS 1 | 441 | #define STAC925X_NUM_DMICS 1 |
438 | static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = { | 442 | static const hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = { |
439 | 0x15, 0 | 443 | 0x15, 0 |
440 | }; | 444 | }; |
441 | 445 | ||
442 | static hda_nid_t stac925x_dmux_nids[1] = { | 446 | static const hda_nid_t stac925x_dmux_nids[1] = { |
443 | 0x14, | 447 | 0x14, |
444 | }; | 448 | }; |
445 | 449 | ||
446 | static unsigned long stac925x_capvols[] = { | 450 | static const unsigned long stac925x_capvols[] = { |
447 | HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT), | 451 | HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT), |
448 | }; | 452 | }; |
449 | static unsigned long stac925x_capsws[] = { | 453 | static const unsigned long stac925x_capsws[] = { |
450 | HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT), | 454 | HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT), |
451 | }; | 455 | }; |
452 | 456 | ||
453 | static hda_nid_t stac922x_adc_nids[2] = { | 457 | static const hda_nid_t stac922x_adc_nids[2] = { |
454 | 0x06, 0x07, | 458 | 0x06, 0x07, |
455 | }; | 459 | }; |
456 | 460 | ||
457 | static hda_nid_t stac922x_mux_nids[2] = { | 461 | static const hda_nid_t stac922x_mux_nids[2] = { |
458 | 0x12, 0x13, | 462 | 0x12, 0x13, |
459 | }; | 463 | }; |
460 | 464 | ||
461 | #define STAC922X_NUM_CAPS 2 | 465 | #define STAC922X_NUM_CAPS 2 |
462 | static unsigned long stac922x_capvols[] = { | 466 | static const unsigned long stac922x_capvols[] = { |
463 | HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT), | 467 | HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT), |
464 | HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT), | 468 | HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT), |
465 | }; | 469 | }; |
466 | #define stac922x_capsws stac922x_capvols | 470 | #define stac922x_capsws stac922x_capvols |
467 | 471 | ||
468 | static hda_nid_t stac927x_slave_dig_outs[2] = { | 472 | static const hda_nid_t stac927x_slave_dig_outs[2] = { |
469 | 0x1f, 0, | 473 | 0x1f, 0, |
470 | }; | 474 | }; |
471 | 475 | ||
472 | static hda_nid_t stac927x_adc_nids[3] = { | 476 | static const hda_nid_t stac927x_adc_nids[3] = { |
473 | 0x07, 0x08, 0x09 | 477 | 0x07, 0x08, 0x09 |
474 | }; | 478 | }; |
475 | 479 | ||
476 | static hda_nid_t stac927x_mux_nids[3] = { | 480 | static const hda_nid_t stac927x_mux_nids[3] = { |
477 | 0x15, 0x16, 0x17 | 481 | 0x15, 0x16, 0x17 |
478 | }; | 482 | }; |
479 | 483 | ||
480 | static hda_nid_t stac927x_smux_nids[1] = { | 484 | static const hda_nid_t stac927x_smux_nids[1] = { |
481 | 0x21, | 485 | 0x21, |
482 | }; | 486 | }; |
483 | 487 | ||
484 | static hda_nid_t stac927x_dac_nids[6] = { | 488 | static const hda_nid_t stac927x_dac_nids[6] = { |
485 | 0x02, 0x03, 0x04, 0x05, 0x06, 0 | 489 | 0x02, 0x03, 0x04, 0x05, 0x06, 0 |
486 | }; | 490 | }; |
487 | 491 | ||
488 | static hda_nid_t stac927x_dmux_nids[1] = { | 492 | static const hda_nid_t stac927x_dmux_nids[1] = { |
489 | 0x1b, | 493 | 0x1b, |
490 | }; | 494 | }; |
491 | 495 | ||
492 | #define STAC927X_NUM_DMICS 2 | 496 | #define STAC927X_NUM_DMICS 2 |
493 | static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = { | 497 | static const hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = { |
494 | 0x13, 0x14, 0 | 498 | 0x13, 0x14, 0 |
495 | }; | 499 | }; |
496 | 500 | ||
497 | #define STAC927X_NUM_CAPS 3 | 501 | #define STAC927X_NUM_CAPS 3 |
498 | static unsigned long stac927x_capvols[] = { | 502 | static const unsigned long stac927x_capvols[] = { |
499 | HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT), | 503 | HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT), |
500 | HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT), | 504 | HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT), |
501 | HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT), | 505 | HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT), |
502 | }; | 506 | }; |
503 | static unsigned long stac927x_capsws[] = { | 507 | static const unsigned long stac927x_capsws[] = { |
504 | HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT), | 508 | HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT), |
505 | HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT), | 509 | HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT), |
506 | HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT), | 510 | HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT), |
@@ -511,77 +515,77 @@ static const char * const stac927x_spdif_labels[5] = { | |||
511 | "Analog Mux 2", "Analog Mux 3" | 515 | "Analog Mux 2", "Analog Mux 3" |
512 | }; | 516 | }; |
513 | 517 | ||
514 | static hda_nid_t stac9205_adc_nids[2] = { | 518 | static const hda_nid_t stac9205_adc_nids[2] = { |
515 | 0x12, 0x13 | 519 | 0x12, 0x13 |
516 | }; | 520 | }; |
517 | 521 | ||
518 | static hda_nid_t stac9205_mux_nids[2] = { | 522 | static const hda_nid_t stac9205_mux_nids[2] = { |
519 | 0x19, 0x1a | 523 | 0x19, 0x1a |
520 | }; | 524 | }; |
521 | 525 | ||
522 | static hda_nid_t stac9205_dmux_nids[1] = { | 526 | static const hda_nid_t stac9205_dmux_nids[1] = { |
523 | 0x1d, | 527 | 0x1d, |
524 | }; | 528 | }; |
525 | 529 | ||
526 | static hda_nid_t stac9205_smux_nids[1] = { | 530 | static const hda_nid_t stac9205_smux_nids[1] = { |
527 | 0x21, | 531 | 0x21, |
528 | }; | 532 | }; |
529 | 533 | ||
530 | #define STAC9205_NUM_DMICS 2 | 534 | #define STAC9205_NUM_DMICS 2 |
531 | static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = { | 535 | static const hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = { |
532 | 0x17, 0x18, 0 | 536 | 0x17, 0x18, 0 |
533 | }; | 537 | }; |
534 | 538 | ||
535 | #define STAC9205_NUM_CAPS 2 | 539 | #define STAC9205_NUM_CAPS 2 |
536 | static unsigned long stac9205_capvols[] = { | 540 | static const unsigned long stac9205_capvols[] = { |
537 | HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT), | 541 | HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT), |
538 | HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT), | 542 | HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT), |
539 | }; | 543 | }; |
540 | static unsigned long stac9205_capsws[] = { | 544 | static const unsigned long stac9205_capsws[] = { |
541 | HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT), | 545 | HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT), |
542 | HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT), | 546 | HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT), |
543 | }; | 547 | }; |
544 | 548 | ||
545 | static hda_nid_t stac9200_pin_nids[8] = { | 549 | static const hda_nid_t stac9200_pin_nids[8] = { |
546 | 0x08, 0x09, 0x0d, 0x0e, | 550 | 0x08, 0x09, 0x0d, 0x0e, |
547 | 0x0f, 0x10, 0x11, 0x12, | 551 | 0x0f, 0x10, 0x11, 0x12, |
548 | }; | 552 | }; |
549 | 553 | ||
550 | static hda_nid_t stac925x_pin_nids[8] = { | 554 | static const hda_nid_t stac925x_pin_nids[8] = { |
551 | 0x07, 0x08, 0x0a, 0x0b, | 555 | 0x07, 0x08, 0x0a, 0x0b, |
552 | 0x0c, 0x0d, 0x10, 0x11, | 556 | 0x0c, 0x0d, 0x10, 0x11, |
553 | }; | 557 | }; |
554 | 558 | ||
555 | static hda_nid_t stac922x_pin_nids[10] = { | 559 | static const hda_nid_t stac922x_pin_nids[10] = { |
556 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | 560 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, |
557 | 0x0f, 0x10, 0x11, 0x15, 0x1b, | 561 | 0x0f, 0x10, 0x11, 0x15, 0x1b, |
558 | }; | 562 | }; |
559 | 563 | ||
560 | static hda_nid_t stac92hd73xx_pin_nids[13] = { | 564 | static const hda_nid_t stac92hd73xx_pin_nids[13] = { |
561 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | 565 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, |
562 | 0x0f, 0x10, 0x11, 0x12, 0x13, | 566 | 0x0f, 0x10, 0x11, 0x12, 0x13, |
563 | 0x14, 0x22, 0x23 | 567 | 0x14, 0x22, 0x23 |
564 | }; | 568 | }; |
565 | 569 | ||
566 | #define STAC92HD71BXX_NUM_PINS 13 | 570 | #define STAC92HD71BXX_NUM_PINS 13 |
567 | static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = { | 571 | static const hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = { |
568 | 0x0a, 0x0b, 0x0c, 0x0d, 0x00, | 572 | 0x0a, 0x0b, 0x0c, 0x0d, 0x00, |
569 | 0x00, 0x14, 0x18, 0x19, 0x1e, | 573 | 0x00, 0x14, 0x18, 0x19, 0x1e, |
570 | 0x1f, 0x20, 0x27 | 574 | 0x1f, 0x20, 0x27 |
571 | }; | 575 | }; |
572 | static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = { | 576 | static const hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = { |
573 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | 577 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, |
574 | 0x0f, 0x14, 0x18, 0x19, 0x1e, | 578 | 0x0f, 0x14, 0x18, 0x19, 0x1e, |
575 | 0x1f, 0x20, 0x27 | 579 | 0x1f, 0x20, 0x27 |
576 | }; | 580 | }; |
577 | 581 | ||
578 | static hda_nid_t stac927x_pin_nids[14] = { | 582 | static const hda_nid_t stac927x_pin_nids[14] = { |
579 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | 583 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, |
580 | 0x0f, 0x10, 0x11, 0x12, 0x13, | 584 | 0x0f, 0x10, 0x11, 0x12, 0x13, |
581 | 0x14, 0x21, 0x22, 0x23, | 585 | 0x14, 0x21, 0x22, 0x23, |
582 | }; | 586 | }; |
583 | 587 | ||
584 | static hda_nid_t stac9205_pin_nids[12] = { | 588 | static const hda_nid_t stac9205_pin_nids[12] = { |
585 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, | 589 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, |
586 | 0x0f, 0x14, 0x16, 0x17, 0x18, | 590 | 0x0f, 0x14, 0x16, 0x17, 0x18, |
587 | 0x21, 0x22, | 591 | 0x21, 0x22, |
@@ -841,45 +845,45 @@ static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol, | |||
841 | return 1; | 845 | return 1; |
842 | } | 846 | } |
843 | 847 | ||
844 | static struct hda_verb stac9200_core_init[] = { | 848 | static const struct hda_verb stac9200_core_init[] = { |
845 | /* set dac0mux for dac converter */ | 849 | /* set dac0mux for dac converter */ |
846 | { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, | 850 | { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, |
847 | {} | 851 | {} |
848 | }; | 852 | }; |
849 | 853 | ||
850 | static struct hda_verb stac9200_eapd_init[] = { | 854 | static const struct hda_verb stac9200_eapd_init[] = { |
851 | /* set dac0mux for dac converter */ | 855 | /* set dac0mux for dac converter */ |
852 | {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, | 856 | {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, |
853 | {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, | 857 | {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, |
854 | {} | 858 | {} |
855 | }; | 859 | }; |
856 | 860 | ||
857 | static struct hda_verb dell_eq_core_init[] = { | 861 | static const struct hda_verb dell_eq_core_init[] = { |
858 | /* set master volume to max value without distortion | 862 | /* set master volume to max value without distortion |
859 | * and direct control */ | 863 | * and direct control */ |
860 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, | 864 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, |
861 | {} | 865 | {} |
862 | }; | 866 | }; |
863 | 867 | ||
864 | static struct hda_verb stac92hd73xx_core_init[] = { | 868 | static const struct hda_verb stac92hd73xx_core_init[] = { |
865 | /* set master volume and direct control */ | 869 | /* set master volume and direct control */ |
866 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | 870 | { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
867 | {} | 871 | {} |
868 | }; | 872 | }; |
869 | 873 | ||
870 | static struct hda_verb stac92hd83xxx_core_init[] = { | 874 | static const struct hda_verb stac92hd83xxx_core_init[] = { |
871 | /* power state controls amps */ | 875 | /* power state controls amps */ |
872 | { 0x01, AC_VERB_SET_EAPD, 1 << 2}, | 876 | { 0x01, AC_VERB_SET_EAPD, 1 << 2}, |
873 | {} | 877 | {} |
874 | }; | 878 | }; |
875 | 879 | ||
876 | static struct hda_verb stac92hd71bxx_core_init[] = { | 880 | static const struct hda_verb stac92hd71bxx_core_init[] = { |
877 | /* set master volume and direct control */ | 881 | /* set master volume and direct control */ |
878 | { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | 882 | { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
879 | {} | 883 | {} |
880 | }; | 884 | }; |
881 | 885 | ||
882 | static struct hda_verb stac92hd71bxx_unmute_core_init[] = { | 886 | static const struct hda_verb stac92hd71bxx_unmute_core_init[] = { |
883 | /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ | 887 | /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ |
884 | { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | 888 | { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, |
885 | { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, | 889 | { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, |
@@ -887,7 +891,7 @@ static struct hda_verb stac92hd71bxx_unmute_core_init[] = { | |||
887 | {} | 891 | {} |
888 | }; | 892 | }; |
889 | 893 | ||
890 | static struct hda_verb stac925x_core_init[] = { | 894 | static const struct hda_verb stac925x_core_init[] = { |
891 | /* set dac0mux for dac converter */ | 895 | /* set dac0mux for dac converter */ |
892 | { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, | 896 | { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, |
893 | /* mute the master volume */ | 897 | /* mute the master volume */ |
@@ -895,13 +899,13 @@ static struct hda_verb stac925x_core_init[] = { | |||
895 | {} | 899 | {} |
896 | }; | 900 | }; |
897 | 901 | ||
898 | static struct hda_verb stac922x_core_init[] = { | 902 | static const struct hda_verb stac922x_core_init[] = { |
899 | /* set master volume and direct control */ | 903 | /* set master volume and direct control */ |
900 | { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | 904 | { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
901 | {} | 905 | {} |
902 | }; | 906 | }; |
903 | 907 | ||
904 | static struct hda_verb d965_core_init[] = { | 908 | static const struct hda_verb d965_core_init[] = { |
905 | /* set master volume and direct control */ | 909 | /* set master volume and direct control */ |
906 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | 910 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
907 | /* unmute node 0x1b */ | 911 | /* unmute node 0x1b */ |
@@ -911,7 +915,7 @@ static struct hda_verb d965_core_init[] = { | |||
911 | {} | 915 | {} |
912 | }; | 916 | }; |
913 | 917 | ||
914 | static struct hda_verb dell_3st_core_init[] = { | 918 | static const struct hda_verb dell_3st_core_init[] = { |
915 | /* don't set delta bit */ | 919 | /* don't set delta bit */ |
916 | {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, | 920 | {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, |
917 | /* unmute node 0x1b */ | 921 | /* unmute node 0x1b */ |
@@ -921,7 +925,7 @@ static struct hda_verb dell_3st_core_init[] = { | |||
921 | {} | 925 | {} |
922 | }; | 926 | }; |
923 | 927 | ||
924 | static struct hda_verb stac927x_core_init[] = { | 928 | static const struct hda_verb stac927x_core_init[] = { |
925 | /* set master volume and direct control */ | 929 | /* set master volume and direct control */ |
926 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | 930 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
927 | /* enable analog pc beep path */ | 931 | /* enable analog pc beep path */ |
@@ -929,7 +933,7 @@ static struct hda_verb stac927x_core_init[] = { | |||
929 | {} | 933 | {} |
930 | }; | 934 | }; |
931 | 935 | ||
932 | static struct hda_verb stac927x_volknob_core_init[] = { | 936 | static const struct hda_verb stac927x_volknob_core_init[] = { |
933 | /* don't set delta bit */ | 937 | /* don't set delta bit */ |
934 | {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, | 938 | {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, |
935 | /* enable analog pc beep path */ | 939 | /* enable analog pc beep path */ |
@@ -937,7 +941,7 @@ static struct hda_verb stac927x_volknob_core_init[] = { | |||
937 | {} | 941 | {} |
938 | }; | 942 | }; |
939 | 943 | ||
940 | static struct hda_verb stac9205_core_init[] = { | 944 | static const struct hda_verb stac9205_core_init[] = { |
941 | /* set master volume and direct control */ | 945 | /* set master volume and direct control */ |
942 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, | 946 | { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, |
943 | /* enable analog pc beep path */ | 947 | /* enable analog pc beep path */ |
@@ -977,7 +981,7 @@ static struct hda_verb stac9205_core_init[] = { | |||
977 | .private_value = nid, \ | 981 | .private_value = nid, \ |
978 | } | 982 | } |
979 | 983 | ||
980 | static struct snd_kcontrol_new stac9200_mixer[] = { | 984 | static const struct snd_kcontrol_new stac9200_mixer[] = { |
981 | HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT), | 985 | HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xb, 0, HDA_OUTPUT), |
982 | HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT), | 986 | HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT), |
983 | HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT), | 987 | HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT), |
@@ -985,38 +989,38 @@ static struct snd_kcontrol_new stac9200_mixer[] = { | |||
985 | { } /* end */ | 989 | { } /* end */ |
986 | }; | 990 | }; |
987 | 991 | ||
988 | static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = { | 992 | static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = { |
989 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3), | 993 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3), |
990 | {} | 994 | {} |
991 | }; | 995 | }; |
992 | 996 | ||
993 | static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = { | 997 | static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = { |
994 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4), | 998 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4), |
995 | {} | 999 | {} |
996 | }; | 1000 | }; |
997 | 1001 | ||
998 | static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = { | 1002 | static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = { |
999 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5), | 1003 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5), |
1000 | {} | 1004 | {} |
1001 | }; | 1005 | }; |
1002 | 1006 | ||
1003 | 1007 | ||
1004 | static struct snd_kcontrol_new stac92hd71bxx_loopback[] = { | 1008 | static const struct snd_kcontrol_new stac92hd71bxx_loopback[] = { |
1005 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2) | 1009 | STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2) |
1006 | }; | 1010 | }; |
1007 | 1011 | ||
1008 | static struct snd_kcontrol_new stac925x_mixer[] = { | 1012 | static const struct snd_kcontrol_new stac925x_mixer[] = { |
1009 | HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT), | 1013 | HDA_CODEC_VOLUME_MIN_MUTE("Master Playback Volume", 0xe, 0, HDA_OUTPUT), |
1010 | HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT), | 1014 | HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT), |
1011 | { } /* end */ | 1015 | { } /* end */ |
1012 | }; | 1016 | }; |
1013 | 1017 | ||
1014 | static struct snd_kcontrol_new stac9205_loopback[] = { | 1018 | static const struct snd_kcontrol_new stac9205_loopback[] = { |
1015 | STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1), | 1019 | STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1), |
1016 | {} | 1020 | {} |
1017 | }; | 1021 | }; |
1018 | 1022 | ||
1019 | static struct snd_kcontrol_new stac927x_loopback[] = { | 1023 | static const struct snd_kcontrol_new stac927x_loopback[] = { |
1020 | STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1), | 1024 | STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1), |
1021 | {} | 1025 | {} |
1022 | }; | 1026 | }; |
@@ -1182,16 +1186,16 @@ static int stac92xx_build_controls(struct hda_codec *codec) | |||
1182 | return 0; | 1186 | return 0; |
1183 | } | 1187 | } |
1184 | 1188 | ||
1185 | static unsigned int ref9200_pin_configs[8] = { | 1189 | static const unsigned int ref9200_pin_configs[8] = { |
1186 | 0x01c47010, 0x01447010, 0x0221401f, 0x01114010, | 1190 | 0x01c47010, 0x01447010, 0x0221401f, 0x01114010, |
1187 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, | 1191 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, |
1188 | }; | 1192 | }; |
1189 | 1193 | ||
1190 | static unsigned int gateway9200_m4_pin_configs[8] = { | 1194 | static const unsigned int gateway9200_m4_pin_configs[8] = { |
1191 | 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010, | 1195 | 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010, |
1192 | 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3, | 1196 | 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3, |
1193 | }; | 1197 | }; |
1194 | static unsigned int gateway9200_m4_2_pin_configs[8] = { | 1198 | static const unsigned int gateway9200_m4_2_pin_configs[8] = { |
1195 | 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010, | 1199 | 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010, |
1196 | 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3, | 1200 | 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3, |
1197 | }; | 1201 | }; |
@@ -1202,7 +1206,7 @@ static unsigned int gateway9200_m4_2_pin_configs[8] = { | |||
1202 | 102801DE | 1206 | 102801DE |
1203 | 102801E8 | 1207 | 102801E8 |
1204 | */ | 1208 | */ |
1205 | static unsigned int dell9200_d21_pin_configs[8] = { | 1209 | static const unsigned int dell9200_d21_pin_configs[8] = { |
1206 | 0x400001f0, 0x400001f1, 0x02214030, 0x01014010, | 1210 | 0x400001f0, 0x400001f1, 0x02214030, 0x01014010, |
1207 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, | 1211 | 0x02a19020, 0x01a19021, 0x90100140, 0x01813122, |
1208 | }; | 1212 | }; |
@@ -1212,7 +1216,7 @@ static unsigned int dell9200_d21_pin_configs[8] = { | |||
1212 | 102801C0 | 1216 | 102801C0 |
1213 | 102801C1 | 1217 | 102801C1 |
1214 | */ | 1218 | */ |
1215 | static unsigned int dell9200_d22_pin_configs[8] = { | 1219 | static const unsigned int dell9200_d22_pin_configs[8] = { |
1216 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, | 1220 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
1217 | 0x01813020, 0x02a19021, 0x90100140, 0x400001f2, | 1221 | 0x01813020, 0x02a19021, 0x90100140, 0x400001f2, |
1218 | }; | 1222 | }; |
@@ -1226,7 +1230,7 @@ static unsigned int dell9200_d22_pin_configs[8] = { | |||
1226 | 102801DA | 1230 | 102801DA |
1227 | 102801E3 | 1231 | 102801E3 |
1228 | */ | 1232 | */ |
1229 | static unsigned int dell9200_d23_pin_configs[8] = { | 1233 | static const unsigned int dell9200_d23_pin_configs[8] = { |
1230 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, | 1234 | 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010, |
1231 | 0x01813020, 0x01a19021, 0x90100140, 0x400001f2, | 1235 | 0x01813020, 0x01a19021, 0x90100140, 0x400001f2, |
1232 | }; | 1236 | }; |
@@ -1237,7 +1241,7 @@ static unsigned int dell9200_d23_pin_configs[8] = { | |||
1237 | 102801B5 (Dell Inspiron 630m) | 1241 | 102801B5 (Dell Inspiron 630m) |
1238 | 102801D8 (Dell Inspiron 640m) | 1242 | 102801D8 (Dell Inspiron 640m) |
1239 | */ | 1243 | */ |
1240 | static unsigned int dell9200_m21_pin_configs[8] = { | 1244 | static const unsigned int dell9200_m21_pin_configs[8] = { |
1241 | 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310, | 1245 | 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310, |
1242 | 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd, | 1246 | 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd, |
1243 | }; | 1247 | }; |
@@ -1250,7 +1254,7 @@ static unsigned int dell9200_m21_pin_configs[8] = { | |||
1250 | 102801D4 | 1254 | 102801D4 |
1251 | 102801D6 | 1255 | 102801D6 |
1252 | */ | 1256 | */ |
1253 | static unsigned int dell9200_m22_pin_configs[8] = { | 1257 | static const unsigned int dell9200_m22_pin_configs[8] = { |
1254 | 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310, | 1258 | 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310, |
1255 | 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc, | 1259 | 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc, |
1256 | }; | 1260 | }; |
@@ -1260,7 +1264,7 @@ static unsigned int dell9200_m22_pin_configs[8] = { | |||
1260 | 102801CE (Dell XPS M1710) | 1264 | 102801CE (Dell XPS M1710) |
1261 | 102801CF (Dell Precision M90) | 1265 | 102801CF (Dell Precision M90) |
1262 | */ | 1266 | */ |
1263 | static unsigned int dell9200_m23_pin_configs[8] = { | 1267 | static const unsigned int dell9200_m23_pin_configs[8] = { |
1264 | 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310, | 1268 | 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310, |
1265 | 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc, | 1269 | 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc, |
1266 | }; | 1270 | }; |
@@ -1272,7 +1276,7 @@ static unsigned int dell9200_m23_pin_configs[8] = { | |||
1272 | 102801CB (Dell Latitude 120L) | 1276 | 102801CB (Dell Latitude 120L) |
1273 | 102801D3 | 1277 | 102801D3 |
1274 | */ | 1278 | */ |
1275 | static unsigned int dell9200_m24_pin_configs[8] = { | 1279 | static const unsigned int dell9200_m24_pin_configs[8] = { |
1276 | 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310, | 1280 | 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310, |
1277 | 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe, | 1281 | 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe, |
1278 | }; | 1282 | }; |
@@ -1283,7 +1287,7 @@ static unsigned int dell9200_m24_pin_configs[8] = { | |||
1283 | 102801EE | 1287 | 102801EE |
1284 | 102801EF | 1288 | 102801EF |
1285 | */ | 1289 | */ |
1286 | static unsigned int dell9200_m25_pin_configs[8] = { | 1290 | static const unsigned int dell9200_m25_pin_configs[8] = { |
1287 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, | 1291 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
1288 | 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd, | 1292 | 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd, |
1289 | }; | 1293 | }; |
@@ -1293,7 +1297,7 @@ static unsigned int dell9200_m25_pin_configs[8] = { | |||
1293 | 102801F5 (Dell Inspiron 1501) | 1297 | 102801F5 (Dell Inspiron 1501) |
1294 | 102801F6 | 1298 | 102801F6 |
1295 | */ | 1299 | */ |
1296 | static unsigned int dell9200_m26_pin_configs[8] = { | 1300 | static const unsigned int dell9200_m26_pin_configs[8] = { |
1297 | 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310, | 1301 | 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310, |
1298 | 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe, | 1302 | 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe, |
1299 | }; | 1303 | }; |
@@ -1302,18 +1306,18 @@ static unsigned int dell9200_m26_pin_configs[8] = { | |||
1302 | STAC 9200-32 | 1306 | STAC 9200-32 |
1303 | 102801CD (Dell Inspiron E1705/9400) | 1307 | 102801CD (Dell Inspiron E1705/9400) |
1304 | */ | 1308 | */ |
1305 | static unsigned int dell9200_m27_pin_configs[8] = { | 1309 | static const unsigned int dell9200_m27_pin_configs[8] = { |
1306 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, | 1310 | 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310, |
1307 | 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc, | 1311 | 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc, |
1308 | }; | 1312 | }; |
1309 | 1313 | ||
1310 | static unsigned int oqo9200_pin_configs[8] = { | 1314 | static const unsigned int oqo9200_pin_configs[8] = { |
1311 | 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210, | 1315 | 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210, |
1312 | 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3, | 1316 | 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3, |
1313 | }; | 1317 | }; |
1314 | 1318 | ||
1315 | 1319 | ||
1316 | static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = { | 1320 | static const unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = { |
1317 | [STAC_REF] = ref9200_pin_configs, | 1321 | [STAC_REF] = ref9200_pin_configs, |
1318 | [STAC_9200_OQO] = oqo9200_pin_configs, | 1322 | [STAC_9200_OQO] = oqo9200_pin_configs, |
1319 | [STAC_9200_DELL_D21] = dell9200_d21_pin_configs, | 1323 | [STAC_9200_DELL_D21] = dell9200_d21_pin_configs, |
@@ -1350,7 +1354,7 @@ static const char * const stac9200_models[STAC_9200_MODELS] = { | |||
1350 | [STAC_9200_PANASONIC] = "panasonic", | 1354 | [STAC_9200_PANASONIC] = "panasonic", |
1351 | }; | 1355 | }; |
1352 | 1356 | ||
1353 | static struct snd_pci_quirk stac9200_cfg_tbl[] = { | 1357 | static const struct snd_pci_quirk stac9200_cfg_tbl[] = { |
1354 | /* SigmaTel reference board */ | 1358 | /* SigmaTel reference board */ |
1355 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | 1359 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, |
1356 | "DFI LanParty", STAC_REF), | 1360 | "DFI LanParty", STAC_REF), |
@@ -1426,47 +1430,47 @@ static struct snd_pci_quirk stac9200_cfg_tbl[] = { | |||
1426 | {} /* terminator */ | 1430 | {} /* terminator */ |
1427 | }; | 1431 | }; |
1428 | 1432 | ||
1429 | static unsigned int ref925x_pin_configs[8] = { | 1433 | static const unsigned int ref925x_pin_configs[8] = { |
1430 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, | 1434 | 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021, |
1431 | 0x90a70320, 0x02214210, 0x01019020, 0x9033032e, | 1435 | 0x90a70320, 0x02214210, 0x01019020, 0x9033032e, |
1432 | }; | 1436 | }; |
1433 | 1437 | ||
1434 | static unsigned int stac925xM1_pin_configs[8] = { | 1438 | static const unsigned int stac925xM1_pin_configs[8] = { |
1435 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | 1439 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1436 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | 1440 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, |
1437 | }; | 1441 | }; |
1438 | 1442 | ||
1439 | static unsigned int stac925xM1_2_pin_configs[8] = { | 1443 | static const unsigned int stac925xM1_2_pin_configs[8] = { |
1440 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | 1444 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1441 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | 1445 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, |
1442 | }; | 1446 | }; |
1443 | 1447 | ||
1444 | static unsigned int stac925xM2_pin_configs[8] = { | 1448 | static const unsigned int stac925xM2_pin_configs[8] = { |
1445 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | 1449 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1446 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | 1450 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, |
1447 | }; | 1451 | }; |
1448 | 1452 | ||
1449 | static unsigned int stac925xM2_2_pin_configs[8] = { | 1453 | static const unsigned int stac925xM2_2_pin_configs[8] = { |
1450 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | 1454 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1451 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | 1455 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, |
1452 | }; | 1456 | }; |
1453 | 1457 | ||
1454 | static unsigned int stac925xM3_pin_configs[8] = { | 1458 | static const unsigned int stac925xM3_pin_configs[8] = { |
1455 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | 1459 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1456 | 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3, | 1460 | 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3, |
1457 | }; | 1461 | }; |
1458 | 1462 | ||
1459 | static unsigned int stac925xM5_pin_configs[8] = { | 1463 | static const unsigned int stac925xM5_pin_configs[8] = { |
1460 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | 1464 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1461 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, | 1465 | 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e, |
1462 | }; | 1466 | }; |
1463 | 1467 | ||
1464 | static unsigned int stac925xM6_pin_configs[8] = { | 1468 | static const unsigned int stac925xM6_pin_configs[8] = { |
1465 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, | 1469 | 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020, |
1466 | 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320, | 1470 | 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320, |
1467 | }; | 1471 | }; |
1468 | 1472 | ||
1469 | static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = { | 1473 | static const unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = { |
1470 | [STAC_REF] = ref925x_pin_configs, | 1474 | [STAC_REF] = ref925x_pin_configs, |
1471 | [STAC_M1] = stac925xM1_pin_configs, | 1475 | [STAC_M1] = stac925xM1_pin_configs, |
1472 | [STAC_M1_2] = stac925xM1_2_pin_configs, | 1476 | [STAC_M1_2] = stac925xM1_2_pin_configs, |
@@ -1489,7 +1493,7 @@ static const char * const stac925x_models[STAC_925x_MODELS] = { | |||
1489 | [STAC_M6] = "m6", | 1493 | [STAC_M6] = "m6", |
1490 | }; | 1494 | }; |
1491 | 1495 | ||
1492 | static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = { | 1496 | static const struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = { |
1493 | SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), | 1497 | SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), |
1494 | SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), | 1498 | SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), |
1495 | SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), | 1499 | SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), |
@@ -1503,7 +1507,7 @@ static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = { | |||
1503 | {} /* terminator */ | 1507 | {} /* terminator */ |
1504 | }; | 1508 | }; |
1505 | 1509 | ||
1506 | static struct snd_pci_quirk stac925x_cfg_tbl[] = { | 1510 | static const struct snd_pci_quirk stac925x_cfg_tbl[] = { |
1507 | /* SigmaTel reference board */ | 1511 | /* SigmaTel reference board */ |
1508 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), | 1512 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), |
1509 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), | 1513 | SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), |
@@ -1515,33 +1519,33 @@ static struct snd_pci_quirk stac925x_cfg_tbl[] = { | |||
1515 | {} /* terminator */ | 1519 | {} /* terminator */ |
1516 | }; | 1520 | }; |
1517 | 1521 | ||
1518 | static unsigned int ref92hd73xx_pin_configs[13] = { | 1522 | static const unsigned int ref92hd73xx_pin_configs[13] = { |
1519 | 0x02214030, 0x02a19040, 0x01a19020, 0x02214030, | 1523 | 0x02214030, 0x02a19040, 0x01a19020, 0x02214030, |
1520 | 0x0181302e, 0x01014010, 0x01014020, 0x01014030, | 1524 | 0x0181302e, 0x01014010, 0x01014020, 0x01014030, |
1521 | 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050, | 1525 | 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050, |
1522 | 0x01452050, | 1526 | 0x01452050, |
1523 | }; | 1527 | }; |
1524 | 1528 | ||
1525 | static unsigned int dell_m6_pin_configs[13] = { | 1529 | static const unsigned int dell_m6_pin_configs[13] = { |
1526 | 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110, | 1530 | 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110, |
1527 | 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0, | 1531 | 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0, |
1528 | 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0, | 1532 | 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0, |
1529 | 0x4f0000f0, | 1533 | 0x4f0000f0, |
1530 | }; | 1534 | }; |
1531 | 1535 | ||
1532 | static unsigned int alienware_m17x_pin_configs[13] = { | 1536 | static const unsigned int alienware_m17x_pin_configs[13] = { |
1533 | 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020, | 1537 | 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020, |
1534 | 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0, | 1538 | 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0, |
1535 | 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0, | 1539 | 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0, |
1536 | 0x904601b0, | 1540 | 0x904601b0, |
1537 | }; | 1541 | }; |
1538 | 1542 | ||
1539 | static unsigned int intel_dg45id_pin_configs[13] = { | 1543 | static const unsigned int intel_dg45id_pin_configs[13] = { |
1540 | 0x02214230, 0x02A19240, 0x01013214, 0x01014210, | 1544 | 0x02214230, 0x02A19240, 0x01013214, 0x01014210, |
1541 | 0x01A19250, 0x01011212, 0x01016211 | 1545 | 0x01A19250, 0x01011212, 0x01016211 |
1542 | }; | 1546 | }; |
1543 | 1547 | ||
1544 | static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = { | 1548 | static const unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = { |
1545 | [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs, | 1549 | [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs, |
1546 | [STAC_DELL_M6_AMIC] = dell_m6_pin_configs, | 1550 | [STAC_DELL_M6_AMIC] = dell_m6_pin_configs, |
1547 | [STAC_DELL_M6_DMIC] = dell_m6_pin_configs, | 1551 | [STAC_DELL_M6_DMIC] = dell_m6_pin_configs, |
@@ -1563,7 +1567,7 @@ static const char * const stac92hd73xx_models[STAC_92HD73XX_MODELS] = { | |||
1563 | [STAC_ALIENWARE_M17X] = "alienware", | 1567 | [STAC_ALIENWARE_M17X] = "alienware", |
1564 | }; | 1568 | }; |
1565 | 1569 | ||
1566 | static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = { | 1570 | static const struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = { |
1567 | /* SigmaTel reference board */ | 1571 | /* SigmaTel reference board */ |
1568 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | 1572 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, |
1569 | "DFI LanParty", STAC_92HD73XX_REF), | 1573 | "DFI LanParty", STAC_92HD73XX_REF), |
@@ -1604,7 +1608,7 @@ static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = { | |||
1604 | {} /* terminator */ | 1608 | {} /* terminator */ |
1605 | }; | 1609 | }; |
1606 | 1610 | ||
1607 | static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = { | 1611 | static const struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = { |
1608 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, | 1612 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, |
1609 | "Alienware M17x", STAC_ALIENWARE_M17X), | 1613 | "Alienware M17x", STAC_ALIENWARE_M17X), |
1610 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, | 1614 | SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, |
@@ -1612,25 +1616,25 @@ static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = { | |||
1612 | {} /* terminator */ | 1616 | {} /* terminator */ |
1613 | }; | 1617 | }; |
1614 | 1618 | ||
1615 | static unsigned int ref92hd83xxx_pin_configs[10] = { | 1619 | static const unsigned int ref92hd83xxx_pin_configs[10] = { |
1616 | 0x02214030, 0x02211010, 0x02a19020, 0x02170130, | 1620 | 0x02214030, 0x02211010, 0x02a19020, 0x02170130, |
1617 | 0x01014050, 0x01819040, 0x01014020, 0x90a3014e, | 1621 | 0x01014050, 0x01819040, 0x01014020, 0x90a3014e, |
1618 | 0x01451160, 0x98560170, | 1622 | 0x01451160, 0x98560170, |
1619 | }; | 1623 | }; |
1620 | 1624 | ||
1621 | static unsigned int dell_s14_pin_configs[10] = { | 1625 | static const unsigned int dell_s14_pin_configs[10] = { |
1622 | 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110, | 1626 | 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110, |
1623 | 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160, | 1627 | 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160, |
1624 | 0x40f000f0, 0x40f000f0, | 1628 | 0x40f000f0, 0x40f000f0, |
1625 | }; | 1629 | }; |
1626 | 1630 | ||
1627 | static unsigned int hp_dv7_4000_pin_configs[10] = { | 1631 | static const unsigned int hp_dv7_4000_pin_configs[10] = { |
1628 | 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110, | 1632 | 0x03a12050, 0x0321201f, 0x40f000f0, 0x90170110, |
1629 | 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140, | 1633 | 0x40f000f0, 0x40f000f0, 0x90170110, 0xd5a30140, |
1630 | 0x40f000f0, 0x40f000f0, | 1634 | 0x40f000f0, 0x40f000f0, |
1631 | }; | 1635 | }; |
1632 | 1636 | ||
1633 | static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = { | 1637 | static const unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = { |
1634 | [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs, | 1638 | [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs, |
1635 | [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs, | 1639 | [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs, |
1636 | [STAC_DELL_S14] = dell_s14_pin_configs, | 1640 | [STAC_DELL_S14] = dell_s14_pin_configs, |
@@ -1646,7 +1650,7 @@ static const char * const stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = { | |||
1646 | [STAC_HP_DV7_4000] = "hp-dv7-4000", | 1650 | [STAC_HP_DV7_4000] = "hp-dv7-4000", |
1647 | }; | 1651 | }; |
1648 | 1652 | ||
1649 | static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = { | 1653 | static const struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = { |
1650 | /* SigmaTel reference board */ | 1654 | /* SigmaTel reference board */ |
1651 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | 1655 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, |
1652 | "DFI LanParty", STAC_92HD83XXX_REF), | 1656 | "DFI LanParty", STAC_92HD83XXX_REF), |
@@ -1659,35 +1663,35 @@ static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = { | |||
1659 | {} /* terminator */ | 1663 | {} /* terminator */ |
1660 | }; | 1664 | }; |
1661 | 1665 | ||
1662 | static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = { | 1666 | static const unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
1663 | 0x02214030, 0x02a19040, 0x01a19020, 0x01014010, | 1667 | 0x02214030, 0x02a19040, 0x01a19020, 0x01014010, |
1664 | 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0, | 1668 | 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0, |
1665 | 0x90a000f0, 0x01452050, 0x01452050, 0x00000000, | 1669 | 0x90a000f0, 0x01452050, 0x01452050, 0x00000000, |
1666 | 0x00000000 | 1670 | 0x00000000 |
1667 | }; | 1671 | }; |
1668 | 1672 | ||
1669 | static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = { | 1673 | static const unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
1670 | 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110, | 1674 | 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110, |
1671 | 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0, | 1675 | 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0, |
1672 | 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000, | 1676 | 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000, |
1673 | 0x00000000 | 1677 | 0x00000000 |
1674 | }; | 1678 | }; |
1675 | 1679 | ||
1676 | static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = { | 1680 | static const unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
1677 | 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110, | 1681 | 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110, |
1678 | 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0, | 1682 | 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0, |
1679 | 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000, | 1683 | 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000, |
1680 | 0x00000000 | 1684 | 0x00000000 |
1681 | }; | 1685 | }; |
1682 | 1686 | ||
1683 | static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = { | 1687 | static const unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = { |
1684 | 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110, | 1688 | 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110, |
1685 | 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0, | 1689 | 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0, |
1686 | 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000, | 1690 | 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000, |
1687 | 0x00000000 | 1691 | 0x00000000 |
1688 | }; | 1692 | }; |
1689 | 1693 | ||
1690 | static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = { | 1694 | static const unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = { |
1691 | [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs, | 1695 | [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs, |
1692 | [STAC_DELL_M4_1] = dell_m4_1_pin_configs, | 1696 | [STAC_DELL_M4_1] = dell_m4_1_pin_configs, |
1693 | [STAC_DELL_M4_2] = dell_m4_2_pin_configs, | 1697 | [STAC_DELL_M4_2] = dell_m4_2_pin_configs, |
@@ -1712,7 +1716,7 @@ static const char * const stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = { | |||
1712 | [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr", | 1716 | [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr", |
1713 | }; | 1717 | }; |
1714 | 1718 | ||
1715 | static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = { | 1719 | static const struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = { |
1716 | /* SigmaTel reference board */ | 1720 | /* SigmaTel reference board */ |
1717 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | 1721 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, |
1718 | "DFI LanParty", STAC_92HD71BXX_REF), | 1722 | "DFI LanParty", STAC_92HD71BXX_REF), |
@@ -1769,7 +1773,7 @@ static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = { | |||
1769 | {} /* terminator */ | 1773 | {} /* terminator */ |
1770 | }; | 1774 | }; |
1771 | 1775 | ||
1772 | static unsigned int ref922x_pin_configs[10] = { | 1776 | static const unsigned int ref922x_pin_configs[10] = { |
1773 | 0x01014010, 0x01016011, 0x01012012, 0x0221401f, | 1777 | 0x01014010, 0x01016011, 0x01012012, 0x0221401f, |
1774 | 0x01813122, 0x01011014, 0x01441030, 0x01c41030, | 1778 | 0x01813122, 0x01011014, 0x01441030, 0x01c41030, |
1775 | 0x40000100, 0x40000100, | 1779 | 0x40000100, 0x40000100, |
@@ -1783,7 +1787,7 @@ static unsigned int ref922x_pin_configs[10] = { | |||
1783 | 102801D1 | 1787 | 102801D1 |
1784 | 102801D2 | 1788 | 102801D2 |
1785 | */ | 1789 | */ |
1786 | static unsigned int dell_922x_d81_pin_configs[10] = { | 1790 | static const unsigned int dell_922x_d81_pin_configs[10] = { |
1787 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | 1791 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, |
1788 | 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1, | 1792 | 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1, |
1789 | 0x01813122, 0x400001f2, | 1793 | 0x01813122, 0x400001f2, |
@@ -1794,7 +1798,7 @@ static unsigned int dell_922x_d81_pin_configs[10] = { | |||
1794 | 102801AC | 1798 | 102801AC |
1795 | 102801D0 | 1799 | 102801D0 |
1796 | */ | 1800 | */ |
1797 | static unsigned int dell_922x_d82_pin_configs[10] = { | 1801 | static const unsigned int dell_922x_d82_pin_configs[10] = { |
1798 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, | 1802 | 0x02214030, 0x01a19021, 0x01111012, 0x01114010, |
1799 | 0x02a19020, 0x01117011, 0x01451140, 0x400001f0, | 1803 | 0x02a19020, 0x01117011, 0x01451140, 0x400001f0, |
1800 | 0x01813122, 0x400001f1, | 1804 | 0x01813122, 0x400001f1, |
@@ -1804,7 +1808,7 @@ static unsigned int dell_922x_d82_pin_configs[10] = { | |||
1804 | STAC 922X pin configs for | 1808 | STAC 922X pin configs for |
1805 | 102801BF | 1809 | 102801BF |
1806 | */ | 1810 | */ |
1807 | static unsigned int dell_922x_m81_pin_configs[10] = { | 1811 | static const unsigned int dell_922x_m81_pin_configs[10] = { |
1808 | 0x0321101f, 0x01112024, 0x01111222, 0x91174220, | 1812 | 0x0321101f, 0x01112024, 0x01111222, 0x91174220, |
1809 | 0x03a11050, 0x01116221, 0x90a70330, 0x01452340, | 1813 | 0x03a11050, 0x01116221, 0x90a70330, 0x01452340, |
1810 | 0x40C003f1, 0x405003f0, | 1814 | 0x40C003f1, 0x405003f0, |
@@ -1814,61 +1818,61 @@ static unsigned int dell_922x_m81_pin_configs[10] = { | |||
1814 | STAC 9221 A1 pin configs for | 1818 | STAC 9221 A1 pin configs for |
1815 | 102801D7 (Dell XPS M1210) | 1819 | 102801D7 (Dell XPS M1210) |
1816 | */ | 1820 | */ |
1817 | static unsigned int dell_922x_m82_pin_configs[10] = { | 1821 | static const unsigned int dell_922x_m82_pin_configs[10] = { |
1818 | 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310, | 1822 | 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310, |
1819 | 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2, | 1823 | 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2, |
1820 | 0x508003f3, 0x405003f4, | 1824 | 0x508003f3, 0x405003f4, |
1821 | }; | 1825 | }; |
1822 | 1826 | ||
1823 | static unsigned int d945gtp3_pin_configs[10] = { | 1827 | static const unsigned int d945gtp3_pin_configs[10] = { |
1824 | 0x0221401f, 0x01a19022, 0x01813021, 0x01014010, | 1828 | 0x0221401f, 0x01a19022, 0x01813021, 0x01014010, |
1825 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, | 1829 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, |
1826 | 0x02a19120, 0x40000100, | 1830 | 0x02a19120, 0x40000100, |
1827 | }; | 1831 | }; |
1828 | 1832 | ||
1829 | static unsigned int d945gtp5_pin_configs[10] = { | 1833 | static const unsigned int d945gtp5_pin_configs[10] = { |
1830 | 0x0221401f, 0x01011012, 0x01813024, 0x01014010, | 1834 | 0x0221401f, 0x01011012, 0x01813024, 0x01014010, |
1831 | 0x01a19021, 0x01016011, 0x01452130, 0x40000100, | 1835 | 0x01a19021, 0x01016011, 0x01452130, 0x40000100, |
1832 | 0x02a19320, 0x40000100, | 1836 | 0x02a19320, 0x40000100, |
1833 | }; | 1837 | }; |
1834 | 1838 | ||
1835 | static unsigned int intel_mac_v1_pin_configs[10] = { | 1839 | static const unsigned int intel_mac_v1_pin_configs[10] = { |
1836 | 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd, | 1840 | 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd, |
1837 | 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240, | 1841 | 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240, |
1838 | 0x400000fc, 0x400000fb, | 1842 | 0x400000fc, 0x400000fb, |
1839 | }; | 1843 | }; |
1840 | 1844 | ||
1841 | static unsigned int intel_mac_v2_pin_configs[10] = { | 1845 | static const unsigned int intel_mac_v2_pin_configs[10] = { |
1842 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | 1846 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, |
1843 | 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa, | 1847 | 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa, |
1844 | 0x400000fc, 0x400000fb, | 1848 | 0x400000fc, 0x400000fb, |
1845 | }; | 1849 | }; |
1846 | 1850 | ||
1847 | static unsigned int intel_mac_v3_pin_configs[10] = { | 1851 | static const unsigned int intel_mac_v3_pin_configs[10] = { |
1848 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, | 1852 | 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd, |
1849 | 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240, | 1853 | 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240, |
1850 | 0x400000fc, 0x400000fb, | 1854 | 0x400000fc, 0x400000fb, |
1851 | }; | 1855 | }; |
1852 | 1856 | ||
1853 | static unsigned int intel_mac_v4_pin_configs[10] = { | 1857 | static const unsigned int intel_mac_v4_pin_configs[10] = { |
1854 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | 1858 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, |
1855 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | 1859 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, |
1856 | 0x400000fc, 0x400000fb, | 1860 | 0x400000fc, 0x400000fb, |
1857 | }; | 1861 | }; |
1858 | 1862 | ||
1859 | static unsigned int intel_mac_v5_pin_configs[10] = { | 1863 | static const unsigned int intel_mac_v5_pin_configs[10] = { |
1860 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, | 1864 | 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f, |
1861 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, | 1865 | 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240, |
1862 | 0x400000fc, 0x400000fb, | 1866 | 0x400000fc, 0x400000fb, |
1863 | }; | 1867 | }; |
1864 | 1868 | ||
1865 | static unsigned int ecs202_pin_configs[10] = { | 1869 | static const unsigned int ecs202_pin_configs[10] = { |
1866 | 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010, | 1870 | 0x0221401f, 0x02a19020, 0x01a19020, 0x01114010, |
1867 | 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1, | 1871 | 0x408000f0, 0x01813022, 0x074510a0, 0x40c400f1, |
1868 | 0x9037012e, 0x40e000f2, | 1872 | 0x9037012e, 0x40e000f2, |
1869 | }; | 1873 | }; |
1870 | 1874 | ||
1871 | static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { | 1875 | static const unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = { |
1872 | [STAC_D945_REF] = ref922x_pin_configs, | 1876 | [STAC_D945_REF] = ref922x_pin_configs, |
1873 | [STAC_D945GTP3] = d945gtp3_pin_configs, | 1877 | [STAC_D945GTP3] = d945gtp3_pin_configs, |
1874 | [STAC_D945GTP5] = d945gtp5_pin_configs, | 1878 | [STAC_D945GTP5] = d945gtp5_pin_configs, |
@@ -1917,7 +1921,7 @@ static const char * const stac922x_models[STAC_922X_MODELS] = { | |||
1917 | [STAC_922X_DELL_M82] = "dell-m82", | 1921 | [STAC_922X_DELL_M82] = "dell-m82", |
1918 | }; | 1922 | }; |
1919 | 1923 | ||
1920 | static struct snd_pci_quirk stac922x_cfg_tbl[] = { | 1924 | static const struct snd_pci_quirk stac922x_cfg_tbl[] = { |
1921 | /* SigmaTel reference board */ | 1925 | /* SigmaTel reference board */ |
1922 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | 1926 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, |
1923 | "DFI LanParty", STAC_D945_REF), | 1927 | "DFI LanParty", STAC_D945_REF), |
@@ -2008,42 +2012,42 @@ static struct snd_pci_quirk stac922x_cfg_tbl[] = { | |||
2008 | {} /* terminator */ | 2012 | {} /* terminator */ |
2009 | }; | 2013 | }; |
2010 | 2014 | ||
2011 | static unsigned int ref927x_pin_configs[14] = { | 2015 | static const unsigned int ref927x_pin_configs[14] = { |
2012 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, | 2016 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, |
2013 | 0x01a19040, 0x01011012, 0x01016011, 0x0101201f, | 2017 | 0x01a19040, 0x01011012, 0x01016011, 0x0101201f, |
2014 | 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070, | 2018 | 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070, |
2015 | 0x01c42190, 0x40000100, | 2019 | 0x01c42190, 0x40000100, |
2016 | }; | 2020 | }; |
2017 | 2021 | ||
2018 | static unsigned int d965_3st_pin_configs[14] = { | 2022 | static const unsigned int d965_3st_pin_configs[14] = { |
2019 | 0x0221401f, 0x02a19120, 0x40000100, 0x01014011, | 2023 | 0x0221401f, 0x02a19120, 0x40000100, 0x01014011, |
2020 | 0x01a19021, 0x01813024, 0x40000100, 0x40000100, | 2024 | 0x01a19021, 0x01813024, 0x40000100, 0x40000100, |
2021 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, | 2025 | 0x40000100, 0x40000100, 0x40000100, 0x40000100, |
2022 | 0x40000100, 0x40000100 | 2026 | 0x40000100, 0x40000100 |
2023 | }; | 2027 | }; |
2024 | 2028 | ||
2025 | static unsigned int d965_5st_pin_configs[14] = { | 2029 | static const unsigned int d965_5st_pin_configs[14] = { |
2026 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, | 2030 | 0x02214020, 0x02a19080, 0x0181304e, 0x01014010, |
2027 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, | 2031 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, |
2028 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, | 2032 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, |
2029 | 0x40000100, 0x40000100 | 2033 | 0x40000100, 0x40000100 |
2030 | }; | 2034 | }; |
2031 | 2035 | ||
2032 | static unsigned int d965_5st_no_fp_pin_configs[14] = { | 2036 | static const unsigned int d965_5st_no_fp_pin_configs[14] = { |
2033 | 0x40000100, 0x40000100, 0x0181304e, 0x01014010, | 2037 | 0x40000100, 0x40000100, 0x0181304e, 0x01014010, |
2034 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, | 2038 | 0x01a19040, 0x01011012, 0x01016011, 0x40000100, |
2035 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, | 2039 | 0x40000100, 0x40000100, 0x40000100, 0x01442070, |
2036 | 0x40000100, 0x40000100 | 2040 | 0x40000100, 0x40000100 |
2037 | }; | 2041 | }; |
2038 | 2042 | ||
2039 | static unsigned int dell_3st_pin_configs[14] = { | 2043 | static const unsigned int dell_3st_pin_configs[14] = { |
2040 | 0x02211230, 0x02a11220, 0x01a19040, 0x01114210, | 2044 | 0x02211230, 0x02a11220, 0x01a19040, 0x01114210, |
2041 | 0x01111212, 0x01116211, 0x01813050, 0x01112214, | 2045 | 0x01111212, 0x01116211, 0x01813050, 0x01112214, |
2042 | 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb, | 2046 | 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb, |
2043 | 0x40c003fc, 0x40000100 | 2047 | 0x40c003fc, 0x40000100 |
2044 | }; | 2048 | }; |
2045 | 2049 | ||
2046 | static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { | 2050 | static const unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = { |
2047 | [STAC_D965_REF_NO_JD] = ref927x_pin_configs, | 2051 | [STAC_D965_REF_NO_JD] = ref927x_pin_configs, |
2048 | [STAC_D965_REF] = ref927x_pin_configs, | 2052 | [STAC_D965_REF] = ref927x_pin_configs, |
2049 | [STAC_D965_3ST] = d965_3st_pin_configs, | 2053 | [STAC_D965_3ST] = d965_3st_pin_configs, |
@@ -2066,7 +2070,7 @@ static const char * const stac927x_models[STAC_927X_MODELS] = { | |||
2066 | [STAC_927X_VOLKNOB] = "volknob", | 2070 | [STAC_927X_VOLKNOB] = "volknob", |
2067 | }; | 2071 | }; |
2068 | 2072 | ||
2069 | static struct snd_pci_quirk stac927x_cfg_tbl[] = { | 2073 | static const struct snd_pci_quirk stac927x_cfg_tbl[] = { |
2070 | /* SigmaTel reference board */ | 2074 | /* SigmaTel reference board */ |
2071 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | 2075 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, |
2072 | "DFI LanParty", STAC_D965_REF), | 2076 | "DFI LanParty", STAC_D965_REF), |
@@ -2104,7 +2108,7 @@ static struct snd_pci_quirk stac927x_cfg_tbl[] = { | |||
2104 | {} /* terminator */ | 2108 | {} /* terminator */ |
2105 | }; | 2109 | }; |
2106 | 2110 | ||
2107 | static unsigned int ref9205_pin_configs[12] = { | 2111 | static const unsigned int ref9205_pin_configs[12] = { |
2108 | 0x40000100, 0x40000100, 0x01016011, 0x01014010, | 2112 | 0x40000100, 0x40000100, 0x01016011, 0x01014010, |
2109 | 0x01813122, 0x01a19021, 0x01019020, 0x40000100, | 2113 | 0x01813122, 0x01a19021, 0x01019020, 0x40000100, |
2110 | 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030 | 2114 | 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030 |
@@ -2121,7 +2125,7 @@ static unsigned int ref9205_pin_configs[12] = { | |||
2121 | 10280228 (Dell Vostro 1500) | 2125 | 10280228 (Dell Vostro 1500) |
2122 | 10280229 (Dell Vostro 1700) | 2126 | 10280229 (Dell Vostro 1700) |
2123 | */ | 2127 | */ |
2124 | static unsigned int dell_9205_m42_pin_configs[12] = { | 2128 | static const unsigned int dell_9205_m42_pin_configs[12] = { |
2125 | 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310, | 2129 | 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310, |
2126 | 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9, | 2130 | 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9, |
2127 | 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE, | 2131 | 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE, |
@@ -2137,19 +2141,19 @@ static unsigned int dell_9205_m42_pin_configs[12] = { | |||
2137 | 10280200 | 2141 | 10280200 |
2138 | 10280201 | 2142 | 10280201 |
2139 | */ | 2143 | */ |
2140 | static unsigned int dell_9205_m43_pin_configs[12] = { | 2144 | static const unsigned int dell_9205_m43_pin_configs[12] = { |
2141 | 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310, | 2145 | 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310, |
2142 | 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9, | 2146 | 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9, |
2143 | 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8, | 2147 | 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8, |
2144 | }; | 2148 | }; |
2145 | 2149 | ||
2146 | static unsigned int dell_9205_m44_pin_configs[12] = { | 2150 | static const unsigned int dell_9205_m44_pin_configs[12] = { |
2147 | 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310, | 2151 | 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310, |
2148 | 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9, | 2152 | 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9, |
2149 | 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe, | 2153 | 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe, |
2150 | }; | 2154 | }; |
2151 | 2155 | ||
2152 | static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = { | 2156 | static const unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = { |
2153 | [STAC_9205_REF] = ref9205_pin_configs, | 2157 | [STAC_9205_REF] = ref9205_pin_configs, |
2154 | [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs, | 2158 | [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs, |
2155 | [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs, | 2159 | [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs, |
@@ -2166,7 +2170,7 @@ static const char * const stac9205_models[STAC_9205_MODELS] = { | |||
2166 | [STAC_9205_EAPD] = "eapd", | 2170 | [STAC_9205_EAPD] = "eapd", |
2167 | }; | 2171 | }; |
2168 | 2172 | ||
2169 | static struct snd_pci_quirk stac9205_cfg_tbl[] = { | 2173 | static const struct snd_pci_quirk stac9205_cfg_tbl[] = { |
2170 | /* SigmaTel reference board */ | 2174 | /* SigmaTel reference board */ |
2171 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, | 2175 | SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, |
2172 | "DFI LanParty", STAC_9205_REF), | 2176 | "DFI LanParty", STAC_9205_REF), |
@@ -2214,7 +2218,7 @@ static struct snd_pci_quirk stac9205_cfg_tbl[] = { | |||
2214 | }; | 2218 | }; |
2215 | 2219 | ||
2216 | static void stac92xx_set_config_regs(struct hda_codec *codec, | 2220 | static void stac92xx_set_config_regs(struct hda_codec *codec, |
2217 | unsigned int *pincfgs) | 2221 | const unsigned int *pincfgs) |
2218 | { | 2222 | { |
2219 | int i; | 2223 | int i; |
2220 | struct sigmatel_spec *spec = codec->spec; | 2224 | struct sigmatel_spec *spec = codec->spec; |
@@ -2334,7 +2338,7 @@ static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo, | |||
2334 | return 0; | 2338 | return 0; |
2335 | } | 2339 | } |
2336 | 2340 | ||
2337 | static struct hda_pcm_stream stac92xx_pcm_digital_playback = { | 2341 | static const struct hda_pcm_stream stac92xx_pcm_digital_playback = { |
2338 | .substreams = 1, | 2342 | .substreams = 1, |
2339 | .channels_min = 2, | 2343 | .channels_min = 2, |
2340 | .channels_max = 2, | 2344 | .channels_max = 2, |
@@ -2347,14 +2351,14 @@ static struct hda_pcm_stream stac92xx_pcm_digital_playback = { | |||
2347 | }, | 2351 | }, |
2348 | }; | 2352 | }; |
2349 | 2353 | ||
2350 | static struct hda_pcm_stream stac92xx_pcm_digital_capture = { | 2354 | static const struct hda_pcm_stream stac92xx_pcm_digital_capture = { |
2351 | .substreams = 1, | 2355 | .substreams = 1, |
2352 | .channels_min = 2, | 2356 | .channels_min = 2, |
2353 | .channels_max = 2, | 2357 | .channels_max = 2, |
2354 | /* NID is set in stac92xx_build_pcms */ | 2358 | /* NID is set in stac92xx_build_pcms */ |
2355 | }; | 2359 | }; |
2356 | 2360 | ||
2357 | static struct hda_pcm_stream stac92xx_pcm_analog_playback = { | 2361 | static const struct hda_pcm_stream stac92xx_pcm_analog_playback = { |
2358 | .substreams = 1, | 2362 | .substreams = 1, |
2359 | .channels_min = 2, | 2363 | .channels_min = 2, |
2360 | .channels_max = 8, | 2364 | .channels_max = 8, |
@@ -2366,7 +2370,7 @@ static struct hda_pcm_stream stac92xx_pcm_analog_playback = { | |||
2366 | }, | 2370 | }, |
2367 | }; | 2371 | }; |
2368 | 2372 | ||
2369 | static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = { | 2373 | static const struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = { |
2370 | .substreams = 1, | 2374 | .substreams = 1, |
2371 | .channels_min = 2, | 2375 | .channels_min = 2, |
2372 | .channels_max = 2, | 2376 | .channels_max = 2, |
@@ -2378,7 +2382,7 @@ static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = { | |||
2378 | }, | 2382 | }, |
2379 | }; | 2383 | }; |
2380 | 2384 | ||
2381 | static struct hda_pcm_stream stac92xx_pcm_analog_capture = { | 2385 | static const struct hda_pcm_stream stac92xx_pcm_analog_capture = { |
2382 | .channels_min = 2, | 2386 | .channels_min = 2, |
2383 | .channels_max = 2, | 2387 | .channels_max = 2, |
2384 | /* NID + .substreams is set in stac92xx_build_pcms */ | 2388 | /* NID + .substreams is set in stac92xx_build_pcms */ |
@@ -2487,7 +2491,7 @@ static int stac92xx_dc_bias_info(struct snd_kcontrol *kcontrol, | |||
2487 | struct snd_ctl_elem_info *uinfo) | 2491 | struct snd_ctl_elem_info *uinfo) |
2488 | { | 2492 | { |
2489 | int i; | 2493 | int i; |
2490 | static char *texts[] = { | 2494 | static const char * const texts[] = { |
2491 | "Mic In", "Line In", "Line Out" | 2495 | "Mic In", "Line In", "Line Out" |
2492 | }; | 2496 | }; |
2493 | 2497 | ||
@@ -2556,7 +2560,7 @@ static int stac92xx_dc_bias_put(struct snd_kcontrol *kcontrol, | |||
2556 | static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol, | 2560 | static int stac92xx_io_switch_info(struct snd_kcontrol *kcontrol, |
2557 | struct snd_ctl_elem_info *uinfo) | 2561 | struct snd_ctl_elem_info *uinfo) |
2558 | { | 2562 | { |
2559 | static char *texts[2]; | 2563 | char *texts[2]; |
2560 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | 2564 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); |
2561 | struct sigmatel_spec *spec = codec->spec; | 2565 | struct sigmatel_spec *spec = codec->spec; |
2562 | 2566 | ||
@@ -2687,7 +2691,7 @@ enum { | |||
2687 | STAC_CTL_WIDGET_DC_BIAS | 2691 | STAC_CTL_WIDGET_DC_BIAS |
2688 | }; | 2692 | }; |
2689 | 2693 | ||
2690 | static struct snd_kcontrol_new stac92xx_control_templates[] = { | 2694 | static const struct snd_kcontrol_new stac92xx_control_templates[] = { |
2691 | HDA_CODEC_VOLUME(NULL, 0, 0, 0), | 2695 | HDA_CODEC_VOLUME(NULL, 0, 0, 0), |
2692 | HDA_CODEC_MUTE(NULL, 0, 0, 0), | 2696 | HDA_CODEC_MUTE(NULL, 0, 0, 0), |
2693 | HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0), | 2697 | HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0), |
@@ -2701,7 +2705,7 @@ static struct snd_kcontrol_new stac92xx_control_templates[] = { | |||
2701 | /* add dynamic controls */ | 2705 | /* add dynamic controls */ |
2702 | static struct snd_kcontrol_new * | 2706 | static struct snd_kcontrol_new * |
2703 | stac_control_new(struct sigmatel_spec *spec, | 2707 | stac_control_new(struct sigmatel_spec *spec, |
2704 | struct snd_kcontrol_new *ktemp, | 2708 | const struct snd_kcontrol_new *ktemp, |
2705 | const char *name, | 2709 | const char *name, |
2706 | unsigned int subdev) | 2710 | unsigned int subdev) |
2707 | { | 2711 | { |
@@ -2724,7 +2728,7 @@ stac_control_new(struct sigmatel_spec *spec, | |||
2724 | } | 2728 | } |
2725 | 2729 | ||
2726 | static int stac92xx_add_control_temp(struct sigmatel_spec *spec, | 2730 | static int stac92xx_add_control_temp(struct sigmatel_spec *spec, |
2727 | struct snd_kcontrol_new *ktemp, | 2731 | const struct snd_kcontrol_new *ktemp, |
2728 | int idx, const char *name, | 2732 | int idx, const char *name, |
2729 | unsigned long val) | 2733 | unsigned long val) |
2730 | { | 2734 | { |
@@ -2754,7 +2758,7 @@ static inline int stac92xx_add_control(struct sigmatel_spec *spec, int type, | |||
2754 | return stac92xx_add_control_idx(spec, type, 0, name, val); | 2758 | return stac92xx_add_control_idx(spec, type, 0, name, val); |
2755 | } | 2759 | } |
2756 | 2760 | ||
2757 | static struct snd_kcontrol_new stac_input_src_temp = { | 2761 | static const struct snd_kcontrol_new stac_input_src_temp = { |
2758 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | 2762 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
2759 | .name = "Input Source", | 2763 | .name = "Input Source", |
2760 | .info = stac92xx_mux_enum_info, | 2764 | .info = stac92xx_mux_enum_info, |
@@ -3310,7 +3314,7 @@ static int stac92xx_dig_beep_switch_put(struct snd_kcontrol *kcontrol, | |||
3310 | return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); | 3314 | return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); |
3311 | } | 3315 | } |
3312 | 3316 | ||
3313 | static struct snd_kcontrol_new stac92xx_dig_beep_ctrl = { | 3317 | static const struct snd_kcontrol_new stac92xx_dig_beep_ctrl = { |
3314 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | 3318 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
3315 | .info = stac92xx_dig_beep_switch_info, | 3319 | .info = stac92xx_dig_beep_switch_info, |
3316 | .get = stac92xx_dig_beep_switch_get, | 3320 | .get = stac92xx_dig_beep_switch_get, |
@@ -4172,7 +4176,7 @@ static void stac92xx_power_down(struct hda_codec *codec) | |||
4172 | struct sigmatel_spec *spec = codec->spec; | 4176 | struct sigmatel_spec *spec = codec->spec; |
4173 | 4177 | ||
4174 | /* power down inactive DACs */ | 4178 | /* power down inactive DACs */ |
4175 | hda_nid_t *dac; | 4179 | const hda_nid_t *dac; |
4176 | for (dac = spec->dac_list; *dac; dac++) | 4180 | for (dac = spec->dac_list; *dac; dac++) |
4177 | if (!check_all_dac_nids(spec, *dac)) | 4181 | if (!check_all_dac_nids(spec, *dac)) |
4178 | snd_hda_codec_write(codec, *dac, 0, | 4182 | snd_hda_codec_write(codec, *dac, 0, |
@@ -4645,7 +4649,7 @@ static unsigned int stac_get_defcfg_connect(struct hda_codec *codec, int idx) | |||
4645 | } | 4649 | } |
4646 | 4650 | ||
4647 | static int stac92xx_connected_ports(struct hda_codec *codec, | 4651 | static int stac92xx_connected_ports(struct hda_codec *codec, |
4648 | hda_nid_t *nids, int num_nids) | 4652 | const hda_nid_t *nids, int num_nids) |
4649 | { | 4653 | { |
4650 | struct sigmatel_spec *spec = codec->spec; | 4654 | struct sigmatel_spec *spec = codec->spec; |
4651 | int idx, num; | 4655 | int idx, num; |
@@ -4969,7 +4973,7 @@ static int stac92xx_suspend(struct hda_codec *codec, pm_message_t state) | |||
4969 | } | 4973 | } |
4970 | #endif | 4974 | #endif |
4971 | 4975 | ||
4972 | static struct hda_codec_ops stac92xx_patch_ops = { | 4976 | static const struct hda_codec_ops stac92xx_patch_ops = { |
4973 | .build_controls = stac92xx_build_controls, | 4977 | .build_controls = stac92xx_build_controls, |
4974 | .build_pcms = stac92xx_build_pcms, | 4978 | .build_pcms = stac92xx_build_pcms, |
4975 | .init = stac92xx_init, | 4979 | .init = stac92xx_init, |
@@ -5589,7 +5593,7 @@ static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, | |||
5589 | return 1; | 5593 | return 1; |
5590 | } | 5594 | } |
5591 | 5595 | ||
5592 | static struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { | 5596 | static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { |
5593 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | 5597 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
5594 | .info = stac_hp_bass_gpio_info, | 5598 | .info = stac_hp_bass_gpio_info, |
5595 | .get = stac_hp_bass_gpio_get, | 5599 | .get = stac_hp_bass_gpio_get, |
@@ -5613,7 +5617,7 @@ static int stac_add_hp_bass_switch(struct hda_codec *codec) | |||
5613 | static int patch_stac92hd71bxx(struct hda_codec *codec) | 5617 | static int patch_stac92hd71bxx(struct hda_codec *codec) |
5614 | { | 5618 | { |
5615 | struct sigmatel_spec *spec; | 5619 | struct sigmatel_spec *spec; |
5616 | struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; | 5620 | const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; |
5617 | unsigned int pin_cfg; | 5621 | unsigned int pin_cfg; |
5618 | int err = 0; | 5622 | int err = 0; |
5619 | 5623 | ||
@@ -5706,9 +5710,9 @@ again: | |||
5706 | unmute_init++; | 5710 | unmute_init++; |
5707 | snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); | 5711 | snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); |
5708 | snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); | 5712 | snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); |
5709 | stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS - 1] = 0; | 5713 | spec->dmic_nids = stac92hd71bxx_dmic_5port_nids; |
5710 | spec->num_dmics = stac92xx_connected_ports(codec, | 5714 | spec->num_dmics = stac92xx_connected_ports(codec, |
5711 | stac92hd71bxx_dmic_nids, | 5715 | stac92hd71bxx_dmic_5port_nids, |
5712 | STAC92HD71BXX_NUM_DMICS - 1); | 5716 | STAC92HD71BXX_NUM_DMICS - 1); |
5713 | break; | 5717 | break; |
5714 | case 0x111d7603: /* 6 Port with Analog Mixer */ | 5718 | case 0x111d7603: /* 6 Port with Analog Mixer */ |
@@ -6215,31 +6219,31 @@ static int patch_stac9205(struct hda_codec *codec) | |||
6215 | * STAC9872 hack | 6219 | * STAC9872 hack |
6216 | */ | 6220 | */ |
6217 | 6221 | ||
6218 | static struct hda_verb stac9872_core_init[] = { | 6222 | static const struct hda_verb stac9872_core_init[] = { |
6219 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ | 6223 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ |
6220 | {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ | 6224 | {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ |
6221 | {} | 6225 | {} |
6222 | }; | 6226 | }; |
6223 | 6227 | ||
6224 | static hda_nid_t stac9872_pin_nids[] = { | 6228 | static const hda_nid_t stac9872_pin_nids[] = { |
6225 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, | 6229 | 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, |
6226 | 0x11, 0x13, 0x14, | 6230 | 0x11, 0x13, 0x14, |
6227 | }; | 6231 | }; |
6228 | 6232 | ||
6229 | static hda_nid_t stac9872_adc_nids[] = { | 6233 | static const hda_nid_t stac9872_adc_nids[] = { |
6230 | 0x8 /*,0x6*/ | 6234 | 0x8 /*,0x6*/ |
6231 | }; | 6235 | }; |
6232 | 6236 | ||
6233 | static hda_nid_t stac9872_mux_nids[] = { | 6237 | static const hda_nid_t stac9872_mux_nids[] = { |
6234 | 0x15 | 6238 | 0x15 |
6235 | }; | 6239 | }; |
6236 | 6240 | ||
6237 | static unsigned long stac9872_capvols[] = { | 6241 | static const unsigned long stac9872_capvols[] = { |
6238 | HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT), | 6242 | HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_INPUT), |
6239 | }; | 6243 | }; |
6240 | #define stac9872_capsws stac9872_capvols | 6244 | #define stac9872_capsws stac9872_capvols |
6241 | 6245 | ||
6242 | static unsigned int stac9872_vaio_pin_configs[9] = { | 6246 | static const unsigned int stac9872_vaio_pin_configs[9] = { |
6243 | 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030, | 6247 | 0x03211020, 0x411111f0, 0x411111f0, 0x03a15030, |
6244 | 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0, | 6248 | 0x411111f0, 0x90170110, 0x411111f0, 0x411111f0, |
6245 | 0x90a7013e | 6249 | 0x90a7013e |
@@ -6250,11 +6254,11 @@ static const char * const stac9872_models[STAC_9872_MODELS] = { | |||
6250 | [STAC_9872_VAIO] = "vaio", | 6254 | [STAC_9872_VAIO] = "vaio", |
6251 | }; | 6255 | }; |
6252 | 6256 | ||
6253 | static unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = { | 6257 | static const unsigned int *stac9872_brd_tbl[STAC_9872_MODELS] = { |
6254 | [STAC_9872_VAIO] = stac9872_vaio_pin_configs, | 6258 | [STAC_9872_VAIO] = stac9872_vaio_pin_configs, |
6255 | }; | 6259 | }; |
6256 | 6260 | ||
6257 | static struct snd_pci_quirk stac9872_cfg_tbl[] = { | 6261 | static const struct snd_pci_quirk stac9872_cfg_tbl[] = { |
6258 | SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, | 6262 | SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, |
6259 | "Sony VAIO F/S", STAC_9872_VAIO), | 6263 | "Sony VAIO F/S", STAC_9872_VAIO), |
6260 | {} /* terminator */ | 6264 | {} /* terminator */ |
@@ -6308,7 +6312,7 @@ static int patch_stac9872(struct hda_codec *codec) | |||
6308 | /* | 6312 | /* |
6309 | * patch entries | 6313 | * patch entries |
6310 | */ | 6314 | */ |
6311 | static struct hda_codec_preset snd_hda_preset_sigmatel[] = { | 6315 | static const struct hda_codec_preset snd_hda_preset_sigmatel[] = { |
6312 | { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, | 6316 | { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, |
6313 | { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, | 6317 | { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, |
6314 | { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, | 6318 | { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, |