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authorBen Dooks <ben-linux@fluff.org>2006-04-02 05:00:10 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-04-02 05:00:10 -0400
commit2b2ee1585a98be250f86c61e6ec70159b30e48e5 (patch)
tree2f12605ceaad24be1440f8efade82040cb9b269f
parentdee9b2e932ef7c8f19540ad67e425fae30f33421 (diff)
[ARM] 3448/1: [S3C2410] Settle delay when _enabling_ USB PLL
Patch from Ben Dooks Fix the bug in the UPLL enable code which should have put a 200uS delay in if enabling the USB PLL from the state where it is off. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-s3c2410/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index fec02c92f95f..b7f85e6d6b76 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -249,7 +249,7 @@ static int s3c24xx_upll_enable(struct clk *clk, int enable)
249 249
250 /* if we started the UPLL, then allow to settle */ 250 /* if we started the UPLL, then allow to settle */
251 251
252 if (enable && !(orig & S3C2410_CLKSLOW_UCLK_OFF)) 252 if (enable && (orig & S3C2410_CLKSLOW_UCLK_OFF))
253 udelay(200); 253 udelay(200);
254 254
255 return 0; 255 return 0;