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authorMichal Kazior <michal.kazior@tieto.com>2014-08-07 05:03:30 -0400
committerKalle Valo <kvalo@qca.qualcomm.com>2014-08-12 03:54:38 -0400
commit2986e3efb84fc79e798c1967beec6bb5eede7dee (patch)
treec380f5f93f30f02ba51e8f84756440da1219919f
parent0edf2577a5927aa8d1521f22da753e1d0c2a4db4 (diff)
ath10k: group some pci probing helpers
Make probe/remove functions shorter and easier to understand. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
-rw-r--r--drivers/net/wireless/ath/ath10k/pci.c134
1 files changed, 77 insertions, 57 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index bbad9662b0fd..98c029b7d0ab 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2482,86 +2482,116 @@ static int ath10k_pci_cold_reset(struct ath10k *ar)
2482 return 0; 2482 return 0;
2483} 2483}
2484 2484
2485static int ath10k_pci_probe(struct pci_dev *pdev, 2485static int ath10k_pci_claim(struct ath10k *ar)
2486 const struct pci_device_id *pci_dev)
2487{ 2486{
2488 void __iomem *mem; 2487 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
2489 int ret = 0; 2488 struct pci_dev *pdev = ar_pci->pdev;
2490 struct ath10k *ar; 2489 u32 lcr_val;
2491 struct ath10k_pci *ar_pci; 2490 int ret;
2492 u32 lcr_val, chip_id;
2493
2494 ath10k_dbg(ATH10K_DBG_PCI, "pci probe\n");
2495
2496 ar = ath10k_core_create(sizeof(*ar_pci), &pdev->dev,
2497 &ath10k_pci_hif_ops);
2498 if (!ar) {
2499 ath10k_err("failed to allocate core\n");
2500 return -ENOMEM;
2501 }
2502
2503 ar_pci = ath10k_pci_priv(ar);
2504 ar_pci->pdev = pdev;
2505 ar_pci->dev = &pdev->dev;
2506 ar_pci->ar = ar;
2507 2491
2508 pci_set_drvdata(pdev, ar); 2492 pci_set_drvdata(pdev, ar);
2509 2493
2510 ret = pci_enable_device(pdev); 2494 ret = pci_enable_device(pdev);
2511 if (ret) { 2495 if (ret) {
2512 ath10k_err("failed to enable PCI device: %d\n", ret); 2496 ath10k_err("failed to enable pci device: %d\n", ret);
2513 goto err_core_destroy; 2497 return ret;
2514 } 2498 }
2515 2499
2516 /* Request MMIO resources */
2517 ret = pci_request_region(pdev, BAR_NUM, "ath"); 2500 ret = pci_request_region(pdev, BAR_NUM, "ath");
2518 if (ret) { 2501 if (ret) {
2519 ath10k_err("failed to request MMIO region: %d\n", ret); 2502 ath10k_err("failed to request region BAR%d: %d\n", BAR_NUM,
2503 ret);
2520 goto err_device; 2504 goto err_device;
2521 } 2505 }
2522 2506
2523 /* 2507 /* Target expects 32 bit DMA. Enforce it. */
2524 * Target structures have a limit of 32 bit DMA pointers.
2525 * DMA pointers can be wider than 32 bits by default on some systems.
2526 */
2527 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2508 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2528 if (ret) { 2509 if (ret) {
2529 ath10k_err("failed to set DMA mask to 32-bit: %d\n", ret); 2510 ath10k_err("failed to set dma mask to 32-bit: %d\n", ret);
2530 goto err_region; 2511 goto err_region;
2531 } 2512 }
2532 2513
2533 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2514 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
2534 if (ret) { 2515 if (ret) {
2535 ath10k_err("failed to set consistent DMA mask to 32-bit\n"); 2516 ath10k_err("failed to set consistent dma mask to 32-bit: %d\n",
2517 ret);
2536 goto err_region; 2518 goto err_region;
2537 } 2519 }
2538 2520
2539 /* Set bus master bit in PCI_COMMAND to enable DMA */
2540 pci_set_master(pdev); 2521 pci_set_master(pdev);
2541 2522
2542 /* 2523 /* Workaround: Disable ASPM */
2543 * Temporary FIX: disable ASPM
2544 * Will be removed after the OTP is programmed
2545 */
2546 pci_read_config_dword(pdev, 0x80, &lcr_val); 2524 pci_read_config_dword(pdev, 0x80, &lcr_val);
2547 pci_write_config_dword(pdev, 0x80, (lcr_val & 0xffffff00)); 2525 pci_write_config_dword(pdev, 0x80, (lcr_val & 0xffffff00));
2548 2526
2549 /* Arrange for access to Target SoC registers. */ 2527 /* Arrange for access to Target SoC registers. */
2550 mem = pci_iomap(pdev, BAR_NUM, 0); 2528 ar_pci->mem = pci_iomap(pdev, BAR_NUM, 0);
2551 if (!mem) { 2529 if (!ar_pci->mem) {
2552 ath10k_err("failed to perform IOMAP for BAR%d\n", BAR_NUM); 2530 ath10k_err("failed to iomap BAR%d\n", BAR_NUM);
2553 ret = -EIO; 2531 ret = -EIO;
2554 goto err_master; 2532 goto err_master;
2555 } 2533 }
2556 2534
2557 ar_pci->mem = mem; 2535 ath10k_dbg(ATH10K_DBG_BOOT, "boot pci_mem 0x%p\n", ar_pci->mem);
2536 return 0;
2537
2538err_master:
2539 pci_clear_master(pdev);
2540
2541err_region:
2542 pci_release_region(pdev, BAR_NUM);
2543
2544err_device:
2545 pci_disable_device(pdev);
2546
2547 return ret;
2548}
2549
2550static void ath10k_pci_release(struct ath10k *ar)
2551{
2552 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
2553 struct pci_dev *pdev = ar_pci->pdev;
2554
2555 pci_iounmap(pdev, ar_pci->mem);
2556 pci_release_region(pdev, BAR_NUM);
2557 pci_clear_master(pdev);
2558 pci_disable_device(pdev);
2559}
2560
2561static int ath10k_pci_probe(struct pci_dev *pdev,
2562 const struct pci_device_id *pci_dev)
2563{
2564 int ret = 0;
2565 struct ath10k *ar;
2566 struct ath10k_pci *ar_pci;
2567 u32 chip_id;
2568
2569 ath10k_dbg(ATH10K_DBG_PCI, "pci probe\n");
2570
2571 ar = ath10k_core_create(sizeof(*ar_pci), &pdev->dev,
2572 &ath10k_pci_hif_ops);
2573 if (!ar) {
2574 ath10k_err("failed to allocate core\n");
2575 return -ENOMEM;
2576 }
2577
2578 ar_pci = ath10k_pci_priv(ar);
2579 ar_pci->pdev = pdev;
2580 ar_pci->dev = &pdev->dev;
2581 ar_pci->ar = ar;
2558 2582
2559 spin_lock_init(&ar_pci->ce_lock); 2583 spin_lock_init(&ar_pci->ce_lock);
2560 2584
2585 ret = ath10k_pci_claim(ar);
2586 if (ret) {
2587 ath10k_err("failed to claim device: %d\n", ret);
2588 goto err_core_destroy;
2589 }
2590
2561 ret = ath10k_pci_wake(ar); 2591 ret = ath10k_pci_wake(ar);
2562 if (ret) { 2592 if (ret) {
2563 ath10k_err("failed to wake up: %d\n", ret); 2593 ath10k_err("failed to wake up: %d\n", ret);
2564 goto err_iomap; 2594 goto err_release;
2565 } 2595 }
2566 2596
2567 chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS); 2597 chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
@@ -2576,8 +2606,6 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
2576 goto err_sleep; 2606 goto err_sleep;
2577 } 2607 }
2578 2608
2579 ath10k_dbg(ATH10K_DBG_BOOT, "boot pci_mem 0x%p\n", ar_pci->mem);
2580
2581 ret = ath10k_core_register(ar, chip_id); 2609 ret = ath10k_core_register(ar, chip_id);
2582 if (ret) { 2610 if (ret) {
2583 ath10k_err("failed to register driver core: %d\n", ret); 2611 ath10k_err("failed to register driver core: %d\n", ret);
@@ -2588,16 +2616,13 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
2588 2616
2589err_free_ce: 2617err_free_ce:
2590 ath10k_pci_free_ce(ar); 2618 ath10k_pci_free_ce(ar);
2619
2591err_sleep: 2620err_sleep:
2592 ath10k_pci_sleep(ar); 2621 ath10k_pci_sleep(ar);
2593err_iomap: 2622
2594 pci_iounmap(pdev, mem); 2623err_release:
2595err_master: 2624 ath10k_pci_release(ar);
2596 pci_clear_master(pdev); 2625
2597err_region:
2598 pci_release_region(pdev, BAR_NUM);
2599err_device:
2600 pci_disable_device(pdev);
2601err_core_destroy: 2626err_core_destroy:
2602 ath10k_core_destroy(ar); 2627 ath10k_core_destroy(ar);
2603 2628
@@ -2622,12 +2647,7 @@ static void ath10k_pci_remove(struct pci_dev *pdev)
2622 ath10k_core_unregister(ar); 2647 ath10k_core_unregister(ar);
2623 ath10k_pci_free_ce(ar); 2648 ath10k_pci_free_ce(ar);
2624 ath10k_pci_sleep(ar); 2649 ath10k_pci_sleep(ar);
2625 2650 ath10k_pci_release(ar);
2626 pci_iounmap(pdev, ar_pci->mem);
2627 pci_release_region(pdev, BAR_NUM);
2628 pci_clear_master(pdev);
2629 pci_disable_device(pdev);
2630
2631 ath10k_core_destroy(ar); 2651 ath10k_core_destroy(ar);
2632} 2652}
2633 2653