diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-01-29 14:43:43 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-01-29 14:43:43 -0500 |
commit | 297614f3049bee04a9a74a5e42c29a8c9b82eaec (patch) | |
tree | 8f0de58173fd7219f93eb688e58fbf0986073ea5 | |
parent | 9c145c56d0c8a0b62e48c8d71e055ad0fb2012ba (diff) | |
parent | a0b957f306fa4d0a39f4ffe5e5e25e856e6be46e (diff) |
Merge tag 'pinctrl-v3.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull final pin control fix from Linus Walleij:
"A late pin control fix for the v3.19 series: The AT91 gpio controller
would miss wakeup events, this single fix make it work properly"
[ "Final"? Yeah, I'll believe that once I've actually released 3.19 ;) - Linus ]
* tag 'pinctrl-v3.19-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: at91: allow to have disabled gpio bank
-rw-r--r-- | drivers/pinctrl/pinctrl-at91.c | 108 |
1 files changed, 55 insertions, 53 deletions
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c index dfd021e8268f..f4cd0b9b2438 100644 --- a/drivers/pinctrl/pinctrl-at91.c +++ b/drivers/pinctrl/pinctrl-at91.c | |||
@@ -177,7 +177,7 @@ struct at91_pinctrl { | |||
177 | struct device *dev; | 177 | struct device *dev; |
178 | struct pinctrl_dev *pctl; | 178 | struct pinctrl_dev *pctl; |
179 | 179 | ||
180 | int nbanks; | 180 | int nactive_banks; |
181 | 181 | ||
182 | uint32_t *mux_mask; | 182 | uint32_t *mux_mask; |
183 | int nmux; | 183 | int nmux; |
@@ -653,12 +653,18 @@ static int pin_check_config(struct at91_pinctrl *info, const char *name, | |||
653 | int mux; | 653 | int mux; |
654 | 654 | ||
655 | /* check if it's a valid config */ | 655 | /* check if it's a valid config */ |
656 | if (pin->bank >= info->nbanks) { | 656 | if (pin->bank >= gpio_banks) { |
657 | dev_err(info->dev, "%s: pin conf %d bank_id %d >= nbanks %d\n", | 657 | dev_err(info->dev, "%s: pin conf %d bank_id %d >= nbanks %d\n", |
658 | name, index, pin->bank, info->nbanks); | 658 | name, index, pin->bank, gpio_banks); |
659 | return -EINVAL; | 659 | return -EINVAL; |
660 | } | 660 | } |
661 | 661 | ||
662 | if (!gpio_chips[pin->bank]) { | ||
663 | dev_err(info->dev, "%s: pin conf %d bank_id %d not enabled\n", | ||
664 | name, index, pin->bank); | ||
665 | return -ENXIO; | ||
666 | } | ||
667 | |||
662 | if (pin->pin >= MAX_NB_GPIO_PER_BANK) { | 668 | if (pin->pin >= MAX_NB_GPIO_PER_BANK) { |
663 | dev_err(info->dev, "%s: pin conf %d pin_bank_id %d >= %d\n", | 669 | dev_err(info->dev, "%s: pin conf %d pin_bank_id %d >= %d\n", |
664 | name, index, pin->pin, MAX_NB_GPIO_PER_BANK); | 670 | name, index, pin->pin, MAX_NB_GPIO_PER_BANK); |
@@ -981,7 +987,8 @@ static void at91_pinctrl_child_count(struct at91_pinctrl *info, | |||
981 | 987 | ||
982 | for_each_child_of_node(np, child) { | 988 | for_each_child_of_node(np, child) { |
983 | if (of_device_is_compatible(child, gpio_compat)) { | 989 | if (of_device_is_compatible(child, gpio_compat)) { |
984 | info->nbanks++; | 990 | if (of_device_is_available(child)) |
991 | info->nactive_banks++; | ||
985 | } else { | 992 | } else { |
986 | info->nfunctions++; | 993 | info->nfunctions++; |
987 | info->ngroups += of_get_child_count(child); | 994 | info->ngroups += of_get_child_count(child); |
@@ -1003,11 +1010,11 @@ static int at91_pinctrl_mux_mask(struct at91_pinctrl *info, | |||
1003 | } | 1010 | } |
1004 | 1011 | ||
1005 | size /= sizeof(*list); | 1012 | size /= sizeof(*list); |
1006 | if (!size || size % info->nbanks) { | 1013 | if (!size || size % gpio_banks) { |
1007 | dev_err(info->dev, "wrong mux mask array should be by %d\n", info->nbanks); | 1014 | dev_err(info->dev, "wrong mux mask array should be by %d\n", gpio_banks); |
1008 | return -EINVAL; | 1015 | return -EINVAL; |
1009 | } | 1016 | } |
1010 | info->nmux = size / info->nbanks; | 1017 | info->nmux = size / gpio_banks; |
1011 | 1018 | ||
1012 | info->mux_mask = devm_kzalloc(info->dev, sizeof(u32) * size, GFP_KERNEL); | 1019 | info->mux_mask = devm_kzalloc(info->dev, sizeof(u32) * size, GFP_KERNEL); |
1013 | if (!info->mux_mask) { | 1020 | if (!info->mux_mask) { |
@@ -1131,7 +1138,7 @@ static int at91_pinctrl_probe_dt(struct platform_device *pdev, | |||
1131 | of_match_device(at91_pinctrl_of_match, &pdev->dev)->data; | 1138 | of_match_device(at91_pinctrl_of_match, &pdev->dev)->data; |
1132 | at91_pinctrl_child_count(info, np); | 1139 | at91_pinctrl_child_count(info, np); |
1133 | 1140 | ||
1134 | if (info->nbanks < 1) { | 1141 | if (gpio_banks < 1) { |
1135 | dev_err(&pdev->dev, "you need to specify at least one gpio-controller\n"); | 1142 | dev_err(&pdev->dev, "you need to specify at least one gpio-controller\n"); |
1136 | return -EINVAL; | 1143 | return -EINVAL; |
1137 | } | 1144 | } |
@@ -1144,7 +1151,7 @@ static int at91_pinctrl_probe_dt(struct platform_device *pdev, | |||
1144 | 1151 | ||
1145 | dev_dbg(&pdev->dev, "mux-mask\n"); | 1152 | dev_dbg(&pdev->dev, "mux-mask\n"); |
1146 | tmp = info->mux_mask; | 1153 | tmp = info->mux_mask; |
1147 | for (i = 0; i < info->nbanks; i++) { | 1154 | for (i = 0; i < gpio_banks; i++) { |
1148 | for (j = 0; j < info->nmux; j++, tmp++) { | 1155 | for (j = 0; j < info->nmux; j++, tmp++) { |
1149 | dev_dbg(&pdev->dev, "%d:%d\t0x%x\n", i, j, tmp[0]); | 1156 | dev_dbg(&pdev->dev, "%d:%d\t0x%x\n", i, j, tmp[0]); |
1150 | } | 1157 | } |
@@ -1162,7 +1169,7 @@ static int at91_pinctrl_probe_dt(struct platform_device *pdev, | |||
1162 | if (!info->groups) | 1169 | if (!info->groups) |
1163 | return -ENOMEM; | 1170 | return -ENOMEM; |
1164 | 1171 | ||
1165 | dev_dbg(&pdev->dev, "nbanks = %d\n", info->nbanks); | 1172 | dev_dbg(&pdev->dev, "nbanks = %d\n", gpio_banks); |
1166 | dev_dbg(&pdev->dev, "nfunctions = %d\n", info->nfunctions); | 1173 | dev_dbg(&pdev->dev, "nfunctions = %d\n", info->nfunctions); |
1167 | dev_dbg(&pdev->dev, "ngroups = %d\n", info->ngroups); | 1174 | dev_dbg(&pdev->dev, "ngroups = %d\n", info->ngroups); |
1168 | 1175 | ||
@@ -1185,7 +1192,7 @@ static int at91_pinctrl_probe(struct platform_device *pdev) | |||
1185 | { | 1192 | { |
1186 | struct at91_pinctrl *info; | 1193 | struct at91_pinctrl *info; |
1187 | struct pinctrl_pin_desc *pdesc; | 1194 | struct pinctrl_pin_desc *pdesc; |
1188 | int ret, i, j, k; | 1195 | int ret, i, j, k, ngpio_chips_enabled = 0; |
1189 | 1196 | ||
1190 | info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); | 1197 | info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); |
1191 | if (!info) | 1198 | if (!info) |
@@ -1200,23 +1207,27 @@ static int at91_pinctrl_probe(struct platform_device *pdev) | |||
1200 | * to obtain references to the struct gpio_chip * for them, and we | 1207 | * to obtain references to the struct gpio_chip * for them, and we |
1201 | * need this to proceed. | 1208 | * need this to proceed. |
1202 | */ | 1209 | */ |
1203 | for (i = 0; i < info->nbanks; i++) { | 1210 | for (i = 0; i < gpio_banks; i++) |
1204 | if (!gpio_chips[i]) { | 1211 | if (gpio_chips[i]) |
1205 | dev_warn(&pdev->dev, "GPIO chip %d not registered yet\n", i); | 1212 | ngpio_chips_enabled++; |
1206 | devm_kfree(&pdev->dev, info); | 1213 | |
1207 | return -EPROBE_DEFER; | 1214 | if (ngpio_chips_enabled < info->nactive_banks) { |
1208 | } | 1215 | dev_warn(&pdev->dev, |
1216 | "All GPIO chips are not registered yet (%d/%d)\n", | ||
1217 | ngpio_chips_enabled, info->nactive_banks); | ||
1218 | devm_kfree(&pdev->dev, info); | ||
1219 | return -EPROBE_DEFER; | ||
1209 | } | 1220 | } |
1210 | 1221 | ||
1211 | at91_pinctrl_desc.name = dev_name(&pdev->dev); | 1222 | at91_pinctrl_desc.name = dev_name(&pdev->dev); |
1212 | at91_pinctrl_desc.npins = info->nbanks * MAX_NB_GPIO_PER_BANK; | 1223 | at91_pinctrl_desc.npins = gpio_banks * MAX_NB_GPIO_PER_BANK; |
1213 | at91_pinctrl_desc.pins = pdesc = | 1224 | at91_pinctrl_desc.pins = pdesc = |
1214 | devm_kzalloc(&pdev->dev, sizeof(*pdesc) * at91_pinctrl_desc.npins, GFP_KERNEL); | 1225 | devm_kzalloc(&pdev->dev, sizeof(*pdesc) * at91_pinctrl_desc.npins, GFP_KERNEL); |
1215 | 1226 | ||
1216 | if (!at91_pinctrl_desc.pins) | 1227 | if (!at91_pinctrl_desc.pins) |
1217 | return -ENOMEM; | 1228 | return -ENOMEM; |
1218 | 1229 | ||
1219 | for (i = 0 , k = 0; i < info->nbanks; i++) { | 1230 | for (i = 0, k = 0; i < gpio_banks; i++) { |
1220 | for (j = 0; j < MAX_NB_GPIO_PER_BANK; j++, k++) { | 1231 | for (j = 0; j < MAX_NB_GPIO_PER_BANK; j++, k++) { |
1221 | pdesc->number = k; | 1232 | pdesc->number = k; |
1222 | pdesc->name = kasprintf(GFP_KERNEL, "pio%c%d", i + 'A', j); | 1233 | pdesc->name = kasprintf(GFP_KERNEL, "pio%c%d", i + 'A', j); |
@@ -1234,8 +1245,9 @@ static int at91_pinctrl_probe(struct platform_device *pdev) | |||
1234 | } | 1245 | } |
1235 | 1246 | ||
1236 | /* We will handle a range of GPIO pins */ | 1247 | /* We will handle a range of GPIO pins */ |
1237 | for (i = 0; i < info->nbanks; i++) | 1248 | for (i = 0; i < gpio_banks; i++) |
1238 | pinctrl_add_gpio_range(info->pctl, &gpio_chips[i]->range); | 1249 | if (gpio_chips[i]) |
1250 | pinctrl_add_gpio_range(info->pctl, &gpio_chips[i]->range); | ||
1239 | 1251 | ||
1240 | dev_info(&pdev->dev, "initialized AT91 pinctrl driver\n"); | 1252 | dev_info(&pdev->dev, "initialized AT91 pinctrl driver\n"); |
1241 | 1253 | ||
@@ -1613,9 +1625,10 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
1613 | static int at91_gpio_of_irq_setup(struct platform_device *pdev, | 1625 | static int at91_gpio_of_irq_setup(struct platform_device *pdev, |
1614 | struct at91_gpio_chip *at91_gpio) | 1626 | struct at91_gpio_chip *at91_gpio) |
1615 | { | 1627 | { |
1628 | struct gpio_chip *gpiochip_prev = NULL; | ||
1616 | struct at91_gpio_chip *prev = NULL; | 1629 | struct at91_gpio_chip *prev = NULL; |
1617 | struct irq_data *d = irq_get_irq_data(at91_gpio->pioc_virq); | 1630 | struct irq_data *d = irq_get_irq_data(at91_gpio->pioc_virq); |
1618 | int ret; | 1631 | int ret, i; |
1619 | 1632 | ||
1620 | at91_gpio->pioc_hwirq = irqd_to_hwirq(d); | 1633 | at91_gpio->pioc_hwirq = irqd_to_hwirq(d); |
1621 | 1634 | ||
@@ -1641,24 +1654,33 @@ static int at91_gpio_of_irq_setup(struct platform_device *pdev, | |||
1641 | return ret; | 1654 | return ret; |
1642 | } | 1655 | } |
1643 | 1656 | ||
1644 | /* Setup chained handler */ | ||
1645 | if (at91_gpio->pioc_idx) | ||
1646 | prev = gpio_chips[at91_gpio->pioc_idx - 1]; | ||
1647 | |||
1648 | /* The top level handler handles one bank of GPIOs, except | 1657 | /* The top level handler handles one bank of GPIOs, except |
1649 | * on some SoC it can handle up to three... | 1658 | * on some SoC it can handle up to three... |
1650 | * We only set up the handler for the first of the list. | 1659 | * We only set up the handler for the first of the list. |
1651 | */ | 1660 | */ |
1652 | if (prev && prev->next == at91_gpio) | 1661 | gpiochip_prev = irq_get_handler_data(at91_gpio->pioc_virq); |
1662 | if (!gpiochip_prev) { | ||
1663 | /* Then register the chain on the parent IRQ */ | ||
1664 | gpiochip_set_chained_irqchip(&at91_gpio->chip, | ||
1665 | &gpio_irqchip, | ||
1666 | at91_gpio->pioc_virq, | ||
1667 | gpio_irq_handler); | ||
1653 | return 0; | 1668 | return 0; |
1669 | } | ||
1654 | 1670 | ||
1655 | /* Then register the chain on the parent IRQ */ | 1671 | prev = container_of(gpiochip_prev, struct at91_gpio_chip, chip); |
1656 | gpiochip_set_chained_irqchip(&at91_gpio->chip, | ||
1657 | &gpio_irqchip, | ||
1658 | at91_gpio->pioc_virq, | ||
1659 | gpio_irq_handler); | ||
1660 | 1672 | ||
1661 | return 0; | 1673 | /* we can only have 2 banks before */ |
1674 | for (i = 0; i < 2; i++) { | ||
1675 | if (prev->next) { | ||
1676 | prev = prev->next; | ||
1677 | } else { | ||
1678 | prev->next = at91_gpio; | ||
1679 | return 0; | ||
1680 | } | ||
1681 | } | ||
1682 | |||
1683 | return -EINVAL; | ||
1662 | } | 1684 | } |
1663 | 1685 | ||
1664 | /* This structure is replicated for each GPIO block allocated at probe time */ | 1686 | /* This structure is replicated for each GPIO block allocated at probe time */ |
@@ -1675,24 +1697,6 @@ static struct gpio_chip at91_gpio_template = { | |||
1675 | .ngpio = MAX_NB_GPIO_PER_BANK, | 1697 | .ngpio = MAX_NB_GPIO_PER_BANK, |
1676 | }; | 1698 | }; |
1677 | 1699 | ||
1678 | static void at91_gpio_probe_fixup(void) | ||
1679 | { | ||
1680 | unsigned i; | ||
1681 | struct at91_gpio_chip *at91_gpio, *last = NULL; | ||
1682 | |||
1683 | for (i = 0; i < gpio_banks; i++) { | ||
1684 | at91_gpio = gpio_chips[i]; | ||
1685 | |||
1686 | /* | ||
1687 | * GPIO controller are grouped on some SoC: | ||
1688 | * PIOC, PIOD and PIOE can share the same IRQ line | ||
1689 | */ | ||
1690 | if (last && last->pioc_virq == at91_gpio->pioc_virq) | ||
1691 | last->next = at91_gpio; | ||
1692 | last = at91_gpio; | ||
1693 | } | ||
1694 | } | ||
1695 | |||
1696 | static struct of_device_id at91_gpio_of_match[] = { | 1700 | static struct of_device_id at91_gpio_of_match[] = { |
1697 | { .compatible = "atmel,at91sam9x5-gpio", .data = &at91sam9x5_ops, }, | 1701 | { .compatible = "atmel,at91sam9x5-gpio", .data = &at91sam9x5_ops, }, |
1698 | { .compatible = "atmel,at91rm9200-gpio", .data = &at91rm9200_ops }, | 1702 | { .compatible = "atmel,at91rm9200-gpio", .data = &at91rm9200_ops }, |
@@ -1805,8 +1809,6 @@ static int at91_gpio_probe(struct platform_device *pdev) | |||
1805 | gpio_chips[alias_idx] = at91_chip; | 1809 | gpio_chips[alias_idx] = at91_chip; |
1806 | gpio_banks = max(gpio_banks, alias_idx + 1); | 1810 | gpio_banks = max(gpio_banks, alias_idx + 1); |
1807 | 1811 | ||
1808 | at91_gpio_probe_fixup(); | ||
1809 | |||
1810 | ret = at91_gpio_of_irq_setup(pdev, at91_chip); | 1812 | ret = at91_gpio_of_irq_setup(pdev, at91_chip); |
1811 | if (ret) | 1813 | if (ret) |
1812 | goto irq_setup_err; | 1814 | goto irq_setup_err; |