diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-04-15 08:07:33 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-05-11 07:20:14 -0400 |
commit | 293ef19cbb9ef403b6dc9c96e34096bac5c88b84 (patch) | |
tree | 39d3844bd6960963868c31280d8c5711de8994d7 | |
parent | cc5c185098d85d709cc2a542c40abff0b337e094 (diff) |
OMAP: DSS2: Add FEAT_DSI_REVERSE_TXCLKESC
OMAP3430 has RESETDONETXCLKESCx bits in the order following bitnumber
order for lanes 0, 1, 2: 28, 27, 26. OMAP3630 and later have them in
saner order: 24, 25, 26 (and 27, 28 for OMAP4).
This patch adds a dss_feature that can be used to differentiate between
those two orders of RESETDONETXCLKESCx bits.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r-- | drivers/video/omap2/dss/dss_features.c | 2 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dss_features.h | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/video/omap2/dss/dss_features.c b/drivers/video/omap2/dss/dss_features.c index 7da798acee93..f4a92cd45b5a 100644 --- a/drivers/video/omap2/dss/dss_features.c +++ b/drivers/video/omap2/dss/dss_features.c | |||
@@ -253,7 +253,7 @@ static struct omap_dss_features omap3430_dss_features = { | |||
253 | FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | | 253 | FEAT_LCDENABLESIGNAL | FEAT_PCKFREEENABLE | |
254 | FEAT_FUNCGATED | FEAT_ROWREPEATENABLE | | 254 | FEAT_FUNCGATED | FEAT_ROWREPEATENABLE | |
255 | FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF | | 255 | FEAT_LINEBUFFERSPLIT | FEAT_RESIZECONF | |
256 | FEAT_DSI_PLL_FREQSEL, | 256 | FEAT_DSI_PLL_FREQSEL | FEAT_DSI_REVERSE_TXCLKESC, |
257 | 257 | ||
258 | .num_mgrs = 2, | 258 | .num_mgrs = 2, |
259 | .num_ovls = 3, | 259 | .num_ovls = 3, |
diff --git a/drivers/video/omap2/dss/dss_features.h b/drivers/video/omap2/dss/dss_features.h index 1093e8daaa66..5668fecbaede 100644 --- a/drivers/video/omap2/dss/dss_features.h +++ b/drivers/video/omap2/dss/dss_features.h | |||
@@ -45,6 +45,7 @@ enum dss_feat_id { | |||
45 | FEAT_DSI_PLL_FREQSEL = 1 << 14, | 45 | FEAT_DSI_PLL_FREQSEL = 1 << 14, |
46 | FEAT_DSI_DCS_CMD_CONFIG_VC = 1 << 15, | 46 | FEAT_DSI_DCS_CMD_CONFIG_VC = 1 << 15, |
47 | FEAT_DSI_VC_OCP_WIDTH = 1 << 16, | 47 | FEAT_DSI_VC_OCP_WIDTH = 1 << 16, |
48 | FEAT_DSI_REVERSE_TXCLKESC = 1 << 17, | ||
48 | }; | 49 | }; |
49 | 50 | ||
50 | /* DSS register field id */ | 51 | /* DSS register field id */ |