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authorStephen Boyd <sboyd@codeaurora.org>2011-11-08 13:34:10 -0500
committerDavid Brown <davidb@codeaurora.org>2011-11-10 13:36:34 -0500
commit27fdb577435e336e4b00b9e51626f9002b88a86c (patch)
tree74724584b0ede5becf3dafdee950071c4baec06e
parentdde7d61e7f9bf0e844df375412ec5d51650db486 (diff)
msm: timer: Use clockevents_config_and_register()
Don't open code the min/max delta logic. Use the generic version instead. Also expand the number of bits we can handle because there isn't anything that says we can't handle all 32 bits. Before: max_delta_ns: 122880426391799 min_delta_ns: 122070 mult: 140737 shift: 32 After: max_delta_ns: 131071523464981 min_delta_ns: 122069 mult: 70369 shift: 31 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: David Brown <davidb@codeaurora.org>
-rw-r--r--arch/arm/mach-msm/timer.c11
1 files changed, 1 insertions, 10 deletions
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 3d80fbf34165..11d0d8f2656c 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -93,7 +93,6 @@ static void msm_timer_set_mode(enum clock_event_mode mode,
93static struct clock_event_device msm_clockevent = { 93static struct clock_event_device msm_clockevent = {
94 .name = "gp_timer", 94 .name = "gp_timer",
95 .features = CLOCK_EVT_FEAT_ONESHOT, 95 .features = CLOCK_EVT_FEAT_ONESHOT,
96 .shift = 32,
97 .rating = 200, 96 .rating = 200,
98 .set_next_event = msm_timer_set_next_event, 97 .set_next_event = msm_timer_set_next_event,
99 .set_mode = msm_timer_set_mode, 98 .set_mode = msm_timer_set_mode,
@@ -161,18 +160,10 @@ static void __init msm_timer_init(void)
161 writel_relaxed(0, event_base + TIMER_ENABLE); 160 writel_relaxed(0, event_base + TIMER_ENABLE);
162 writel_relaxed(0, event_base + TIMER_CLEAR); 161 writel_relaxed(0, event_base + TIMER_CLEAR);
163 writel_relaxed(~0, event_base + TIMER_MATCH_VAL); 162 writel_relaxed(~0, event_base + TIMER_MATCH_VAL);
164 ce->mult = div_sc(GPT_HZ, NSEC_PER_SEC, ce->shift);
165 /*
166 * allow at least 10 seconds to notice that the timer
167 * wrapped
168 */
169 ce->max_delta_ns = clockevent_delta2ns(0xf0000000, ce);
170 /* 4 gets rounded down to 3 */
171 ce->min_delta_ns = clockevent_delta2ns(4, ce);
172 ce->cpumask = cpumask_of(0); 163 ce->cpumask = cpumask_of(0);
173 164
174 ce->irq = INT_GP_TIMER_EXP; 165 ce->irq = INT_GP_TIMER_EXP;
175 clockevents_register_device(ce); 166 clockevents_config_and_register(ce, GPT_HZ, 4, 0xffffffff);
176 if (cpu_is_msm8x60() || cpu_is_msm8960()) { 167 if (cpu_is_msm8x60() || cpu_is_msm8960()) {
177 msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *); 168 msm_evt.percpu_evt = alloc_percpu(struct clock_event_device *);
178 if (!msm_evt.percpu_evt) { 169 if (!msm_evt.percpu_evt) {