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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-03 10:07:36 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-10 13:13:45 -0400
commit278fe8b8a17a3db632180192cbc95a4df8fc8023 (patch)
treea0f027acf806d45e4d962c2bd38f3cde98c98d0c
parentd528b0340c88103e69117b0ae24f3c57a48fef67 (diff)
ARM: sun5i: dt: Fix A13 SoC bus base address
There was a typo in the base address used for the soc node in the A13 device tree. Fix it with the proper base address. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/sun5i-a13-olinuxino.dts2
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 80497e376706..9e508dcc4245 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -22,7 +22,7 @@
22 bootargs = "earlyprintk console=ttyS0,115200"; 22 bootargs = "earlyprintk console=ttyS0,115200";
23 }; 23 };
24 24
25 soc@01c20000 { 25 soc@01c00000 {
26 pinctrl@01c20800 { 26 pinctrl@01c20800 {
27 led_pins_olinuxino: led_pins@0 { 27 led_pins_olinuxino: led_pins@0 {
28 allwinner,pins = "PG9"; 28 allwinner,pins = "PG9";
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 9d5ad20238b0..f6091dc0936c 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -150,7 +150,7 @@
150 }; 150 };
151 }; 151 };
152 152
153 soc@01c20000 { 153 soc@01c00000 {
154 compatible = "simple-bus"; 154 compatible = "simple-bus";
155 #address-cells = <1>; 155 #address-cells = <1>;
156 #size-cells = <1>; 156 #size-cells = <1>;