aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorOlof Johansson <olof@lixom.net>2012-03-07 18:02:47 -0500
committerOlof Johansson <olof@lixom.net>2012-03-07 18:02:47 -0500
commit269f6a93f6851b68848e67816a14a2ebf8a48c6b (patch)
tree34ea976a0d72c52c4b4b5d577a6d97c6c3712ea9
parent412fe6b3a1f6fa6c88c11c8d2b2422b79342de8c (diff)
parent3223d007a3f9ddbd68424adf628e740dd87c564f (diff)
Merge branch 'fixes-non-critical-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
* 'fixes-non-critical-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP3+: PM: VP: fix integer truncation error ARM: OMAP2+: PM: fix wakeupgen warning when hotplug disabled ARM: OMAP2+: PM: fix section mismatch with omap2_init_processor_devices() ARM: OMAP2: Fix section warning for n8x0 when CONFIG_MMC_OMAP is not set ARM: OMAP2+: Fix omap24xx_io_desc warning if SoC subtypes are not selected ARM: OMAP1: Fix section mismatch for omap1_init_early() ARM: OMAP1: Fix typo in lcd_dma.c ARM: OMAP: mailbox: trivial whitespace fix ARM: OMAP: Remove definition cpu_is_omap4430() ARM: OMAP2+: included some headers twice ARM: OMAP: clock.c: included linux/debugfs.h twice ARM: OMAP: don't build hwspinlock in vain ARM: OMAP2+: ads7846_init: put gpio_pendown into pdata if it's provided ARM: omap: pandora: fix usbhs platform data ARM: OMAP: sram: Add am33xx SRAM support (minimal) ARM: OMAP2+: id: Add am33xx SoC type detection ARM: OMAP2+: GPMC: Export gpmc_enable_hwecc and gpmc_calculate_ecc ARM: OMAP: dmtimer: fix missing content/correction in low-power mode support
-rw-r--r--arch/arm/mach-omap1/io.c2
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c2
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/board-ldp.c1
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c8
-rw-r--r--arch/arm/mach-omap2/board-omap3pandora.c10
-rw-r--r--arch/arm/mach-omap2/common-board-devices.c8
-rw-r--r--arch/arm/mach-omap2/control.h5
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/id.c2
-rw-r--r--arch/arm/mach-omap2/io.c3
-rw-r--r--arch/arm/mach-omap2/omap-wakeupgen.c53
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c1
-rw-r--r--arch/arm/mach-omap2/pm.c2
-rw-r--r--arch/arm/mach-omap2/vp.c4
-rw-r--r--arch/arm/plat-omap/clock.c1
-rw-r--r--arch/arm/plat-omap/dmtimer.c19
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h2
-rw-r--r--arch/arm/plat-omap/include/plat/sram.h1
-rw-r--r--arch/arm/plat-omap/mailbox.c2
-rw-r--r--arch/arm/plat-omap/sram.c14
21 files changed, 90 insertions, 56 deletions
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 8e55b6fb3478..55a8f582d04c 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -118,7 +118,7 @@ void __init omap16xx_map_io(void)
118/* 118/*
119 * Common low-level hardware init for omap1. 119 * Common low-level hardware init for omap1.
120 */ 120 */
121void omap1_init_early(void) 121void __init omap1_init_early(void)
122{ 122{
123 omap_check_revision(); 123 omap_check_revision();
124 124
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index 453809359ba6..4c5ce7d829c2 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -117,7 +117,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
117void omap_set_lcd_dma_b1_vxres(unsigned long vxres) 117void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
118{ 118{
119 if (cpu_is_omap15xx()) { 119 if (cpu_is_omap15xx()) {
120 printk(KERN_ERR "DMA virtual resulotion is not supported " 120 printk(KERN_ERR "DMA virtual resolution is not supported "
121 "in 1510 mode\n"); 121 "in 1510 mode\n");
122 BUG(); 122 BUG();
123 } 123 }
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 56a6e98652cc..f1096172b9bb 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -265,6 +265,8 @@ obj-y += $(smc91x-m) $(smc91x-y)
265 265
266smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o 266smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
267obj-y += $(smsc911x-m) $(smsc911x-y) 267obj-y += $(smsc911x-m) $(smsc911x-y)
268obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o 268ifneq ($(CONFIG_HWSPINLOCK_OMAP),)
269obj-y += hwspinlock.o
270endif
269 271
270obj-y += common-board-devices.o twl-common.o 272obj-y += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index b5bc9b2e2862..d50a562adfa0 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -27,7 +27,6 @@
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/smsc911x.h> 28#include <linux/smsc911x.h>
29#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
30#include <linux/gpio.h>
31 30
32#include <mach/hardware.h> 31#include <mach/hardware.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 672262717601..50e40bc3f8f7 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -36,10 +36,6 @@
36 36
37#include "mux.h" 37#include "mux.h"
38 38
39static int slot1_cover_open;
40static int slot2_cover_open;
41static struct device *mmc_device;
42
43#define TUSB6010_ASYNC_CS 1 39#define TUSB6010_ASYNC_CS 1
44#define TUSB6010_SYNC_CS 4 40#define TUSB6010_SYNC_CS 4
45#define TUSB6010_GPIO_INT 58 41#define TUSB6010_GPIO_INT 58
@@ -211,6 +207,10 @@ static struct omap_onenand_platform_data board_onenand_data[] = {
211#define N810_EMMC_VSD_GPIO 23 207#define N810_EMMC_VSD_GPIO 23
212#define N810_EMMC_VIO_GPIO 9 208#define N810_EMMC_VIO_GPIO 9
213 209
210static int slot1_cover_open;
211static int slot2_cover_open;
212static struct device *mmc_device;
213
214static int n8x0_mmc_switch_slot(struct device *dev, int slot) 214static int n8x0_mmc_switch_slot(struct device *dev, int slot)
215{ 215{
216#ifdef CONFIG_MMC_DEBUG 216#ifdef CONFIG_MMC_DEBUG
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index ace466bcd76d..7184b8b9e38f 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -345,7 +345,7 @@ static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = {
345}; 345};
346 346
347static struct regulator_consumer_supply pandora_usb_phy_supply[] = { 347static struct regulator_consumer_supply pandora_usb_phy_supply[] = {
348 REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"), 348 REGULATOR_SUPPLY("hsusb1", "ehci-omap.0"),
349}; 349};
350 350
351/* ads7846 on SPI and 2 nub controllers on I2C */ 351/* ads7846 on SPI and 2 nub controllers on I2C */
@@ -563,13 +563,13 @@ static struct platform_device *omap3pandora_devices[] __initdata = {
563 563
564static const struct usbhs_omap_board_data usbhs_bdata __initconst = { 564static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
565 565
566 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, 566 .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
567 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, 567 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
568 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, 568 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
569 569
570 .phy_reset = true, 570 .phy_reset = true,
571 .reset_gpio_port[0] = 16, 571 .reset_gpio_port[0] = -EINVAL,
572 .reset_gpio_port[1] = -EINVAL, 572 .reset_gpio_port[1] = 16,
573 .reset_gpio_port[2] = -EINVAL 573 .reset_gpio_port[2] = -EINVAL
574}; 574};
575 575
diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c
index bcb0c5817167..799a617ade30 100644
--- a/arch/arm/mach-omap2/common-board-devices.c
+++ b/arch/arm/mach-omap2/common-board-devices.c
@@ -76,13 +76,15 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
76 gpio_set_debounce(gpio_pendown, gpio_debounce); 76 gpio_set_debounce(gpio_pendown, gpio_debounce);
77 } 77 }
78 78
79 ads7846_config.gpio_pendown = gpio_pendown;
80
81 spi_bi->bus_num = bus_num; 79 spi_bi->bus_num = bus_num;
82 spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown); 80 spi_bi->irq = OMAP_GPIO_IRQ(gpio_pendown);
83 81
84 if (board_pdata) 82 if (board_pdata) {
83 board_pdata->gpio_pendown = gpio_pendown;
85 spi_bi->platform_data = board_pdata; 84 spi_bi->platform_data = board_pdata;
85 } else {
86 ads7846_config.gpio_pendown = gpio_pendown;
87 }
86 88
87 spi_register_board_info(&ads7846_spi_board_info, 1); 89 spi_register_board_info(&ads7846_spi_board_info, 1);
88} 90}
diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h
index 0ba68d3764bc..96c4bcc0a75c 100644
--- a/arch/arm/mach-omap2/control.h
+++ b/arch/arm/mach-omap2/control.h
@@ -339,6 +339,11 @@
339#define AM35XX_VPFE_PCLK_SW_RST BIT(4) 339#define AM35XX_VPFE_PCLK_SW_RST BIT(4)
340 340
341/* 341/*
342 * CONTROL AM33XX STATUS register
343 */
344#define AM33XX_CONTROL_STATUS 0x040
345
346/*
342 * CONTROL OMAP STATUS register to identify OMAP3 features 347 * CONTROL OMAP STATUS register to identify OMAP3 features
343 */ 348 */
344#define OMAP3_CONTROL_OMAP_STATUS 0x044c 349#define OMAP3_CONTROL_OMAP_STATUS 0x044c
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index dfffbbf4c009..00d510858e28 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -888,6 +888,7 @@ int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size)
888 gpmc_write_reg(GPMC_ECC_CONFIG, val); 888 gpmc_write_reg(GPMC_ECC_CONFIG, val);
889 return 0; 889 return 0;
890} 890}
891EXPORT_SYMBOL_GPL(gpmc_enable_hwecc);
891 892
892/** 893/**
893 * gpmc_calculate_ecc - generate non-inverted ecc bytes 894 * gpmc_calculate_ecc - generate non-inverted ecc bytes
@@ -918,3 +919,4 @@ int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code)
918 gpmc_ecc_used = -EINVAL; 919 gpmc_ecc_used = -EINVAL;
919 return 0; 920 return 0;
920} 921}
922EXPORT_SYMBOL_GPL(gpmc_calculate_ecc);
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 6c5826605eae..134739751107 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -44,6 +44,8 @@ int omap_type(void)
44 44
45 if (cpu_is_omap24xx()) { 45 if (cpu_is_omap24xx()) {
46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS); 46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
47 } else if (cpu_is_am33xx()) {
48 val = omap_ctrl_readl(AM33XX_CONTROL_STATUS);
47 } else if (cpu_is_omap34xx()) { 49 } else if (cpu_is_omap34xx()) {
48 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS); 50 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
49 } else if (cpu_is_omap44xx()) { 51 } else if (cpu_is_omap44xx()) {
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index eb50c29fb644..3fbb0c0b84a4 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -43,14 +43,13 @@
43#include "clockdomain.h" 43#include "clockdomain.h"
44#include <plat/omap_hwmod.h> 44#include <plat/omap_hwmod.h>
45#include <plat/multi.h> 45#include <plat/multi.h>
46#include "common.h"
47 46
48/* 47/*
49 * The machine specific code may provide the extra mapping besides the 48 * The machine specific code may provide the extra mapping besides the
50 * default mapping provided here. 49 * default mapping provided here.
51 */ 50 */
52 51
53#ifdef CONFIG_ARCH_OMAP2 52#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
54static struct map_desc omap24xx_io_desc[] __initdata = { 53static struct map_desc omap24xx_io_desc[] __initdata = {
55 { 54 {
56 .virtual = L3_24XX_VIRT, 55 .virtual = L3_24XX_VIRT,
diff --git a/arch/arm/mach-omap2/omap-wakeupgen.c b/arch/arm/mach-omap2/omap-wakeupgen.c
index d3d8971d7f30..42cd7fb52414 100644
--- a/arch/arm/mach-omap2/omap-wakeupgen.c
+++ b/arch/arm/mach-omap2/omap-wakeupgen.c
@@ -43,7 +43,6 @@
43 43
44static void __iomem *wakeupgen_base; 44static void __iomem *wakeupgen_base;
45static void __iomem *sar_base; 45static void __iomem *sar_base;
46static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
47static DEFINE_SPINLOCK(wakeupgen_lock); 46static DEFINE_SPINLOCK(wakeupgen_lock);
48static unsigned int irq_target_cpu[NR_IRQS]; 47static unsigned int irq_target_cpu[NR_IRQS];
49 48
@@ -67,14 +66,6 @@ static inline void sar_writel(u32 val, u32 offset, u8 idx)
67 __raw_writel(val, sar_base + offset + (idx * 4)); 66 __raw_writel(val, sar_base + offset + (idx * 4));
68} 67}
69 68
70static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
71{
72 u8 i;
73
74 for (i = 0; i < NR_REG_BANKS; i++)
75 wakeupgen_writel(reg, i, cpu);
76}
77
78static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index) 69static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index)
79{ 70{
80 unsigned int spi_irq; 71 unsigned int spi_irq;
@@ -130,22 +121,6 @@ static void _wakeupgen_set(unsigned int irq, unsigned int cpu)
130 wakeupgen_writel(val, i, cpu); 121 wakeupgen_writel(val, i, cpu);
131} 122}
132 123
133static void _wakeupgen_save_masks(unsigned int cpu)
134{
135 u8 i;
136
137 for (i = 0; i < NR_REG_BANKS; i++)
138 per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
139}
140
141static void _wakeupgen_restore_masks(unsigned int cpu)
142{
143 u8 i;
144
145 for (i = 0; i < NR_REG_BANKS; i++)
146 wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
147}
148
149/* 124/*
150 * Architecture specific Mask extension 125 * Architecture specific Mask extension
151 */ 126 */
@@ -170,6 +145,33 @@ static void wakeupgen_unmask(struct irq_data *d)
170 spin_unlock_irqrestore(&wakeupgen_lock, flags); 145 spin_unlock_irqrestore(&wakeupgen_lock, flags);
171} 146}
172 147
148#ifdef CONFIG_HOTPLUG_CPU
149static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
150
151static void _wakeupgen_save_masks(unsigned int cpu)
152{
153 u8 i;
154
155 for (i = 0; i < NR_REG_BANKS; i++)
156 per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
157}
158
159static void _wakeupgen_restore_masks(unsigned int cpu)
160{
161 u8 i;
162
163 for (i = 0; i < NR_REG_BANKS; i++)
164 wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
165}
166
167static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
168{
169 u8 i;
170
171 for (i = 0; i < NR_REG_BANKS; i++)
172 wakeupgen_writel(reg, i, cpu);
173}
174
173/* 175/*
174 * Mask or unmask all interrupts on given CPU. 176 * Mask or unmask all interrupts on given CPU.
175 * 0 = Mask all interrupts on the 'cpu' 177 * 0 = Mask all interrupts on the 'cpu'
@@ -191,6 +193,7 @@ static void wakeupgen_irqmask_all(unsigned int cpu, unsigned int set)
191 } 193 }
192 spin_unlock_irqrestore(&wakeupgen_lock, flags); 194 spin_unlock_irqrestore(&wakeupgen_lock, flags);
193} 195}
196#endif
194 197
195#ifdef CONFIG_CPU_PM 198#ifdef CONFIG_CPU_PM
196/* 199/*
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index ef0524c10a84..acb561ea7c11 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -28,7 +28,6 @@
28#include <plat/mcspi.h> 28#include <plat/mcspi.h>
29#include <plat/mcbsp.h> 29#include <plat/mcbsp.h>
30#include <plat/mmc.h> 30#include <plat/mmc.h>
31#include <plat/i2c.h>
32#include <plat/dmtimer.h> 31#include <plat/dmtimer.h>
33#include <plat/common.h> 32#include <plat/common.h>
34 33
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c
index fb9b85bfc308..03f038c9b879 100644
--- a/arch/arm/mach-omap2/pm.c
+++ b/arch/arm/mach-omap2/pm.c
@@ -49,7 +49,7 @@ static int __init _init_omap_device(char *name)
49/* 49/*
50 * Build omap_devices for processors and bus. 50 * Build omap_devices for processors and bus.
51 */ 51 */
52static void omap2_init_processor_devices(void) 52static void __init omap2_init_processor_devices(void)
53{ 53{
54 _init_omap_device("mpu"); 54 _init_omap_device("mpu");
55 if (omap3_has_iva()) 55 if (omap3_has_iva())
diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c
index 0df88820978d..f95c1bad9dc6 100644
--- a/arch/arm/mach-omap2/vp.c
+++ b/arch/arm/mach-omap2/vp.c
@@ -61,8 +61,8 @@ void __init omap_vp_init(struct voltagedomain *voltdm)
61 vddmin = voltdm->pmic->vp_vddmin; 61 vddmin = voltdm->pmic->vp_vddmin;
62 vddmax = voltdm->pmic->vp_vddmax; 62 vddmax = voltdm->pmic->vp_vddmax;
63 63
64 waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * 64 waittime = DIV_ROUND_UP(voltdm->pmic->step_size * sys_clk_rate,
65 sys_clk_rate) / 1000; 65 1000 * voltdm->pmic->slew_rate);
66 vstepmin = voltdm->pmic->vp_vstepmin; 66 vstepmin = voltdm->pmic->vp_vstepmin;
67 vstepmax = voltdm->pmic->vp_vstepmax; 67 vstepmax = voltdm->pmic->vp_vstepmax;
68 68
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 567e4b54f245..56b6f8b7053e 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -20,7 +20,6 @@
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/mutex.h> 21#include <linux/mutex.h>
22#include <linux/cpufreq.h> 22#include <linux/cpufreq.h>
23#include <linux/debugfs.h>
24#include <linux/io.h> 23#include <linux/io.h>
25 24
26#include <plat/clock.h> 25#include <plat/clock.h>
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index af3b92be8459..0b77fe87e010 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -80,9 +80,9 @@ static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
80 80
81static void omap_timer_restore_context(struct omap_dm_timer *timer) 81static void omap_timer_restore_context(struct omap_dm_timer *timer)
82{ 82{
83 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_OFFSET, 83 __raw_writel(timer->context.tiocp_cfg,
84 timer->context.tiocp_cfg); 84 timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
85 if (timer->revision > 1) 85 if (timer->revision == 1)
86 __raw_writel(timer->context.tistat, timer->sys_stat); 86 __raw_writel(timer->context.tistat, timer->sys_stat);
87 87
88 __raw_writel(timer->context.tisr, timer->irq_stat); 88 __raw_writel(timer->context.tisr, timer->irq_stat);
@@ -357,6 +357,19 @@ int omap_dm_timer_stop(struct omap_dm_timer *timer)
357 357
358 __omap_dm_timer_stop(timer, timer->posted, rate); 358 __omap_dm_timer_stop(timer, timer->posted, rate);
359 359
360 if (timer->loses_context && timer->get_context_loss_count)
361 timer->ctx_loss_count =
362 timer->get_context_loss_count(&timer->pdev->dev);
363
364 /*
365 * Since the register values are computed and written within
366 * __omap_dm_timer_stop, we need to use read to retrieve the
367 * context.
368 */
369 timer->context.tclr =
370 omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
371 timer->context.tisr = __raw_readl(timer->irq_stat);
372 omap_dm_timer_disable(timer);
360 return 0; 373 return 0;
361} 374}
362EXPORT_SYMBOL_GPL(omap_dm_timer_stop); 375EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 6b51086fce18..4f18eaed4511 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -250,7 +250,6 @@ IS_AM_SUBCLASS(335x, 0x335)
250 * cpu_is_omap2423(): True for OMAP2423 250 * cpu_is_omap2423(): True for OMAP2423
251 * cpu_is_omap2430(): True for OMAP2430 251 * cpu_is_omap2430(): True for OMAP2430
252 * cpu_is_omap3430(): True for OMAP3430 252 * cpu_is_omap3430(): True for OMAP3430
253 * cpu_is_omap4430(): True for OMAP4430
254 * cpu_is_omap3505(): True for OMAP3505 253 * cpu_is_omap3505(): True for OMAP3505
255 * cpu_is_omap3517(): True for OMAP3517 254 * cpu_is_omap3517(): True for OMAP3517
256 */ 255 */
@@ -299,7 +298,6 @@ IS_OMAP_TYPE(3517, 0x3517)
299#define cpu_is_omap3505() 0 298#define cpu_is_omap3505() 0
300#define cpu_is_omap3517() 0 299#define cpu_is_omap3517() 0
301#define cpu_is_omap3430() 0 300#define cpu_is_omap3430() 0
302#define cpu_is_omap4430() 0
303#define cpu_is_omap3630() 0 301#define cpu_is_omap3630() 0
304 302
305/* 303/*
diff --git a/arch/arm/plat-omap/include/plat/sram.h b/arch/arm/plat-omap/include/plat/sram.h
index 75aa1b2bef51..227ae2657554 100644
--- a/arch/arm/plat-omap/include/plat/sram.h
+++ b/arch/arm/plat-omap/include/plat/sram.h
@@ -101,4 +101,5 @@ static inline void omap_push_sram_idle(void) {}
101#else 101#else
102#define OMAP4_SRAM_PA 0x40300000 102#define OMAP4_SRAM_PA 0x40300000
103#endif 103#endif
104#define AM33XX_SRAM_PA 0x40300000
104#endif 105#endif
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index ad80112c2275..ad32621aa52e 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -307,7 +307,7 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
307 if (!--mbox->use_count) { 307 if (!--mbox->use_count) {
308 free_irq(mbox->irq, mbox); 308 free_irq(mbox->irq, mbox);
309 tasklet_kill(&mbox->txq->tasklet); 309 tasklet_kill(&mbox->txq->tasklet);
310 flush_work_sync(&mbox->rxq->work); 310 flush_work_sync(&mbox->rxq->work);
311 mbox_queue_free(mbox->txq); 311 mbox_queue_free(mbox->txq);
312 mbox_queue_free(mbox->rxq); 312 mbox_queue_free(mbox->rxq);
313 } 313 }
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 4243bdcc87bc..596f2224e15a 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -86,7 +86,7 @@ static int is_sram_locked(void)
86 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ 86 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
87 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ 87 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
88 } 88 }
89 if (cpu_is_omap34xx()) { 89 if (cpu_is_omap34xx() && !cpu_is_am33xx()) {
90 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ 90 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
91 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ 91 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
92 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ 92 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
@@ -124,7 +124,10 @@ static void __init omap_detect_sram(void)
124 omap_sram_size = 0x800; /* 2K */ 124 omap_sram_size = 0x800; /* 2K */
125 } 125 }
126 } else { 126 } else {
127 if (cpu_is_omap34xx()) { 127 if (cpu_is_am33xx()) {
128 omap_sram_start = AM33XX_SRAM_PA;
129 omap_sram_size = 0x10000; /* 64K */
130 } else if (cpu_is_omap34xx()) {
128 omap_sram_start = OMAP3_SRAM_PA; 131 omap_sram_start = OMAP3_SRAM_PA;
129 omap_sram_size = 0x10000; /* 64K */ 132 omap_sram_size = 0x10000; /* 64K */
130 } else if (cpu_is_omap44xx()) { 133 } else if (cpu_is_omap44xx()) {
@@ -368,6 +371,11 @@ static inline int omap34xx_sram_init(void)
368 return 0; 371 return 0;
369} 372}
370 373
374static inline int am33xx_sram_init(void)
375{
376 return 0;
377}
378
371int __init omap_sram_init(void) 379int __init omap_sram_init(void)
372{ 380{
373 omap_detect_sram(); 381 omap_detect_sram();
@@ -379,6 +387,8 @@ int __init omap_sram_init(void)
379 omap242x_sram_init(); 387 omap242x_sram_init();
380 else if (cpu_is_omap2430()) 388 else if (cpu_is_omap2430())
381 omap243x_sram_init(); 389 omap243x_sram_init();
390 else if (cpu_is_am33xx())
391 am33xx_sram_init();
382 else if (cpu_is_omap34xx()) 392 else if (cpu_is_omap34xx())
383 omap34xx_sram_init(); 393 omap34xx_sram_init();
384 394